74AHC2G32DP

74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Rev. 01 — 23 February 2004 Product data sheet 1. General description The 74AHC2G/AHCT2G32 is a high-speed Si-gate CMOS device. This device provides two 2-input OR gates. 2. Features s Symmetrical output impedance s High noise immunity s ESD protection: x HBM EIA/JESD22-A114-A exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V x CDM EIA/JESD22-C101 exceeds 1000 V. s Low power dissipation s Balanced propagation delays s SOT505-2 and SOT765-1 package s Specified from −40 °C to +85 °C and −40 °C to +125 °C. 3. Quick reference data Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol tPHL, tPLH CI CPD Parameter propagation delay nA and nB to nY input capacitance power dissipation capacitance propagation delay nA and nB to nY input capacitance power dissipation capacitance CL = 50 pF; fi = 1 MHz [1] [2] Conditions CL = 15 pF; VCC = 5 V CL = 50 pF; fi = 1 MHz CL = 15 pF; VCC = 5 V [1] [2] Min - Typ 3.2 1.5 16 Max 5.5 10 - Unit ns pF pF Type 74AHC2G Type 74AHCT2G tPHL, tPLH CI CPD [1] - 3.3 1.5 17 6.9 10 - ns pF pF CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. [2] The condition is VI = GND to VCC. 4. Ordering information Table 2: Ordering information Package Temperature range Name 74AHC2G32DP 74AHCT2G32DP 74AHC2G32DC 74AHCT2G32DC −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C −40 °C to +125 °C TSSOP8 TSSOP8 VSSOP8 VSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm plastic very shrink small outline package; 8 leads; body width 2.3 mm plastic very shrink small outline package; 8 leads; body width 2.3 mm Version SOT505-2 SOT505-2 SOT765-1 SOT765-1 Type number 5. Marking Table 3: Marking Marking code A32 C32 A32 C32 Type number 74AHC2G32DP 74AHCT2G32DP 74AHC2G32DC 74AHCT2G32DC 6. Functional diagram 1 1 2 5 6 1A 1B 2A 2B 2 1Y 7 5 6 mna733 mna734 ≥1 7 2Y 3 ≥1 3 Fig 1. Functional diagram. Fig 2. IEC logic symbol. 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 2 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate B Y A mna166 Fig 3. Logic diagram (logic driver). 7. Pinning information 7.1 Pinning 1A 1B 2Y GND 1 2 3 4 mna732 8 VCC 1Y 2B 2A 32 7 6 5 Fig 4. Pin configuration. 7.2 Pin description Table 4: Pin 1 2 3 4 5 6 7 8 Pin description Symbol 1A 1B 2Y GND 2A 2B 1Y VCC Description data input data input data output ground (0 V) data input data input data output supply voltage 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 3 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate 8. Functional description 8.1 Function table Table 5: Input nA L L H H [1] H = HIGH voltage level; L = LOW voltage level. Function table [1] Output nB L H L H nY L H H H 9. Limiting values Table 6: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol VCC VI IIK IOK IO ICC, IGND Tstg Ptot [1] Parameter supply voltage input voltage Conditions Min −0.5 −0.5 [1] Max +7.0 +7.0 −20 ±20 ±25 ±75 +150 250 Unit V V mA mA mA mA °C mW input diode current VI < −0.5 V output diode current output source or sink current VCC or GND current storage temperature power dissipation Tamb = −40 °C to +125 °C VO < −0.5 V or VO > VCC + 0.5 V VO > −0.5 V or VO < VCC + 0.5 V −65 - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 10. Recommended operating conditions Table 7: Symbol VCC VI VO Tamb Recommended operating operations Parameter supply voltage input voltage output voltage operating ambient temperature see Section 11 and Section 12 per device Conditions Min 2.0 0 0 −40 Typ 5.0 +25 Max 5.5 5.5 VCC +125 Unit V V V °C Type 74AHC2G 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 4 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Table 7: Symbol tr, tf Recommended operating operations …continued Parameter input rise and fall times Conditions VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V Min 4.5 0 0 see Section 11 and Section 12 per device VCC = 5 V ± 0.5 V −40 Typ 5.0 +25 Max 100 20 5.5 5.5 VCC +125 20 Unit ns/V ns/V V V V °C ns/V Type 74AHCT2G VCC VI VO Tamb tr, tf supply voltage input voltage output voltage operating ambient temperature input rise and fall times 11. Static characteristics Table 8: Static characteristics type 74AHC2G32 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V ILI ICC CI input leakage current quiescent supply current input capacitance VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 0 0 0 1.5 0.1 0.1 0.1 0.36 0.36 0.1 1.0 10 V V V V V µA µA pF 1.9 2.9 4.4 2.58 3.94 2.0 3.0 4.5 V V V V V 1.5 2.1 3.85 0.5 0.9 1.65 V V V V V V Parameter Conditions Min Typ Max Unit 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 5 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Table 8: Static characteristics type 74AHC2G32 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter HIGH-level input voltage Conditions VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V ILI ICC CI VIH input leakage current quiescent supply current input capacitance VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.1 0.1 0.44 0.44 1.0 10 10 V V V V V µA µA pF 1.9 2.9 4.4 2.48 3.8 V V V V V Min 1.5 2.1 3.85 Typ Max 0.5 0.9 1.65 Unit V V V V V V Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C HIGH-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VIL LOW-level input voltage VCC = 2.0 V VCC = 3.0 V VCC = 5.5 V VOH HIGH-level output voltage VI = VIH or VIL IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V 1.9 2.9 4.4 2.40 3.70 V V V V V 1.5 2.1 3.85 0.5 0.9 1.65 V V V V V V 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 6 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Table 8: Static characteristics type 74AHC2G32 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V ILI ICC CI input leakage current quiescent supply current input capacitance VI = VCC or GND; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.1 0.1 0.55 0.55 2.0 40 10 V V V V V µA µA pF Min Typ Max Unit Table 9: Static characteristics type 74AHCT2G32 At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Tamb = 25 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −50 µA; VCC = 4.5 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V IO = 8.0 mA; VCC = 4.5 V ILI ICC ∆ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −50 µA; VCC = 4.5 V IO = −8.0 mA; VCC = 4.5 V 4.4 3.8 V V VI = VIH or VIL; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V 0 0.1 0.36 0.1 1.0 1.35 V V µA µA mA 4.4 3.94 4.5 V V 2.0 0.8 V V Parameter Conditions Min Typ Max Unit CI VIH VIL VOH 2.0 - 1.5 - 10 0.8 pF V V Tamb = −40 °C to +85 °C 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 7 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Table 9: Static characteristics type 74AHCT2G32 …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VOL Parameter LOW-level output voltage Conditions VI = VIH or VIL IO = 50 µA; VCC = 4.5 V IO = 8.0 mA; VCC = 4.5 V ILI ICC ∆ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V VI = VIH or VIL IO = −50 µA; VCC = 4.5 V IO = −8.0 mA; VCC = 4.5 V VOL LOW-level output voltage VI = VIH or VIL IO = 50 µA; VCC = 4.5 V IO = 8.0 mA; VCC = 4.5 V ILI ICC ∆ICC input leakage current quiescent supply current additional quiescent supply current per input pin input capacitance VI = VIH or VIL; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.55 2.0 40 1.5 V V µA µA mA 4.4 3.70 V V VI = VIH or VIL; VCC = 5.5 V VI = VCC or GND; IO = 0 A; VCC = 5.5 V VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V 0.1 0.44 1.0 10 1.5 V V µA µA mA Min Typ Max Unit CI VIH VIL VOH 2.0 - - 10 0.8 pF V V Tamb = −40 °C to +125 °C CI - - 10 pF 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 8 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate 12. Dynamic characteristics Table 10: Dynamic characteristics type 74AHC2G32 At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 6. Symbol tPHL, tPLH Parameter propagation delay nA and nB to nY Conditions see Figure 5 VCC = 3.0 V to 3.6 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 3.0 V to 3.6 V; CL = 50 pF VCC = 4.5 V to 5.5 V; CL = 50 pF CPD power dissipation capacitance propagation delay nA and nB to nY CL = 50 pF; fi = 1 MHz [3] [4] [1] [2] Min Typ Max Unit Tamb = 25 °C 4.4 3.2 6.3 4.6 16 7.9 5.5 11.4 7.5 ns ns ns ns pF Tamb = −40 °C to +85 °C tPHL, tPLH see Figure 5 VCC = 3.0 V to 3.6 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 3.0 V to 3.6 V; CL = 50 pF VCC = 4.5 V to 5.5 V; CL = 50 pF Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 5 VCC = 3.0 V to 3.6 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 3.0 V to 3.6 V; CL = 50 pF VCC = 4.5 V to 5.5 V; CL = 50 pF [1] [2] [3] Typical values are measured at VCC = 3.3 V. Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. The condition is VI = GND to VCC. 1.0 1.0 1.0 1.0 - 9.5 6.5 13.0 8.5 ns ns ns ns 1.0 1.0 1.0 1.0 - 10.0 7.0 14.5 9.5 ns ns ns ns [4] 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 9 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate Table 11: Dynamic characteristics type 74AHCT2G32 At recommended operating conditions; voltages are referenced to GND (ground = 0 V); tr = tf ≤ 3.0 ns; see Figure 6. Symbol tPHL, tPLH Parameter propagation delay nA and nB to nY Conditions see Figure 5 VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 50 pF CPD power dissipation capacitance propagation delay nA and nB to nY CL = 50 pF; fi = 1 MHz [1] [1] [2] [3] Min Typ Max Unit Tamb = 25 °C 3.3 4.8 17 6.9 7.9 ns ns pF Tamb = −40 °C to +85 °C tPHL, tPLH see Figure 5 VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 50 pF Tamb = −40 °C to +125 °C tPHL, tPLH propagation delay nA and nB to nY see Figure 5 VCC = 4.5 V to 5.5 V; CL = 15 pF VCC = 4.5 V to 5.5 V; CL = 50 pF [1] [2] Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. The condition is VI = GND to VCC. 1.0 1.0 - 8.0 9.0 ns ns 1.0 1.0 - 9.0 10.0 ns ns [3] 13. Waveforms VI nA, nB input GND t PHL VOH nY output VOL VM mna224 VM t PLH 74AHC2G32: VM = 0.5 x VCC; VI = GND to VCC. 74AHCT2G32: input VM = 1.5 V and output VM = 0.5 x VCC; VI = GND to 3.0 V. Fig 5. The input (nA and nB) to output (nY) propagation delays. 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 10 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate VCC PULSE GENERATOR VI D.U.T. RT CL mna101 VO Definitions for test circuit: CL = Load capacitance including jig and probe capacitance (See Section 12 for the value). RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. Fig 6. Load circuitry for switching times. 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 11 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate 14. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 D E A X c y HE vMA Z 8 5 A pin 1 index A2 A1 (A3) Lp L θ 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 θ 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 Fig 7. Package outline TSSOP8 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 12 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E A X c y HE vMA Z 8 5 Q A pin 1 index A2 A1 (A3) θ Lp L 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 θ 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 Fig 8. Package outline VSSOP8 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 13 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate 15. Revision history Table 12: Revision history Release date 20040223 Data sheet status Product data Change notice Order number 9397 750 12532 Supersedes Document ID 74AHC_AHCT2G32_1 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 14 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate 16. Data sheet status Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). III Product data Production [1] [2] [3] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 17. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 18. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 19. Contact information For additional information, please visit http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com 9397 750 12532 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 01 — 23 February 2004 15 of 16 Philips Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 8.1 9 10 11 12 13 14 15 16 17 18 19 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 9 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information . . . . . . . . . . . . . . . . . . . . 15 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 23 February 2004 Document order number: 9397 750 12532 Published in The Netherlands