74AHC3G14DP

74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger Rev. 04 — 5 May 2009 Product data sheet 1. General description 74AHC3G14 and 74AHCT3G14 are high-speed Si-gate CMOS devices. They provide an inverting buffer function with Schmitt trigger action. These devices are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features I Symmetrical output impedance I High noise immunity I ESD protection: N HBM JESD22-A114E exceeds 2000 V N MM JESD22-A115-A exceeds 200 V N CDM JESD22-C101C exceeds 1000 V I Low power dissipation I Balanced propagation delays I Multiple package options I Specified from −40 °C to +125 °C 3. Applications I Wave and pulse shaper for highly noisy environment I Astable multivibrator I Monostable multivibrator NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 4. Ordering information Table 1. Ordering information Package Temperature range Name 74AHC3G14DP 74AHCT3G14DP 74AHC3G14DC 74AHCT3G14DC 74AHC3G14GD 74AHCT3G14GD −40 °C to +125 °C XSON8U −40 °C to +125 °C VSSOP8 −40 °C to +125 °C TSSOP8 Description plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm Version SOT505-2 Type number plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm plastic extremely thin small outline package; no leads; SOT996-2 8 terminals; UTLP based; body 3 × 2 × 0.5 mm 5. Marking Table 2. Marking codes Marking code[1] A14 C14 A14 C14 A14 C14 Type number 74AHC3G14DP 74AHCT3G14DP 74AHC3G14DC 74AHCT3G14DC 74AHC3G14GD 74AHCT3G14GD [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram 1A 1Y 3Y 3A 2A 2Y A 001aah729 Y mna025 001aah728 Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one Schmitt trigger) 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 2 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 7. Pinning information 7.1 Pinning 74AHC3G14 74AHCT3G14 1A 1 2 3 4 8 7 6 5 VCC 1Y 3A 2Y 74AHC3G14 74AHCT3G14 1A 3Y 2A GND 1 2 3 4 001aai259 3Y 8 7 6 5 VCC 1Y 3A 2Y 2A GND 001aai260 Transparent top view Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) Fig 5. Pin configuration SOT996-2 (XSON8U) 7.2 Pin description Table 3. Symbol 1A, 2A, 3A GND 1Y, 2Y, 3Y VCC Pin description Pin 1, 3, 6 4 7, 5, 2 8 Description data input ground (0 V) data output supply voltage 8. Functional description Table 4. Input nA L H [1] H = HIGH voltage level; L = LOW voltage level Function table [1] Output nY H L 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 3 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI IIK IOK IO ICC IGND Tstg Ptot [1] [2] Parameter supply voltage input voltage input clamping current output clamping current output current supply current ground current storage temperature total power dissipation Conditions Min −0.5 −0.5 Max +7.0 +7.0 ±20 ±25 75 +150 250 Unit V V mA mA mA mA mA °C mW VI < −0.5 V VO < −0.5 V or VO > VCC + 0.5 V −0.5 V < VO < VCC + 0.5 V [1] −20 −75 −65 Tamb = −40 °C to +125 °C [2] - The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP8 package: above 55 °C the value of Ptot derates linearly at 2.5 mW/K. For VSSOP8 package: above 110 °C the value of Ptot derates linearly at 8 mW/K. For XSON8U packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K. 10. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC VI VO Tamb supply voltage input voltage output voltage ambient temperature Conditions Min 2.0 0 0 −40 74AHC3G14 Typ 5.0 +25 Max 5.5 5.5 VCC +125 4.5 0 0 −40 74AHCT3G14 Min Typ 5.0 +25 Max 5.5 5.5 VCC +125 V V V °C Unit 11. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 74AHC3G14 VOH HIGH-level VI = VT+ or VT− output voltage IO = −50 µA; VCC = 2.0 V IO = −50 µA; VCC = 3.0 V IO = −50 µA; VCC = 4.5 V IO = −4.0 mA; VCC = 3.0 V IO = −8.0 mA; VCC = 4.5 V 1.9 2.9 4.4 2.58 3.94 2.0 3.0 4.5 1.9 2.9 4.4 2.48 3.8 1.9 2.9 4.4 2.40 3.70 V V V V V Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 4 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter VOL Conditions Min LOW-level VI = VT+ or VT− output voltage IO = 50 µA; VCC = 2.0 V IO = 50 µA; VCC = 3.0 V IO = 50 µA; VCC = 4.5 V IO = 4.0 mA; VCC = 3.0 V IO = 8.0 mA; VCC = 4.5 V II ICC CI input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V 25 °C Typ 0 0 0 1.5 Max 0.1 0.1 0.1 0.36 0.36 0.1 1.0 10 −40 °C to +85 °C −40 °C to +125 °C Unit Min Max 0.1 0.1 0.1 0.44 0.44 1.0 10 10 Min Max 0.1 0.1 0.1 0.55 0.55 2.0 40 10 V V V V V µA µA pF supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V input capacitance HIGH-level VI = VT+ or VT−; VCC = 4.5 V output voltage IO = −50 µA IO = −8.0 mA LOW-level VI = VT+ or VT−; VCC = 4.5 V output voltage IO = 50 µA IO = 8.0 mA input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V 74AHCT3G14 VOH 4.4 3.94 4.5 0 0.1 0.36 0.1 1.0 1.35 4.4 3.8 0.1 0.44 1.0 10 1.5 4.4 3.70 0.1 0.55 2.0 40 1.5 V V V V µA µA mA VOL II ICC ∆ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V input capacitance CI - 1.5 10 - 10 - 10 pF 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 5 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 11.1 Transfer characteristics Table 8. Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). See Figure 8 and Figure 9. Symbol Parameter 74AHC3G14 VT+ positive-going threshold voltage negative-going threshold voltage hysteresis voltage VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V VCC = 3.0 V VCC = 4.5 V VCC = 5.5 V 74AHCT3G14 VT+ positive-going threshold voltage negative-going threshold voltage hysteresis voltage VCC = 4.5 V VCC = 5.5 V VCC = 4.5 V VCC = 5.5 V VCC = 4.5 V VCC = 5.5 V 0.5 0.6 0.4 0.4 2.0 2.0 1.4 1.6 0.5 0.6 0.4 0.4 2.0 2.0 1.4 1.6 0.5 0.6 0.35 0.35 2.0 2.0 1.4 1.6 V V V V V V 0.9 1.35 1.65 0.3 0.4 0.5 2.2 3.15 3.85 1.2 1.4 1.6 0.9 1.35 1.65 0.3 0.4 0.5 2.2 3.15 3.85 1.2 1.4 1.6 0.9 1.35 1.65 0.25 0.35 0.45 2.2 3.15 3.85 1.2 1.4 1.6 V V V V V V V V V Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max VT− VH VT− VH 12. Dynamic characteristics Table 9. Dynamic characteristics GND = 0 V; tr = tf ≤ 3.0 ns; for test circuit see Figure 7. Symbol Parameter 74AHC3G14 tpd propagation delay nA to nY; see Figure 6 VCC = 3.0 V to 3.6 V CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD power per buffer; dissipation CL = 50 pF; fi = 1 MHz; capacitance VI = GND to VCC [4] [3] [1] [2] Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max - 4.2 6.0 3.2 4.6 10 12.8 16.3 8.6 10.6 - 1.0 1.0 1.0 1.0 - 15.0 18.5 10.0 12.0 - 1.0 1.0 1.0 1.0 - 16.5 20.5 11.0 13.5 - ns ns ns ns pF 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 6 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger Table 9. Dynamic characteristics …continued GND = 0 V; tr = tf ≤ 3.0 ns; for test circuit see Figure 7. Symbol Parameter 74AHCT3G14 tpd propagation delay nA to nY; VCC = 4.5 V to 5.5 V CL = 15 pF CL = 50 pF CPD power per buffer; dissipation CL = 50 pF; fi = 1 MHz; capacitance VI = GND to VCC tpd is the same as tPLH and tPHL. Typical values are measured at VCC = 3.3 V. Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation PD (µW). PD = CPD × VCC2 × fi + Σ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; Σ(CL × VCC2 × fo) = sum of the outputs. [4] [1] [3] Conditions Min 25 °C Typ Max −40 °C to +85 °C −40 °C to +125 °C Unit Min Max Min Max - 4.1 5.9 12 7.0 8.5 - 1.0 1.0 - 8.0 10.0 - 1.0 1.0 - 9.0 11.0 - ns ns pF [1] [2] [3] [4] 13. Waveforms A input VM VCC tPHL tPLH PULSE GENERATOR VI DUT RT CL VO Y output VM mna033 mna101 The test data is given in Table 10 Test data is given in Table 10. Definitions for test circuit: CL = Load capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. The input (nA) to output (nY) propagation delays Test data Input VI Fig 7. Load circuit for measuring switching times Table 10. Type number 74AHC3G14 74AHCT3G14 Output VM 0.5 × VCC 1.5 V VM 0.5 × VCC 0.5 × VCC © NXP B.V. 2009. All rights reserved. GND to VCC GND to 3.0 V 74AHC_AHCT3G14_4 Product data sheet Rev. 04 — 5 May 2009 7 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 13.1 Transfer characteristic waveforms VO VI VT+ VT− VH VH VT− VT+ VI mna026 VO mna027 Fig 8. Transfer characteristic Fig 9. The definitions of VT+, VT− and VH 1.5 ICC (mA) mna401 5 ICC (mA) 4 mna402 1 3 2 0.5 1 0 0 1 2 VI (V) 0 3 0 1 2 3 4 V (V) 5 I VCC = 3.0 V. VCC = 4.5 V. Fig 10. Typical 74AHC3G14 transfer characteristics Fig 11. Typical 74AHC3G14 transfer characteristics 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 8 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 8 ICC (mA) mna403 6 4 2 0 0 2 4 VI (V) 6 VCC = 5.5 V. Fig 12. Typical 74AHC3G14 transfer characteristics 5 ICC (mA) mna404 8 ICC (mA) mna405 4 6 3 4 2 2 1 0 0 1 2 3 4 V (V) 5 I 0 0 2 4 VI (V) 6 VCC = 4.5 V. VCC = 5.5 V. Fig 13. Typical 74AHCT3G14 transfer characteristics Fig 14. Typical 74AHCT3G14 transfer characteristics 14. Application information The slow input rise and fall times cause additional power dissipation, which can be calculated using the following formula: Padd = fi × (tr × ∆ICC(AV) + tf × ∆ICC(AV)) × VCC where: Padd = additional power dissipation (µW); fi = input frequency (MHz); tr = input rise time (ns); 10 % to 90 %; 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 9 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger tf = input fall time (ns); 90 % to 10 %; ∆ICC(AV) = average additional supply current (µA). ∆ICC(AV) differs with positive or negative input transitions, as shown in Figure 15 and Figure 16. For 74AHC3G14 and 74AHCT3G14 used in relaxation oscillator circuit, see Figure 17. Note to the application information: 1. All values given are typical unless otherwise specified. 200 ∆ICC(AV) (µA) 150 mna036 200 ∆ICC(AV) (µA) 150 mna058 positive-going edge 100 100 positive-going edge 50 50 negative-going edge negative-going edge 0 0 2.0 4.0 VCC (V) 6.0 0 0 2 4 VCC (V) 6 Linear change of VI between 0.1VCC to 0.9VCC Linear change of VI between 0.1VCC to 0.9VCC Fig 15. Average additional ICC for 74AHC3G14 Schmitt trigger devices Fig 16. Average additional ICC for 74AHCT3G14 Schmitt trigger devices R C mna035 For 74AHC3G14: f = -- ≈ -----------------------For 74AHCT3G14: f = -- ≈ ------------------------ 1 T 1 0.55 × RC 1 T 1 0.60 × RC Fig 17. Relaxation oscillator using the 74AHC3G14 and 74AHCT3G14 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 10 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 15. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 D E A X c y HE vMA Z 8 5 A pin 1 index A2 A1 (A3) Lp L θ 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.00 A2 0.95 0.75 A3 0.25 bp 0.38 0.22 c 0.18 0.08 D(1) 3.1 2.9 E(1) 3.1 2.9 e 0.65 HE 4.1 3.9 L 0.5 Lp 0.47 0.33 v 0.2 w 0.13 y 0.1 Z(1) 0.70 0.35 θ 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC --JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 Fig 18. Package outline SOT505-2 (TSSOP8) 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 11 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E A X c y HE vMA Z 8 5 Q A pin 1 index A2 A1 (A3) θ Lp L 1 e bp 4 wM detail X 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1 A1 0.15 0.00 A2 0.85 0.60 A3 0.12 bp 0.27 0.17 c 0.23 0.08 D(1) 2.1 1.9 E(2) 2.4 2.2 e 0.5 HE 3.2 3.0 L 0.4 Lp 0.40 0.15 Q 0.21 0.19 v 0.2 w 0.13 y 0.1 Z(1) 0.4 0.1 θ 8° 0° Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT765-1 REFERENCES IEC JEDEC MO-187 JEITA EUROPEAN PROJECTION ISSUE DATE 02-06-07 Fig 19. Package outline SOT765-1 (VSSOP8) 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 12 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger XSON8U: plastic extremely thin small outline package; no leads; 8 terminals; UTLP based; body 3 x 2 x 0.5 mm SOT996-2 D B A E A A1 detail X terminal 1 index area e1 L1 1 e b 4 v w M M CAB C C y1 C y L2 L 8 5 X 0 1 scale 2 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max 0.5 A1 0.05 0.00 b 0.35 0.15 D 2.1 1.9 E 3.1 2.9 e 0.5 e1 1.5 L 0.5 0.3 L1 0.15 0.05 L2 0.6 0.4 v 0.1 w 0.05 y 0.05 y1 0.1 OUTLINE VERSION SOT996-2 REFERENCES IEC --JEDEC JEITA --- EUROPEAN PROJECTION ISSUE DATE 07-12-18 07-12-21 Fig 20. Package outline SOT996-2 (XSON8U) 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 13 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 16. Abbreviations Table 11. Acronym CDM CMOS DUT ESD HBM MM TTL Abbreviations Description Charged Device Model Complementary Metal-Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 17. Revision history Table 12. Revision history Release date 20090505 Data sheet status Product data sheet Change notice Supersedes 74AHC_AHCT3G14_3 Document ID 74AHC_AHCT3G14_4 Modifications: 74AHC_AHCT3G14_3 74AHC_AHCT3G14_2 74AHC_AHCT3G14_1 • Table 7: the conditions for HIGH-level output voltage and LOW-level output voltage have been changed. Product data sheet Product specification Product specification 74AHC_AHCT3G14_2 74AHC_AHCT3G14_1 - 20080617 20041018 20031127 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 14 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 18. Legal information 18.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 18.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. 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Export might require a prior authorization from national authorities. 18.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 18.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74AHC_AHCT3G14_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 5 May 2009 15 of 16 NXP Semiconductors 74AHC3G14; 74AHCT3G14 Inverting Schmitt trigger 20. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 12 13 13.1 14 15 16 17 18 18.1 18.2 18.3 18.4 19 20 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Transfer characteristics . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Transfer characteristic waveforms. . . . . . . . . . . 8 Application information. . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Contact information. . . . . . . . . . . . . . . . . . . . . 15 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 5 May 2009 Document identifier: 74AHC_AHCT3G14_4