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548AMI-03LF

548AMI-03LF

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

    SOIC-16_9.9X3.9MM

  • 描述:

    IC CLK INVERTER/DIVIDER 16-SOIC

  • 数据手册
  • 价格&库存
548AMI-03LF 数据手册
DATASHEET ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER Description Features The ICS548A-03 is a low cost, low skew, high-performance general purpose clock designed to produce a set of one output clock, one inverted output clock, and one clock divided-by-two. Using our patented Phase-Locked Loop (PLL) techniques, the device operates from a frequency range of 10 MHz to 120 MHz in the PLL mode, and up to 160 MHz in the non-PLL mode. • • • • • • In applications that need to maintain low phase noise in the clock tree, the non-PLL (when S3=S2=1) modes should be used. Packaged in 16-pin SOIC (150 mil) Input clock up to 160 MHz in the non-PLL mode Provides clock outputs of CLK, CLK, and CLK/2 Low skew (500 ps) on CLK, CLK, and CLK/2 All outputs can be tri-stated Entire chip can be powered down by changing one or two select pins • 3.3 V operating range • Available in commercial and industrial temperature This chip is not a zero delay buffer. Many applications may be able to use the ICS527 for zero delay dividers. ranges • RoHS 5 (green) or RoHS 6 (green and lead free) compliant package Block Diagram VDD GND 2 2 CLK S3:S0 Clock input 4 Input Buffer CLK Clock Synthesis and Divider Circuitry CLK/2 OE (all outputs) IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER 1 ICS548A-03 REV C 063006 ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER Pin Assignment ICLK 1 16 DC VDD 2 15 DC VDD 3 14 DC S3 4 13 CLK GND 5 12 CLK GND 6 11 CLK/2 S2 7 10 OE S0 8 9 S1 CLK, CLK, and CLK/2 Select Table (MHz) S3 S2 S1 S0 CLK, CLK CLK/2 PLL Input Range 0 0 0 0 Low Low OFF Power Down 0 0 0 1 Input/4 Input/8 ON 30 - 120 0 0 1 0 Input Input/2 ON 20 - 40 0 0 1 1 Input/2 Input/4 ON 20 - 80 0 1 0 0 Low Low OFF Power Down 0 1 0 1 Input x 2 Input ON 10 - 20 0 1 1 0 Input/5 Input/10 ON 40 - 120 0 1 1 1 Input/3 Input/6 ON 25 - 120 1 0 0 0 Low Low OFF Power Down 1 0 0 1 Input/4 Input/8 ON 30 - 120 1 0 1 0 Input Input/2 ON 20 - 40 1 0 1 1 Input/2 Input/4 ON 20 - 80 1 1 0 0 Low Low OFF Power Down 1 1 0 1 Input/6 Input/12 OFF 0 - 160 1 1 1 0 Input/8 Input/16 OFF 0 - 160 1 1 1 1 Input/2 Input/4 OFF 0 - 80 IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER 2 ICS548A-03 REV C 063006 ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER Pin Descriptions Pin Number Pin Name Pin Type Pin Description 1 ICLK Input Clock input. 2 VDD Power Connect to 3.3 V. 3 VDD Power Connect to 3.3 V. 4 S3 Input Clock Select 3. See table on page 2. 5 GND Power Connect to ground. 6 GND Power Connect to ground. 7 S2 Input Clock Select 2. See table on page 2. 8 S0 Input Clock Select 0. See table on page 2. 9 S1 Input Clock Select 1. See table on page 2. 10 OE Input Output Enable. Tri-states all clock outputs when low. 11 CLK/2 12 CLK Output Clock output. See table on page 2. 13 CLK Output Inverted clock output. See table on page 2. 14 DC — Don’t connect. Do not connect anything to this pin. 15 DC — Don’t connect. Do not connect anything to this pin. 16 DC — Don’t connect. Do not connect anything to this pin. Output Clock output divided by 2. See table on page 2. External Components The ICS548A-03 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01µF should be connected between pins 3 and 5, as close to the device as possible. Connect pin 2 directly to pin 3, and pin 6 directly to pin 5. A series termination resistor of 33Ω should be used on all clock outputs, as close to the device as possible. Leave any unused clock outputs floating. There are no pull-up resistors on the input pins, and they may be connected directly to VDD or ground. IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER 3 ICS548A-03 REV C 063006 ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS548A-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD (referenced to GND) -0.5 V to 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial) 0 to +70° C Ambient Operating Temperature (industrial) -40 to +85° C Storage Temperature -65 to +150° C Junction Temperature 150° C Soldering Temperature 260° C Recommended Operation Conditions Parameter Min. Max. Units 0 +70 °C -40 +85 °C +3.13 +3.47 V Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Power Supply Voltage (measured in respect to GND) Typ. DC Electrical Characteristics VDD = 3.3 V, Ambient temperature -40° C to +85° C , unless stated otherwise Parameter Symbol Conditions Min. Typ. 3.13 Max. Units 3.47 V Operating Voltage VDD Input High Voltage VIH ICLK only (pin 1) Input Low Voltage VIL ICLK only (pin 1) Input High Voltage VIH All other inputs Input Low Voltage VIL All other inputs Output High Voltage, CMOS level VOH IOH = -8 mA VDD-0.4 V Output High Voltage VOH IOH = -12 mA 2.4 V Output Low Voltage VOL IOL = 12 mA Operating Supply Current, 100 MHz clock IDD S3=S2=S0=0, S1=1 20 mA Short Circuit Current IOS Each output ±50 mA Input Capacitance CIN All inputs 5 pF IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER (VDD/2)+1 VDD/2 VDD/2 V (VDD/2)-1 2 V 0.8 0.4 4 V ICS548A-03 V V REV C 063006 ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER AC Electrical Characteristics VDD = 3.3 V, Ambient Temperature -40 to +85° C, unless stated otherwise Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency, clock input, PLL on fIN 10 120 MHz Input Frequency, clock input, PLL off fIN 0 160 MHz Output Frequency (see table on page 2) fOUT Mode dependent 0 120 MHz Output Clock Rise Time tOR 0.8 to 2.0 V 0.84 ns Output Clock Fall Time tOF 2.0 to 0.8 V 0.74 ns Output Clock Duty Cycle tDC At VDD/2 55 % Output Enable Time, OE high to output on 50 ns Output Disable Time, OE to tri-state 50 ns Absolute Clock Period Jitter. PLL modes 45 Deviation from mean One Sigma Clock Period Jitter, PLL modes Output clock skew for CLK, CLK, or CLK/2 50 150 ps 60 ps At VDD/2 850 ps Note 1: The phase relationship between input and output clocks can change at power up. Use the ICS570 or ICS527 Zero Delay Buffers for a guaranteed phase relationship. Thermal Characteristics Parameter Symbol Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER Conditions Min. Typ. Max. Units θJA Still air 120 ° C/W θJA 1 m/s air flow 115 ° C/W θJA 3 m/s air flow 105 ° C/W 58 ° C/W θJC 5 ICS548A-03 REV C 063006 ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 16 Millimeters Symbol E Min A A1 B C D E e H h L α H INDEX AREA 1 2 D A Inches Max Min 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 9.80 10.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .3859 .3937 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature 548AM-03LF 548AM-03LFT 548AMI-03LF 548AMI-03LFT 548AM-03LF 548AM-03LF 548AMI03LF 548AMI03LF Tubes Tape and Reel Tubes Tape and Reel 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. IDT™ / ICS™ LOW SKEW CLOCK INVERTER AND DIVIDER 6 ICS548A-03 REV C 063006 ICS548A-03 LOW SKEW CLOCK INVERTER AND DIVIDER CLOCK DIVIDER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales For Tech Support 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Asia Pacific and Japan Europe Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) Integrated Device Technology Singapore (1997) Pte. Ltd. Reg. No. 199707558G 435 Orchard Road #20-03 Wisma Atria Singapore 238877 +65 6 887 5505 IDT Europe, Limited Prime House Barnett Wood Lane Leatherhead, Surrey United Kingdom KT22 7DE +44 1372 363 339 © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, or other requirements. These resources are subject to change without notice. Renesas grants you permission to use these resources only for development of an application that uses Renesas products. Other reproduction or use of these resources is strictly prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property. Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims, damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources expands or otherwise alters any applicable warranties or warranty disclaimers for these products. (Rev.1.0 Mar 2020) Corporate Headquarters Contact Information TOYOSU FORESIA, 3-2-24 Toyosu, Koto-ku, Tokyo 135-0061, Japan www.renesas.com For further information on a product, technology, the most up-to-date version of a document, or your nearest sales office, please visit: www.renesas.com/contact/ Trademarks Renesas and the Renesas logo are trademarks of Renesas Electronics Corporation. All trademarks and registered trademarks are the property of their respective owners. © 2020 Renesas Electronics Corporation. All rights reserved.
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