DATASHEET
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
Description
Features
The ICS650-40 is a clock chip designed for use in Ethernet
Switch applications. Using IDT’ patented Phase-Locked
Loop (PLL) techniques, the device takes a 25 MHz crystal
input and produces various output clock frequencies as
listed in Output Select Table.
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•
•
•
•
•
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Packaged in 16-pin TSSOP
Available in Pb (lead) free package
Operating voltage of 3.3 V
Low power consumption
Input frequency of 25 MHz
Low long-term jitter
2.5 V to 3.3 V clock outputs
NOTE: EOL for non-green parts to occur on
5/13/10 per PDN U-09-01
Block Diagram
VDD
3
S1:S0
2
VDDOA
Control
Logic
CLKA
Phase Lock Loop
CLKB
X1/ICLK
25 MHz
crystal or clock X2
Clock
Buffer/
Crystal
Oscillator
Optional tuning crystal
capacitors
IDT™ / ICS™ ETHERNET SWITCH CLOCK SOURCE
4
GND
1
OE
VDDOB
ICS650-40
REV D 102709
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
CLOCK SYNTHESIZER
Pin Assignment
Output Select Table (MHz)
X1/ICLK
1
16
X2
VDD
2
15
GND
GND
3
14
OE
VDDOA
4
13
GND
CLKA
5
12
VDD
CLKB
6
11
VDD
VDDOB
7
10
S1
GND
8
9
S0
S1
S0
CLKA
(MHz)
CLKB
(MHz)
0
0
127
127
0
1
133
133
1
0
157
157
1
1
189
189
16-pin (173 mil) TSSOP
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
X1/ICLK
Input
Crystal or clock input. Connect to a 25 MHz crystal or single ended clock.
2
VDD
Power
Connect to +3.3 V.
3
GND
Power
Connect to ground.
4
VDDOA
Power
Connect to +2.5 V or +3.3 V. For clock output buffer A only.
5
CLKA
Output
Clock A output with weak pull-down resistor.
6
CLKB
Output
Clock B output with weak pull-down resistor.
7
VDDOB
Power
Connect to +2.5 V or +3.3 V. For clock output buffer B only.
8
GND
Power
Connect to ground.
9
S0
Input
Select pin 0.
10
S1
Input
Select pin 1.
11
VDD
Power
Connect to +3.3 V.
12
VDD
Power
Connect to +3.3 V.
13
GND
Power
Connect to ground.
14
OE
Input
Output enable tri-states outputs and device is not shut down. Internal
pull-up resistor.
15
GND
Power
Connect to ground.
16
X2
Output
Crystal connection. Leave unconnected for clock input.
IDT™ / ICS™ ETHERNET SWITCH CLOCK SOURCE
2
ICS650-40
REV D 102709
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
CLOCK SYNTHESIZER
External Components
A minimum number of external components are required for proper operation. Decoupling capacitors of 0.01 µF
should be connected between VDD and GND pairs. The capacitors should be placed between pins VDD and GND,
and VDDO and GND, as close to the device as possible. A 33Ω series terminating resistor should be used on each
clock output if the trace is longer than 1 inch. A 25 MHz fundamental mode parallel resonant crystal should be used
with CL=18 pF.
On chip capacitors. On Chip capacitors are used for a 18 pF load crystal. Small 2 to 3 pf trimming capacitors are
used from pins X1 to ground and X2 to ground to optimize the initial accuracy.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS650-40. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
0 to +70° C
Storage Temperature
-65 to +150° C
Junction Temperature
125° C
Soldering Temperature
260° C
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
IDT™ / ICS™ ETHERNET SWITCH CLOCK SOURCE
3
Typ.
Max.
Units
0
+70
°C
+3.15
+3.45
V
ICS650-40
REV D 102709
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
CLOCK SYNTHESIZER
DC Electrical Characteristics
Unless otherwise specified, VDD=3.3 V ±5%, Ambient Temperature 0 to +70° C
Parameter
Operating Voltage
Symbol
Conditions
Min.
Typ.
Max.
Units
VDD
3.15
3.45
V
Output Operating Voltage
VDDOA,
B
2.375
3.45
V
Input High Voltage, ICLK
VIH
Note 1
Input Low Voltage, ICLK
VIL
Note 1
Input High Voltage, S1:S0:OE
VIH
Input Low Voltage, S1:S0:OE
VIL
Output High Voltage
VOH
IOH = -12 mA
Output Low Voltage
VOL
IOL = 12 mA
Operating Supply Current
IDD
No load
40
mA
No load
16
mA
Each output
±35
mA
IDD at Output Disable
Condition(OE low)
Short Circuit Current
IOS
VDD/2+0.5
V
VDD/2-0.5
V
VDD
V
0.4
V
2
2
V
0.4
V
Internal Pull-up Resistor
RPUP
OE pin
250
kΩ
Internal Pull-down Resistor
RPD
CLK outputs
525
kΩ
Note: 1. Nominal switching threshold is VDD/2.
AC Electrical Characteristics
, VDD = 3.3 V ±5%, VDDO = 2.5 - 3.3 V ±5%, CL=10 pF Ambient Temperature 0 to +70° C
Parameter
Symbol
Conditions
Min.
Input Frequency
Typ.
Max. Units
25
MHz
Output Rise Time
tOR
20% to 80% of VDD
1.6
ns
Output Fall Time
tOF
80% to 20% of VDD
1.6
ns
Output Clock Duty Cycle
at VDD/2
Frequency Error
all clocks
40
49-51
0
Output to Output Skew
between clocks of the same
frequency
Absolute Jitter, Short-term
P-P
variation from mean
Absolute Jitter, Short-term
C-C
Long-term Jitter
IDT™ / ICS™ ETHERNET SWITCH CLOCK SOURCE
1000 clock cycles
4
60
%
ppm
250
ps
±100
±200
ps
200
400
ps
250
400
ps
ICS650-40
REV D 102709
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
CLOCK SYNTHESIZER
Thermal Characteristics (16-pin TSSOP)
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Symbol
Typ.
Max. Units
Still air
78
° C/W
θ JA
1 m/s air flow
70
° C/W
θ JA
3 m/s air flow
68
° C/W
37
° C/W
θ JC
Marking Diagram
16
9
9
ICS 650G40LF
ICS 650G-40
######
YYWW
######
YYWW
1
Min.
θ JA
Marking Diagram
16
Conditions
1
8
8
Notes:
1. ###### is the lot code.
2. YYWW is the last two digits of the year, and the week number that the part was assembled.
3. “LF” designates Pb (lead ) free package.
4. Bottom marking: (origin). Origin = country of origin if not USA.
IDT™ / ICS™ ETHERNET SWITCH CLOCK SOURCE
5
ICS650-40
REV D 102709
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
CLOCK SYNTHESIZER
Package Outline and Package Dimensions (16-pin TSSOP, 173 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
16
Symbol
Index
Area
E1
E
IN D EX
AR EA
1
Pin 1
E
H
Max
--
1.20
--
0.047
0.05
0.15
0.002
0.006
A2
0.80
1.05
0.032
0.041
b
0.19
0.30
0.007
0.012
C
0.09
0.20
0.0035
0.008
D
4.90
5.1
0.193
0.201
6.40 BASIC
4.30
e
A
2
Min
A
E1
DD
Max
A1
E
2
Min
Inches
0.252 BASIC
4.50
0.169
0.65 Basic
0.177
0.0256 Basic
L
0.45
0.75
0.018
0.030
α
0°
8°
0°
8°
aaa
--
0.10
--
0.004
A
A
1
c
A
-C -
a
c
e
e
b
b
S E A T IN G
P LA N E
L
L
aaa C
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
650G-40*
See Page 6
Tubes
16-pin TSSOP
0 to +70° C
Tape and Reel
16-pin TSSOP
0 to +70° C
Tubes
16-pin TSSOP
0 to +70° C
Tape and Reel
16-pin TSSOP
0 to +70° C
650G-40T*
650G-40LF
See Page 6
650G-40LFT
*NOTE: EOL for non-green parts to occur on 5/13/10 per PDN U-09-01
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT™ / ICS™ ETHERNET SWITCH CLOCK SOURCE
6
ICS650-40
REV D 102709
ICS650-40
ETHERNET SWITCH CLOCK SOURCE
CLOCK SYNTHESIZER
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
For Tech Support
800-345-7015
408-284-8200
Fax: 408-284-2775
www.idt.com/go/clockhelp
Corporate Headquarters
Integrated Device Technology, Inc.
www.idt.com
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered
trademarks used to identify products or services of their respective owners.
Printed in USA
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