ISL36411DRZ-TS

DATASHEET ISL36411 FN6965 Rev 2.00 Jun 21, 2016 Quad Lane Extender The ISL36411 is a quad receive-side equalizer with extended functionality for advanced protocols operating with line rates up to 11.1Gbps. It integrates a driver/limiting amplifier with a programmable equalizer to compensate for the frequency dependent attenuation of PCB traces and twin-axial cables. The ISL36411 is capable of extending signal reach up to 10m on 28AWG cable. Supported protocols include 4k/8k video capable DisplayPort v1.3 (HBR1/2/3), USB 3.1 Gen 2 at 10Gbps. InfiniBand (QDR), 40G Ethernet (40GBASECR4/SR4), and 10G SFP+ specification (SFF-8431). The small form factor, highly-integrated quad design is ideal for high-density data transmission applications including active copper cable assemblies. The four equalizing filters within the ISL36411 can each be set to provide optimal signal fidelity for a given media and length. The compensation level for the filters is set by two external control pins. Operating on a single 1.2V power supply, the ISL36411 enables per channel throughputs of up to 11.1Gbps while passing USB3.x LFPS signals as low as 100kHz. High data rates are achieved by using Current Mode Logic (CML) inputs and outputs and is packaged in a 4mmx7mm 46 Ld QFN. Individual lane LOS support is included for module applications. Related Literature Features • Supports four channels with data rates up to 11.1Gbps • Low power (~110mW per channel) • Low latency (6GHz BANDWIDTH) NOTES: 16. See “Control Pin Boost Setting” on page 8 for information on how to connect the CP pins. 17. See “Detection Thereshold (DT) Pin Functionality” on page 9 for details on DT pin operation. FIGURE 7. TYPICAL APPLICATION REFERENCE SCHEMATIC © Copyright Intersil Americas LLC 2010-2016. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6965 Rev 2.00 Jun 21, 2016 Page 10 of 12 ISL36411 About Q:ACTIVE Technology Intersil has long realized that to enable the complex server clusters of next generation data centers, it is critical to manage the signal integrity issues of electrical interconnects. To address this, Intersil has developed its groundbreaking Q:ACTIVE™ product line. By integrating its analog ICs inside cabling interconnects, Intersil is able to achieve unsurpassed improvements in reach, power consumption, latency and cable gauge size as well as increased airflow in tomorrow’s data centers. This new technology transforms passive cabling into intelligent “roadways” that yield lower operating expenses and capital expenditures for the expanding data center. Intersil Lane Extenders allow greater reach over existing cabling while reducing the need for thicker cables. This significantly reduces cable weight and clutter, increases airflow and improves power consumption. Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE June 21, 2016 FN6965.2 Updated page 1 description of part. Added applications bullet “DisplayPort v1.3 active copper cable modules”. Removed “High-speed active cable assemblies” application bullet. Added Related Literature section on page 1. Added Table 1 on page 2. Added Note 6 on page 6 and referenced in specification tables. Replaced Products section with the About Intersil section. Updated POD L46.4x7 to the latest revision changes are as follows: -3/15/13 Side view, changed pkg thickness from 0.70+/-0.05 to 0.75+/-0.05 Detail x, changed from 0.152 REF to 0.203 REF. March 16, 2010 FN6965.1 page 5 Control pin characteristics: VOL: delete typical “0” Input current: max 200, typ 100 page 6 Output res jitter: 0.35 In Entries from Lane-to-Lane Skew all the way down, all the numbers should move to typ column Added High-Speed pins to ESD Ratings as follows to Abs Max Ratings: ESD Ratings Human Body Model High-Speed Pins 1.5kV All Other Pins 2kV Removed board footprint from page 10 due to information covered in outline drawing. February 8, 2010 FN6965.0 Initial release About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support. FN6965 Rev 2.00 Jun 21, 2016 Page 11 of 12 ISL36411 Package Outline Drawing L46.4x7 46 LEAD THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE (TQFN) Rev 1, 3/13 2.80 4.00 42X 0.40 A B 6 PIN 1 INDEX AREA 38 7.00 (4X) 46 39 6 PIN 1 INDEX AREA 1 5.50 ±0.1 Exp. DAP 5.60 15 24 0.05 46X 0.20 4 0.10 M C A B SIDE VIEW TOP VIEW 16 23 2.50 ±0.1 Exp. DAP 46X 0.40 BOTTOM VIEW SEE DETAIL "X" 0.10 C 0.75 ±0.05 C SEATING PLANE 0.05 C SIDE VIEW C 0.203 REF 5 0 . 00 MIN. 0 . 05 MAX. DETAIL "X" ( 3.80 ) ( 2.50) NOTES: ( 6.80 ) ( 5.50 ) ( 42X 0.40) 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. (46X 0.20) 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 indentifier may be either a mold or mark feature. ( 46 X 0.60) TYPICAL RECOMMENDED LAND PATTERN FN6965 Rev 2.00 Jun 21, 2016 Page 12 of 12