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RD74LVC245BFPEL

RD74LVC245BFPEL

  • 厂商:

    RENESAS(瑞萨)

  • 封装:

  • 描述:

    RD74LVC245BFPEL - Octal Bidirectional Transceivers with 3-state Outputs - Renesas Technology Corp

  • 数据手册
  • 价格&库存
RD74LVC245BFPEL 数据手册
RD74LVC245B Octal Bidirectional Transceivers with 3-state Outputs REJ03D0386–0100 Rev.1.00 Aug. 26, 2004 Description The RD74LVC245B has eight buffers with three state outputs in a 20 pin package. When (DIR) is high, data flows from the A inputs to the B outputs, and when (DIR) is low, data flows from the B inputs to the A outputs. A and B bus are separated by making enable input (OE) high level. Low voltage and high-speed operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. Features VCC = 1.65 V to 5.5 V All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All input outputs VI/O (Max.) = 5.5 V (@VCC = 0 V or output off state) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C) High output current ±4 mA (@VCC = 1.65 V) ±8 mA (@VCC = 2.3 V) ±12 mA (@VCC = 2.7 V) ±24 mA (@VCC = 3.0 V to 5.5 V) • Ordering Information Part Name RD74LVC245BFPEL RD74LVC245BTELL Package Type SOP–20 pin (JEITA) TSSOP–20 pin Package Code FP–20DAV TTP–20DAV FP T Package Abbreviation Taping Abbreviation (Quantity) EL (2,000 pcs/reel) ELL (2,000 pcs/reel) • • • • • • Function Table Inputs OE L L H H: High level L: Low level X: Immaterial Z: High impedance DIR L H X Operation B data to A bus A data to B bus Z Rev.1.00 Aug. 26, 2004 page 1 of 7 RD74LVC245B Pin Arrangement DIR 1 A1 A2 2 3 20 VCC 19 OE 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 11 B8 (Top view) A3 4 A4 5 A5 A6 A7 A8 6 7 8 9 GND 10 Absolute Maximum Ratings Item Supply voltage Input diode current Input voltage Output diode current Input / output voltage Output current VCC, GND current / pin Storage temperature Symbol VCC IIK VI IOK VI/O IO ICC or IGND Tstg –0.5 to 7.0 –50 –0.5 to 7.0 –50 50 –0.5 to VCC +0.5 –0.5 to 7.0 ±50 100 –65 to 150 mA mA °C V Ratings V mA V mA VO = –0.5 V VO = VCC +0.5 V Output "H" or "L" Output "Z" or VCC:OFF VI = –0.5 V Unit Conditions Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. Rev.1.00 Aug. 26, 2004 page 2 of 7 RD74LVC245B Recommended Operating Conditions Item Supply voltage Input / output voltage Symbol VCC VI VO Ta IOH Ratings 1.5 to 5.5 1.65 to 5.5 0 to 5.5 0 to VCC 0 to 5.5 –40 to 85 –4 –8 –12 –24 4 8 12 24 20 10 Unit V V Output "H" or "L" Output "Z" or VCC: OFF °C mA VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V VCC = 2.3 V VCC = 2.7 V VCC = 3.0 V to 5.5 V VCC = 1.65 V to 2.7 V VCC = 3.0 V to 5.5 V Conditions Data hold At operation Operating temperature Output current IOL mA Input rise / fall time *1 tr, tf ns/V Notes: 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics. Electrical Characteristics Item Input voltage Symbol VCC (V) VIH 1.65 to 1.95 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 1.65 to 1.95 VIL 2.3 to 2.7 2.7 to 3.6 4.5 to 5.5 VOH 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 VOL 1.65 to 5.5 1.65 2.3 2.7 3.0 4.5 IIN 0 to 5.5 IOFF 0 IOZ 2.7 to 5.5 ICC ∆ICC 2.7 to 3.6 2.7 to 5.5 2.7 to 3.6 Ta = –40 to 85°C Min Max VCC×0.65 — 1.7 — 2.0 — VCC×0.7 — — VCC×0.35 — 0.7 — 0.8 — VCC×0.3 VCC –0.2 — 1.2 — 1.7 — 2.2 — 2.4 — 2.2 — 3.8 — — 0.2 — 0.45 — 0.7 — 0.4 — 0.55 — 0.55 — ±5.0 — ±5.0 — ±5.0 — — — ±5.0 5.0 500 Unit V Test Conditions V Output voltage V IOH = –100 µA IOH = –4 mA IOH = –8 mA IOH = –12 mA IOH = –24 mA V IOL = 100 µA IOL = 4 mA IOL = 8 mA IOL = 12 mA IOL = 24 mA VIN = 5.5 V or GND VIN / VOUT = 5.5 V VIN = VCC, GND, VOUT = 5.5 V or GND VIN = 3.6 to 5.5 V VIN = VCC or GND VIN = one input at (VCC –0.6)V, other inputs at VCC or GND Input current Output leak current Off state output current Quiescent supply current µA µA µA µA µA Rev.1.00 Aug. 26, 2004 page 3 of 7 RD74LVC245B Switching Characteristics Ta = –40 to 85°C Item Propagation delay time Symbol tPLH tPHL VCC (V) 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Output enable time tZH tZL 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Output disable time tZH tLZ 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Between output pins skew tOSLH *1 tOSHL 1.8±0.15 2.5±0.2 2.7 3.3±0.3 5.0±0.5 Input capacitance Output capacitance Note: CIN CO 3.3 3.3 Min 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 1.5 1.0 1.0 1.0 1.0 1.7 1.0 — — — — — — — — — — — — — — — — — — — — — — — — — — — 4.0 8.0 Typ Max 12.7 8.3 7.3 6.3 4.8 15.3 10.5 9.5 8.5 7.0 17.0 9.5 8.5 7.5 6.5 — — — 1.0 1.0 — — pF pF ns ns OE A or B ns OE A or B ns Unit From (Input) A or B To (Output) B or A 1. This parameter is characterized but not tested. tosLH = | tPLHm - tPLHn|, tosHL = | tPHLm - tPHLn| Operating Characteristics Ta = 25°C Item Power dissipation capacitance Symbol CPD VCC (V) 1.8 2.5 3.3 5.0 Min     Typ 42 43 45 47 Max     pF Unit Test Conditions f = 10 MHz Rev.1.00 Aug. 26, 2004 page 4 of 7 RD74LVC245B Test Circuit VCC VCC OE See Function Table Input Pulse Generator Zout = 50 Ω Output A1 B1 CL DIR RL S1 RL S2 OPEN VTT GND Symbol t PLH / t PHL t ZH/ t HZ t ZL / t LZ S2 OPEN GND VTT Note: 1. CL includes probe and jig capacitance. Waveforms – 1 tr 90 % Input Vref 10 % t PLH Vref 90 % Vref 10 % t PHL VOH In phase output Vref VOL tf VIH GND Rev.1.00 Aug. 26, 2004 page 5 of 7 RD74LVC245B Waveforms – 2 tf OE 90 % Vref 10 % t ZL Waveform - A t ZH Waveform - B Vref Vref t HZ VOH – ∆ V tr 90 % Vref 10 % t LZ VIH GND ≈ 1/2VTT VOL + ∆ V VOL VOH ≈ GND INPUTS VCC (V) VCC = 1.8±0.15 V VCC = 2.5±0.2 V VCC = 2.7 V VCC = 3.3±0.3 V VCC = 5.0±0.5 V VI VCC VCC tr/tf Vref VTT CL 30 pF 30 pF 50 pF 50 pF 50 pF RL 500 Ω 500 Ω 500 Ω 500 Ω ∆V 0.15 V 0.3 V 0.3 V 0.3 V ≤ 2 ns 1/2 VCC 2× VCC ≤ 2 ns 1/2 VCC 2× VCC 1.5 V 1.5 V 6V 6V 1.0 kΩ 0.1.5 V 2.7 V ≤ 2.5 ns 2.7 V ≤ 2.5 ns VCC ≤ 2.5 ns 1/2 VCC 2× VCC Notes: 1. Input waveform: PRR = 10 MHz, duty cycle 50% 2. Waveform – A shows input conditions such that the output is "L" level when enable by the output control. 3. Waveform – B shows input conditions such that the output is "H" level when enable by the output control. Rev.1.00 Aug. 26, 2004 page 6 of 7 RD74LVC245B Package Dimensions As of January, 2003 12.6 13 Max 20 Unit: mm 11 1 10 5.5 0.80 Max 2.20 Max *0.20 ± 0.05 0.20 7.80 + 0.30 – 1.15 1.27 *0.40 ± 0.06 0.10 ± 0.10 0˚ – 8 ˚ 0.70 ± 0.20 0.15 0.12 M *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) FP-20DAV — Conforms 0.31 g As of January, 2003 Unit: mm 6.50 6.80 Max 20 11 1 10 0.65 1.0 6.40 ± 0.20 0.65 Max *0.20 ± 0.05 0.13 M 4.40 *0.15 ± 0.05 1.10 Max 0.10 0.07 +0.03 –0.04 0˚ – 8˚ 0.50 ± 0.10 *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) TTP-20DAV — — 0.07 g Rev.1.00 Aug. 26, 2004 page 7 of 7 Sales Strategic Planning Div. Keep safety first in your circuit designs! Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. RENESAS SALES OFFICES Refer to "http://www.renesas.com/en/network" for the latest and detailed information. Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Tel: (408) 382-7500, Fax: (408) 382-7501 Renesas Technology Europe Limited Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K. Tel: (1628) 585-100, Fax: (1628) 585-900 Renesas Technology Hong Kong Ltd. 7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel: 2265-6688, Fax: 2730-6071 Renesas Technology Taiwan Co., Ltd. 10th Floor, No.99, Fushing North Road, Taipei, Taiwan Tel: (2) 2715-2888, Fax: (2) 2713-2999 Renesas Technology (Shanghai) Co., Ltd. Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China Tel: (21) 6472-1001, Fax: (21) 6415-2952 Renesas Technology Singapore Pte. Ltd. 1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: 6213-0200, Fax: 6278-8001 http://www.renesas.com © 2004. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon .2.0
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