BD6753KV

System Lens Driver Series for Digital Still Cameras / Single-lens Reflex Cameras 6ch System Lens Drivers for Digital Still Cameras / Single-lens Reflex Cameras BD6373GW,BD6873KN,BD6753KV No.09014EAT02 ●Description The BD6373GW motor driver provides 6 Full-ON Drive H-bridge channels. The BD6873KN motor driver provides 5 Full-ON Drive H-bridge channels and 1 Linear Constant-Current Drive H-bridge channel, while the BD6753KV provides 4 Full-ON Drive channels and 2 PWM Constant-Current Drive H-bridge channels. Stepping motors can be used for auto focus, and either zoom or iris. A new drive type (lens barrier) is also available. Three types of drivers for shutter are offered: a simple Full-ON type, a high-precision linear constant current type, or a high-efficiency PWM constant current type, enabling selection of the ideal solution based on the application. ●Features 1) Subminiature 31PIN Wafer-level CSP (Chip Size Package): 2.6 x 2.6 x 0.85mm3 (BD6373GW) 2) DMOS output allowing a range power supply: 4.5V to 10.5V (BD6753KV; VM1), 2.0V to 10.5V (BD6753KV; VM2 to VM4) 3) Low ON-Resistance Power MOS output: Full-ON Drive block with 1.2Ω Typ. (BD6373GW) Full-ON Drive block with 1.2Ω Typ. and Linear Constant-Current Drive block with 1.0Ω Typ. (BD6873KN) Full-ON Drive block with 1.2Ω Typ. and PWM Constant-Current Drive block with 1.2Ω Typ. (BD6753KV) 4) Serial interface 3-line bus control input (BD6753KV) 5) Built-in two-step output current setting switch for the Linear Constant-Current Drive block (BD6873KN) 6) Drive mode switching function 7) 1.2V±3% high-precision reference voltage output (BD6873KN) 8) Constant-Current Drive block features phase compensation capacitor-free design (BD6873KN) 9) Built-in ±3% high-precision Linear Constant-Current Driver (BD6873KN) 10) Built-in peak current control PWM Constant-Current Driver (BD6753KV) 11) Built-in charge pump circuit for the DMOS gate voltage drive (BD6753KV) 12) UVLO (Under Voltage Lockout Protection) function 13) Built-in TSD (Thermal Shut Down) circuit 14) Standby current consumption: 0μA Typ. ●Absolute Maximum Ratings Parameter Power supply voltage Motor power supply voltage Charge pump voltage Control input voltage Power dissipation Operating temperature range Junction temperature Storage temperature range H-bridge output current Symbol VCC VM VG VIN Pd Topr Tjmax Tstg Iout BD6373GW -0.5 to +6.5 -0.5 to +6.5 -0.5 to VCC+0.5 940※1 -25 to +85 +150 -55 to +150 -800 to +800※4 Limit BD6873KN 0 to +7.0 0 to +7.0 0 to VCC 950※2 -25 to +85 +150 -55 to +150 -800 to +800※4 BD6753KV -0.5 to +7.0 -0.5 to +12.5 18.0 -0.5 to VCC+0.5 1125※3 -25 to +75 +150 -55 to +150 -800 to +800※4 Unit V V V V mW °C °C °C mA/ch ※1 Reduced by 7.52mW/°C over 25°C, when mounted on a glass epoxy board (50mm x 58mm x 1.75mm; 8layers). ※2 Reduced by 7.6mW/°C over 25°C, when mounted on a glass epoxy board (70mm x 70mm x 1.6mm). ※3 Reduced by 9.0mW/°C over 25°C, when mounted on a glass epoxy board (70mm x 70mm x 1.6mm). ※4 Must not exceed Pd, ASO, or Tjmax of 150°C. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Technical Note ●Operating Conditions (Ta=-25 to +85°C(BD6373GW, BD6873KN), -25 to +75°C(BD6753KV)) Limit Parameter Symbol BD6373GW BD6873KN BD6753KV Power supply voltage VCC 2.5 to 5.5 2.5 to 5.5 2.7 to 5.5 4.5 to 10.5 (VM1) Motor power supply voltage VM 2.5 to 5.5 2.5 to 5.5 2.0 to 10.5 (VM2 to VM4) Control input voltage VIN 0 to VCC 0 to VCC 0 to VCC Output current control input VLIM 0 to VCC 0 to 0.5 voltage range PWM signal input frequency FPWM 0 to 0.1 H-bridge output current Iout -500 to +500※5 -500 to +500※5 -500 to +500※5 ※5 Must not exceed Pd or ASO. Unit V V V V MHz mA/ch ●Electrical Characteristics 1) BD6373GW Electrical Characteristics (Unless otherwise specified, Ta=25°C, VCC=3.0V, VM=5.0V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. Overall Circuit current ICC 1.0 1.9 mA no signal and no load Control input (IN=ENABLExx, INPUTx, and BRAKEx) High level input voltage VINH 2.0 VCC V Low level input voltage VINL 0 0.7 V High level input current IINH 15 30 60 μA VINH=3V Low level input current IINL -1 0 μA VINL=0V UVLO UVLO voltage VUVLO 1.6 2.4 V Full-ON Drive block (ch1 to ch6) Io=±400mA on high and low sides In total Output ON-Resistance 1 RON1 1.2 1.5 Ω (VM=5V) Io=±400mA on high and low sides In total Output ON-Resistance 2 RON2 1.5 2.0 Ω (VM=3V) Turn on time ton 0.55 1.95 μs RL=20Ω Turn off time toff 0.08 0.5 μs RL=20Ω Rise time tr 0.1 0.15 1.0 μs RL=20Ω Fall time tf 0.03 0.2 μs RL=20Ω 2) BD6873KN Electrical Characteristics (Unless otherwise specified, Ta=25°C, VCC=3.0V, VM=5.0V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. Overall Circuit current ICCST 0 10 μA PS=0V during standby operation Circuit current ICC 1.2 2.3 mA PS=VCC with no signal and no load Power-saving (PS) High level input voltage VPSH 2.0 V Low level input voltage VPSL 0.7 V High level input current IPSH 15 30 60 μA VPS=3V Low level input current IPSL -1 0 μA VPS=0V Control input (IN=IN1A to IN5B, SEL1 to 3, BRK1, EN1, IN6, and VLIMS) High level input voltage VINH 2.0 V Low level input voltage VINL 0.7 V High level input current IINH 15 30 60 μA VINH=3V Low level input current IINL -1 0 μA VINL=0V Pull-down resistance RIN 50 100 200 kΩ UVLO UVLO voltage VUVLO 1.6 2.4 V Full-ON Drive block (ch1 to ch5) Output ON-Resistance RON 1.2 1.5 Ω Io=±400mA on high and low sides In total Linear Constant-Current Drive block (ch6) Output ON-Resistance RON 1.0 1.25 Ω Io=±400mA on high and low sides in total VREF output voltage VREF 1.16 1.20 1.24 V Iout=0~1mA Output limit voltage VOL 194 200 206 mV RNF=0.5Ω, VLIM=0.2V www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Technical Note 3) BD6753KV Electrical Characteristics (Unless otherwise specified, Ta=25°C, VCC=3.3V, VM=10.5V) Limit Parameter Symbol Unit Conditions Min. Typ. Max. Overall Circuit current during standby operation ICCST 0 10 3.0 0.7 100 0.7 66 200 2.5 1.5 μA mA V V μA μA V V μA μA kΩ V V Ω Io=±400mA, VG=16.5V on high and low sides in total Io=±400mA, VG=16.5V on high and low sides in total VLIMx=0V, SENSEx=0.5V VLIMx=0.5V, SENSEx=0V VLIMx=500mV R=10kΩ PS=0V PS=VCC with no signal; CRx open Circuit current ICC 2.2 Power-saving (PS) High-level input voltage VPSH 2.0 Low-level input voltage VPSL High-level input current IPSH 25 50 Low-level input current IPSL -1 0 Control input (IN=STROBE, CLK, DATA, and PWM1 to 6) High-level input voltage VINH 2.0 Low-level input voltage VINL High-level input current IINH 16.5 33 Low-level input current IINL -1 0 Pull-down resistance RIN 50 100 Charge pump Charge pump voltage VCP 16 16.5 UVLO UVLO voltage VUVLO 1.6 Full-ON Drive block (ch1 to ch4) Output ON-Resistance RON 1.2 VPSH=3.3V VPSL=0V VINH=3.3V VINL=0V PWM Linear Constant-Current Drive block (ch5 and ch6) Output ON-Resistance VLIM pin input current SENSE pin input current Output limit voltage CR clamp voltage CR switching high voltage CR switching low voltage Minimum ON time Constant voltage power supply VREF output voltage RON IVLIM ISENSE VOL VCR VCRH VCRL TMINON VREF -1 -1 485 0.8 0.72 0.36 0.1 0.81 1.2 -0.2 -0.2 500 0.9 0.80 0.40 0.5 0.90 1.5 515 1.0 0.88 0.44 1.0 0.99 Ω μA μA mV V V V μs V C=470pF, R=10kΩ Iout=0~1mA www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV ●Electrical Characteristic Diagrams 1250 Technical Note BD6373GW 940mW 1250 BD6873KN 950mW 1250 BD6753KV 1125mW Power dissipation : Pd [mW] Power dissipation : Pd [mW] 1000 750 500 250 0 0 1000 750 500 250 0 Power dissipation : Pd [mW] 1000 750 500 250 0 675mW 489mW 494mW 85°C 25 50 75 100 125 150 85°C 0 25 50 75 100 125 150 75°C 0 25 50 75 100 125 150 Ambient temperature : Ta [°C] Ambient temperature : Ta [°C] Ambient temperature : Ta [°C] Fig.1 Power Dissipation Reduction Fig.2 Power Dissipation Reduction Fig.3 Power Dissipation Reduction 5.0 4.0 3.0 2.0 1.0 0.0 0.0 1.0 2.0 3.0 4.0 BD6373GW Top 85°C Mid 25°C Low -25°C Op. range (2.5V to 5.5V) 5.0 4.0 3.0 2.0 1.0 0.0 BD6873KN Top 85°C Mid 25°C Low -25°C Op. range (2.5V to 5.5V) 5.0 4.0 3.0 2.0 1.0 0.0 BD6753KV Op. range Circuit current : ICC [mA] Circuit current : ICC [mA] Circuit current : ICC [mA] (2.7V to 5.5V) Top 75°C Mid 25°C Low -25°C 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 5.0 6.0 7.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 Supply voltage : VCC [V] Supply voltage : VCC [V] Supply voltage : VCC [V] Fig.4 Circuit current Fig.5 Circuit current Fig.6 Circuit current 5.0 BD6373GW Output ON resistance : RON [Ω] Top 85°C Mid 25°C Low -25°C Op. range (2.5V to 5.5V) 5.0 4.0 3.0 2.0 1.0 0.0 BD6873KN Output ON resistance : RON [Ω] 5.0 4.0 3.0 2.0 1.0 0.0 BD6873KN Top 85°C Mid 25°C Low -25°C Op. range (2.5V to 5.5V) Output ON resistance : RON [Ω] 4.0 3.0 2.0 1.0 0.0 0.0 1.0 2.0 3.0 4.0 Top 85°C Mid 25°C Low -25°C Op. range (2.5V to 5.5V) 5.0 6.0 7.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 Supply voltage : VM [V] Supply voltage : VM [V] Supply voltage : VM [V] Fig.7 Output ON-Resistance (Full-ON Drive block) BD6753KV Top 75°C Mid 25°C Low -25°C Fig.8 Output ON-Resistance (Full-ON Drive block) BD6873KN Fig.9 Output ON-Resistance (Linear Constant-Current Drive 5.0 250 200 150 100 50 0 Output ON resistance : RON [Ω] 3.0 2.0 1.0 0.0 13.0 RNF voltage : VRNF [mV] 4.0 Top 85°C Mid 25°C Low -25°C 0 50 100 150 200 250 14.0 15.0 16.0 17.0 18.0 Supply voltage : VG [V] VLIM voltage : VLIM [mV] Fig.10 Output ON-Resistance (VM=10.5V) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Fig.11 Output limit voltage (RNF=0.5Ω) 4/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV ●Block Diagram, Pin Arrangement, and Pin Function VCC F3 Technical Note TSD & UVLO BandGap F2 VM12 1 2 3 4 5 6 ENABLE12 C2 INPUT1 D2 INPUT2 E3 H bridge L Logic12 H bridge Full ON Full ON E2 F1 OUT1A A E1 OUT1B D1 OUT2A C1 OUT2B B1 PGND12 OUT3A VM34 OUT3B OUT4A PGND34 OUT4B B PGND12 OUT3A INPUT3 INPUT4 OUT4B PGND56 A2 VM34 C OUT2B ENABLE12 INDEX POST INPUT5 OUT5A ENABLE34 D3 INPUT3 B3 INPUT4 B4 H bridge L Logic34 H bridge Full ON Full ON A1 B2 OUT3A A3 OUT3B A4 OUT4A A6 B5 OUT4B A5 PGND34 D OUT2A INPUT1 ENABLE34 BRAKE5 BRAKE6 OUT5B E OUT1B OUT1A INPUT2 INPUT6 OUT6B OUT6A F5 VM56 INPUT5 C5 BRAKE5 D4 INPUT6 E4 BRAKE6 D5 H bridge L Full ON C6 OUT5A D6 OUT5B E6 OUT6A E5 F6 OUT6B B6 PGND56 F OUT1A VM12 VCC GND VM56 OUT6B H bridge Full ON OUT3A, OUT4B, OUT1A, and OUT6B, which are 2 function pins, are shorted on printed circuit boards. F4 GND Fig.12 BD6373GW Block Diagram Fig.13 BD6373GW Pin Arrangement (Top View) UCSP75M2 Package No. A1 A2 A3 A4 A5 A6 B1 B2 B3 B4 B5 B6 C1 C2 C3 C4 C5 C6 Pin Name OUT3A VM34 OUT3B OUT4A PGND34 OUT4B PGND12 OUT3A INPUT3 INPUT4 OUT4B PGND56 OUT2B ENABLE12 INDEX POST INPUT5 OUT5A BD6373GW Pin Function Table Function No. Pin Name H-bridge output pin ch3 A D1 OUT2A Motor power supply pin ch3 and ch4 D2 INPUT1 H-bridge output pin ch3 B D3 ENABLE34 H-bridge output pin ch4 A D4 BRAKE5 Motor ground pin ch3 and ch4 D5 BRAKE6 H-bridge output pin ch4 B D6 OUT5B Motor ground pin ch1 and ch2 E1 OUT1B H-bridge output pin ch3 A E2 OUT1A Control input pin ch3 INPUT E3 INPUT2 Control input pin ch4 INPUT E4 INPUT6 H-bridge output pin ch4 B E5 OUT6B Motor ground pin ch5 and ch6 E6 OUT6A H-bridge output pin ch2 B F1 OUT1A Control input pin ch1 and ch2 ENABLE F2 VM12 F3 VCC F4 GND Control input pin ch5 F5 VM56 H-bridge output pin ch5 A F6 OUT6B Function H-bridge output pin ch2 A Control input pin ch1 INPUT Control input pin ch3 and ch4 ENABLE Control input pin ch5 BRAKE Control input pin ch6 BRAKE H-bridge output pin ch5 B H-bridge output pin ch1 B H-bridge output pin ch1 A Control input pin ch2 INPUT Control input pin ch6 INPUT H-bridge output pin ch6 B H-bridge output pin ch6 A H-bridge output pin ch1 A Motor power supply pin ch1 and ch2 Power supply pin Ground pin Motor power supply pin ch5 and ch6 H-bridge output pin ch6 B OUT3A, OUT4B, OUT1A, and OUT6B, which are 2 function pins, are shorted on printed circuit boards. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV VCC 6 PS 38 Technical Note Power Save TSD & UVLO BandGap 41 VM1 IN1A 47 IN1B 48 IN2A IN2B SEL1 1 2 3 H bridge Level Shift Logic12 & Full ON 39 OUT1A 40 OUT1B 45 OUT2A 46 OUT2B 44 PGND1 17 VM2 Pre Driver H bridge Full ON IN3A IN3B IN4A IN4B 4 5 8 9 H bridge Level Shift Logic34 & Full ON 15 OUT3A 16 OUT3B 21 OUT4A 22 OUT4B 20 PGND2 34 VM3 IN6 PS 36 OUT5B OUT5A OUT6B RNF OUT6A PGND3 SENSE VLIMS EN1 VM3 VLIML VM4 Pre Driver H bridge Full ON VLIMH VREF 24 SEL2 10 OUT1A OUT1B VM1 N.C. N.C. PGND1 OUT2A OUT2B IN1A 48 IN1B SEL1 SEL2 GND IN2A IN2B IN3A IN3B IN4A IN4B IN5A OUT4B OUT4A PGND2 N.C. N.C. VM2 OUT3B OUT3A BRK1 SEL3 IN5B 12 VCC IN5A 11 IN5B 12 SEL3 13 BRK1 14 33 PGND3 Level Shift Logic5 & H bridge Full ON 32 OUT5A 35 OUT5B BD6873KN Pre Driver 28 VM4 EN1 36 IN6 37 Level Shift Logic6 & H bridge Const. Current 27 OUT6A 31 OUT6B 29 RNF Pre Driver VREF 23 VREF VLIMS 26 Selector 24 VLIMH 25 VLIML 7 GND 30 SENSE Fig.14 BD6873KN Block Diagram Fig.15 BD6873KN Pin Arrangement (Top View) UQFN48 Package No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin name IN2A IN2B SEL1 IN3A IN3B VCC GND IN4A IN4B SEL2 IN5A IN5B SEL3 BRK1 OUT3A OUT3B VM2 N.C. N.C. PGND2 OUT4A OUT4B VREF VLIMH BD6873KN Pin Function Table Function No. Pin name Control input pin ch2 A 25 VLIML Control input pin ch2 B 26 VLIMS Input mode selection pin ch1 and ch2 27 OUT6A Control input pin ch3 A 28 VM4 Control input pin ch3 B 29 RNF Power supply pin 30 SENSE Ground pin 31 OUT6B Control input pin ch4 A 32 OUT5A Control input pin ch4 B 33 PGND3 Input mode selection pin ch3 and ch4 34 VM3 Control input pin ch5 A 35 OUT5B Control input pin ch5 B 36 EN1 Input mode selection pin ch5 37 IN6 Control input pin ch5 BRAKE 38 PS H-bridge output pin ch3 A 39 OUT1A H-bridge output pin ch3 B 40 OUT1B Motor power supply pin ch3 and ch4 41 VM1 42 N.C. 43 N.C. Motor ground pin ch3 and ch4 44 PGND1 H-bridge output pin ch4 A 45 OUT2A H-bridge output pin ch4 B 46 OUT2B Reference voltage output pin 47 IN1A Output current setting pin 1 ch6 48 IN1B Function Output current setting pin 2 ch6 Output current selection pin ch6 H-bridge output pin ch6 A Motor power supply pin ch6 Resistance connection pin for output current detection ch6 Output current detection pin ch6 H-bridge output pin ch6 B H-bridge output pin ch5 A Motor ground pin ch5 Motor power supply pin ch5 H-bridge output pin ch5 B Control input pin ch6 ENABLE Control input pin ch6 INPUT Power-saving pin H-bridge output pin ch1 A H-bridge output pin ch1 B Motor power supply pin ch1 and ch2 Motor ground pin ch1 and ch2 H-bridge output pin ch2 A H-bridge output pin ch2 B Control input pin ch1 A Control input pin ch1 B www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV VCC 9 4 CP1 5 CP2 6 CP3 7 CP4 8 VG Technical Note OSC Charge Pump Charge Pump PS 28 Power Save TSD & UVLO VG BandGap 44 45 VM1 PWM1 2 PWM2 3 H bridge Level Shift Logic12 & Full ON 41 OUT1A 43 OUT1B 46 OUT2A 48 OUT2B 42 47 RNF1 16 17 VM2 Pre Driver H bridge Full ON VG DATA GND CLK STROBE VLIM6 CR2 PS VLIM5 VM4 CR1 Full ON PWM4 11 Logic34 & 15 OUT3B 18 OUT4A 20 OUT4B 14 19 RNF2 25 VM3 Pre Driver H bridge Full ON OUT6A SENSE4 RNF4 OUT6B OUT1A RNF1 OUT1B VM1 VM1 OUT2A RNF1 PWM6 PWM1 PWM2 VREF VM3 OUT5B SENSE3 RNF3 OUT5A OUT4B RNF2 OUT4A VM2 VM2 OUT3B RNF2 OUT3A PWM3 10 H bridge Level Shift 13 OUT3A 36 24 VG H bridge PWM5 12 PWM6 1 21 OUT5A 24 OUT5B 36 VM4 BD6753KV Level Shift Logic45 ogic56 & PWM C. Current Pre Driver H bridge PWM C. Current STROBE 31 CLK 32 DATA 33 37 OUT6A 40 OUT6B 39 RNF4 PWM3 PWM4 Serial Interface 12 PWM LATCH 38 SENSE4 22 RNF3 VREF 30 GND 29 VREF PWM LATCH 27 CR1 34 CR2 VREF 26 VLIM5 35 23 SENSE3 VLIM6 Fig.16 BD6753KV Block Diagram Fig.17 BD6753KV Pin Arrangement (Top View) VQFP8C Package No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pin name PWM6 PWM1 PWM2 CP1 CP2 CP3 CP4 VG VCC PWM3 PWM4 PWM5 OUT3A RNF2 OUT3B VM2 VM2 OUT4A RNF2 OUT4B OUT5A RNF3 SENSE3 OUT5B BD6753KV Pin Function Table Function No. Pin name PWM control input pin ch6 25 VM3 PWM control input pin ch1 26 VLIM5 PWM control input pin ch2 27 CR1 Charge pump capacitor connection pin 1 28 PS Charge pump capacitor connection pin 2 29 VREF Charge pump capacitor connection pin 3 30 GND Charge pump capacitor connection pin 4 31 STROBE Charge pump output pin 32 CLK Power supply pin 33 DATA PWM control input pin ch3 34 CR2 PWM control input pin ch4 35 VLIM6 PWM control input pin ch5 36 VM4 H-bridge output pin ch3 A 37 OUT6A Motor ground pin ch3 and ch4 38 SENSE4 H-bridge output pin ch3 B 39 RNF4 Motor power supply pin ch3 and ch4 40 OUT6B Motor power supply pin ch3 and ch4 41 OUT1A H-bridge output pin ch4 A 42 RNF1 Motor ground pin ch3 and 4 43 OUT1B H-bridge output pin ch4 B 44 VM1 H-bridge output pin ch5 A 45 VM1 Resistance connection pin for output current detection ch5 46 OUT2A Output current detection pin ch5 47 RNF1 H-bridge output pin ch5 B 48 OUT2B Function Motor power supply pin ch5 Output current setting pin ch5 CR timer setting element connection pin ch5 Power-saving pin Reference voltage output pin Ground pin Serial enable input pin Serial clock input pin Serial data input pin CR timer setting element connection pin ch6 Output current setting pin ch6 Motor power supply pin ch6 H-bridge output pin ch6 A Output current detection pin ch6 Resistance connection pin for output current detection ch6 H-bridge output pin ch6 B H-bridge output pin ch1 A Motor ground pin ch1 and ch2 H-bridge output pin ch1 B Motor power supply pin ch1 and ch2 Motor power supply pin ch1 and ch2 H-bridge output pin ch2 A Motor ground pin ch1 and ch2 H-bridge output pin ch2 B www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/17 2009.06 - Rev.A PWM5 48 OUT2B VCC CP1 CP2 CP3 CP4 VG BD6373GW, BD6873KN, BD6753KV ●Application Circuit Diagram and Function Explanation Bypass filter Capacitor for power supply input. (p.14/16) Technical Note 1～100uF VCC F3 Bypass filter Capacitor for power supply input. (p.14/16) TSD & UVLO Motor control input (p.8/16) ENABLE12 C2 INPUT1 D2 INPUT2 E3 BandGap F2 1～100uF VM12 OUT1A OUT1B OUT2A OUT2B PGND12 1～100uF A2 VM34 OUT3A OUT3B OUT4A OUT4B PGND34 1～100uF Bypass filter Capacitor for power supply input. (p.14/16) H bridge Level Shift Logic12 & Full ON E2 F1 E1 D1 C1 B1 M Pre Driver H bridge Full ON Motor control input (p.8/16) ENABLE34 D3 INPUT3 B3 INPUT4 B4 Motor control input (p.8/16) H bridge Level Shift Logic34 & Full ON A1 B2 A3 A4 A6 B5 A5 M Pre Driver H bridge Full ON Bypass filter Capacitor for power supply input. (p.14/16) Motor control input brake function (p.8/16) H : Brake Motor control input (p.8/16) F5 INPUT5 C5 BRAKE5 D4 INPUT6 E4 BRAKE6 D5 Logic5 Logic6 H bridge Level Shift & Full ON C6 D6 E6 E5 F6 B6 VM56 OUT5A OUT5B OUT6A OUT6B PGND56 Pre Driver H bridge Full ON Motor control input brake function (p.8/16) H : Brake F4 GND Fig.18 BD6373GW Application Circuit Diagram 1) Power-saving function When Low-level voltage is applied to PS pin, the IC will be turned off internally and the circuit current will be 0μA (Typ.). During operating mode, PS pin should be High-level. (See the Electrical Characteristics; p.2/16) 2) Motor Control input (1) ENABLExx and INPUTx pins (BD6373GW), INxA, INxB, EN1 and IN6 pins (BD6873KN), and PWMx pins (BD6753KV) These pins are used to program and control the motor drive modes. (See the Electrical Characteristics; p.2/16 and p.3/16 and I/O Truth Table; p.12/16 and p.13/16) (2) SELx pins (BD6873KN) When the Low-level voltage is applied to the SELx pins, the I/O logic can be set to EN/IN mode. However, when the High-level voltage is applied, the I/O logic can be set to IN/IN mode. The same selection made with the BD6873KN's SELx pin can be made for the BD6753KV, using serial control. (See the Electrical Characteristics; p.2/16 and p.3/16 and I/O Truth Table) (3) BRAKEx pins (BD6373GW) and BRK1 pin (BD6873KN) Applying the High-level voltage pin will set the brake mode. The same selection made with the brake mode can be made for the BD6753KV, using serial control. (See the Electrical Characteristics; p.2/16 and p.3/16 and I/O Truth Table; p.12/16 and p.13/16) www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Bypass filter Capacitor for power supply input. (p.14/16) Technical Note Power-saving (p.8/16) H : Active L : Standby 1～100uF VCC 6 PS 38 Bypass filter Capacitor for power supply input. (p.14/16) Power Save TSD & UVLO BandGap 41 1～100uF VM1 OUT1A OUT1B OUT2A OUT2B PGND1 1～100uF Bypass filter Capacitor for power supply input. (p.14/16) Motor control input (p.8/16) IN1A 47 IN1B 48 IN2A 1 Drive mode selection (p.8/16) H : EN/IN L : IN/IN Motor control input (p.8/16) IN3A 4 IN3B 5 Drive mode selection (p.8/16) H : EN/IN L : IN/IN Motor control input (p.8/16) IN5A 11 IN5B 12 SEL3 13 BRK1 14 Motor control input brake function (p.8/16) H : Brake IN4A 8 IN4B 9 SEL2 10 IN2B 2 SEL1 3 H bridge Level Shift Logic12 & Full ON 39 40 45 46 44 17 M Pre Driver H bridge Full ON H bridge Level Shift Logic34 & Full ON 15 16 21 22 20 34 VM2 OUT3A OUT3B OUT4A OUT4B PGND2 1～100uF VM3 M Pre Driver H bridge Full ON Bypass filter Capacitor for power supply input. (p.14/16) Drive mode selection (p.8/16) H : EN/IN L : IN/IN Level Shift Logic5 & H bridge Full ON 32 35 33 OUT5A OUT5B PGND3 1～100uF Bypass filter Capacitor for power supply input. (p.14/16) Pre Driver 28 VM4 EN1 36 IN6 37 Level Shift Logic6 & H bridge Const. Current 27 31 29 OUT6A OUT6B RNF 0.1Ω~5.0Ω SENSE Motor control input (p.8/16) Pre Driver VREF 23 VREF W hen using the VREF voltage (1.2V) resistance division value as VLIMH and VLIML input value, select R1, R2, and R3 values such that, 2kΩ≦R1+R2+R3≦20kΩ (p.9/16) VLIMS R1 26 Selector 24 VLIMH R2 25 VLIML R3 7 GND 30 The output current is converted to a voltage with the RNF external resistor and transmitted to the SENSE pin. (p.10/16) Iout[A] = (VLIMH or VLIML[V])÷RNF[Ω] Output current selection (p.10/16) H : VLIML L : VLIMH Fig.19 BD6873KN Application Circuit Diagram 3) H-bridge The 6-channel H-bridges of can be controlled independently. For this reason, it is possible to drive the H-bridges simultaneously, as long as the package thermal tolerances are not exceeded. The H-bridge output transistors of the BD6373GW, BD6873KN and BD6753KV consist of Power CMOS, with the motor power supply VM, and Power DMOS, with the charge pump step-up power supply VG, respectively. The total H-bridge ON-Resistance on the high and low sides varies with the VM and VG voltages, respectively. The system must be designed so that the maximum H-bridge current for each channel is 800mA or below. 4) Drive system of Linear Constant-Current H-bridge (BD6873KN: ch6) BD6873KN (ch6) enables Linear Constant-Current Driving. (1) Reference voltage output (with a tolerance of ±3%) The VREF pin outputs 1.2V, based on the internal reference voltage. The output current of the Constant-Current Drive block is controllable by connecting external resistance to the VREF pin of the IC and applying a voltage divided by the resistor to the output current setting pins (VLIMH and VLIML pins). It is recommended to set the external resistance to 2kΩ or above in consideration of the current capacity of the VREF pin, and 20kΩ or below in order to minimize the fluctuation of the set value caused by the base current of the internal transistor of the IC. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Connecting 0.01μF to 0.1μF capacitors between the CP1 and CP2, CP3 and CP4, and VG and GND pins generate a VG voltage of approximately VM1 + (VCC  2). Use caution to ensure that the voltage differential between VG and VM is 4.5V or higher, and that the VG voltage does not exceed the absolute maximum rating of 18V, especially BST voltage direct input. (p.12/16) Bypass filter Capacitor for power supply input. (p.14/16) 0.1μF 1～100uF VCC 9 Power-saving (p.8/16) H : Active L : Standby 4 CP1 5 CP2 6 CP3 7 CP4 8 VG 0.1μF 0.1μF Technical Note OSC Charge Pump Charge Pump Bypass filter Capacitor for power supply input. (p.14/16) Motor control input (p.8/16) PS 28 Power Save TSD & UVLO VG BandGap 44 45 1～100uF VM1 OUT1A OUT1B OUT2A OUT2B RNF1 1～100uF Bypass filter Capacitor for power supply input. (p.14/16) PWM1 2 PWM2 3 H bridge L Logic12 H bridge Full ON Full ON 41 43 46 48 42 47 M Motor control input (p.8/16) VG 16 17 13 15 18 20 14 19 25 VM2 OUT3A OUT3B OUT4A OUT4B RNF2 PWM3 10 PWM4 11 H bridge L Logic34 H bridge Full ON Full ON M Bypass filter Capacitor for power supply input. (p.14/16) Motor control input (p.8/16) VG 1～100uF VM3 OUT5A OUT5B 1～100uF 36 VM4 OUT6A OUT6B RNF4 0.1Ω~5.0Ω SENSE4 RNF3 0.1Ω~5.0Ω SENSE3 The output current is converted to a voltage with the RNF3 external resistor and transmitted to the SENSE3 pin. (p.11/16) Iout[A] = VLIM5[V]÷RNF3[Ω] The output current is converted to a voltage with the RNF4 external resistor and transmitted to the SENSE4 pin. (p.11/16) Iout[A] = VLIM6[V]÷RNF4[Ω] H bridge PWM5 12 PWM6 1 Serial control input (p.12/16) 21 24 Bypass filter Capacitor for power supply input. (p.14/16) L Logic45 ogic56 PWM C. Current H bridge PWM C. Current STROBE 31 CLK 32 DATA 33 37 40 39 Serial Interface PWM LATCH 38 22 VREF 30 GND 29 VREF PWM LATCH 27 CR1 CCR1 RCR1 CCR2 34 CR2 RCR2 VREF R1 26 VLIM5 R2 35 23 VLIM6 R3 This CR timer determines the off time for the PWM drive. 5kΩ≦RCR1≦50kΩ 10pF≦CCR1≦2200pF (p.11/16) This CR timer determines the off time for the PWM drive. 5kΩ≦RCR2≦50kΩ 10pF≦CCR2≦2200pF (p.11/16) W hen using the VREF voltage (0.9V) resistance division value as VLIM5 and VLIM6 input value, select R1, R2, and R3 values such that, 1kΩ≦R1+R2+R3≦20kΩ (p.11/16) Fig.20 BD6753KV Application Circuit Diagram (2) Output current settings and setting changes When the Low-level control voltage is applied to the VLIMS pin, the value on the VLIMH pin will be used as an output current set value to control the output current. When the High-level control voltage is applied to the VLIMS pin, the value on the VLIML pin will be used as an output current set value to control the output current. (See the Electrical Characteristics; P.2/16) (3) Output current detection and current settings By connecting external resistor (0.1Ω to 5.0Ω) to the RNF pin of the IC, the motor drive current will be converted into voltage in order to be detected. The output current is kept constant by shorting the RNF and SENSE pins and comparing the voltage with the VLIMH or VLIML voltage. To perform output current settings more precisely, trim the external RNF resistance if needed, and supply a precise voltage externally to the VLIMH or VLIML pin of the IC. In that case, open the VREF pin. Output current value Iout[A] = VLIMH[V] or VLIML[V] Select VLIMH when VLIMS is Low-level Select VLIML when VLIMS is High-level ･･････(1) RNF[Ω] The output current is 400mA3% if 0.2V is applied to the VLIMH or VLIML pin and a 0.5Ω resistor is connected externally to the RNF pin. If the VLIMH and VLIML pins are shorted to the VCC pin (or the same voltage level as the VCC is applied) and the SENSE and RNF pins are shorted to the ground, this channel can be used as a Full-ON Drive H-bridge like the other five channels. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Technical Note 5) Drive system of PWM Constant-Current H-bridge (BD6753KV: ch5 and ch6) BD6753KV (ch5 and ch6) enable peak current control PWM Constant-Current Driving. (1) Output current detection and current settings By connecting external resistance (0.1Ω to 5.0Ω) to the RNF3 and RNF4 pins of the IC, the motor drive current will be converted into voltage in order to be detected. The output current is kept constant by shorting the RNF3 and RNF4 pins with the SENSE3 and SENSE4 pins, respectively, and comparing the voltage to the set voltage input from outside the IC to the VLIM5 and VLIM6 pins. As with the BD6873KN, the reference voltage generated inside the IC (VREF pin: 0.9V±10%) can be divided using external resistors (from 1kΩ to 20kΩ). The resulting value can be input as the set voltage. It is also necessary to connect a resistor and capacitor to the CR1 and CR2 pins, to determine the PWM drive off time. (2) PWM Constant-Current control operation When the output current in output ON mode increases, and the RNF3 or RNF4 voltage reaches the value set with the VLIM5 or VLIM6 voltage, the internal current limiting comparator operates to set the IC to short mode. This caused the current to be attenuated so that the H-bridge's low-side DMOS is ON. Once the off time (Toff) ends, as measured by the CR timer, the IC returns to output ON mode. By repeating this cycle, the IC maintains a fixed current due to the motor's inductance characteristics. (3) Noise cancellation function In order to avoid false detections by the current limiting comparator (caused by spike noise generated when output is turned on), the IC uses the noise cancellation time (Tn) to disable current detection. This begins from the time output turns on, until the noise cancellation time elapses. The noise cancellation time represents the minimum on time, and is determined by the CR pin's internal resistor, external resistor, and capacitor. (4) CR timer When output turns on, the CR pin is clamped at approximately 0.9V. When the mode changes to short mode, it discharges to approximately 0.4V. The interval over which this 0.5V voltage differential is discharged, is determined by the off time (Toff). Once the CR pin voltage reaches 0.4V, the pin begins to charge as the output turns on, until it reaches 0.9V. The interval over which the pin charges from 0.4V to approximately 0.8V is given by the noise cancellation time (Tn). Toff and Tn are determined by the external resistor and capacitor connected to the CR pin. A low resistance value to the CR pin will prevent it from reaching the clamp voltage. Therefore a resistor from 5 kΩ to 50kΩ should be used. Capacitors should be from 10pF to 2200pF. The use of a capacitance in excess of 2200pF will lengthen the noise cancellation time and may cause the output current to exceed the set current. Setting a longer off time may increase the output current ripple, reducing both the average current and the motor's rotational efficiency. Output current value Iout[A] = VLIM5[V] RNF3[Ω] or VLIM6[V] RNF4[Ω] ･･････(2) PWM Constant-Current setting value Output current: Iout[A] Spike noise 0A VLIM pin setting voltage RNF voltage: VRNF[V] 0V 0.9V 0.8V CR voltage: VCR[V] Discharge period Noise cancellation time: Tn[sec] Off time: Toff[sec] 0.4V Charge period Fig.21 BD6753KV Peak Current Control PWM Constant-Current Drive Using the CR Timer If the VLIM5 or VLIM6 is shorted to the VCC pin (or the same voltage level as the VCC is applied) and the SENSE3 or SENSE4 and RNF3 or RNF4 pins are shorted to the ground, this channel can be used as a Full-ON Drive H-bridge like the other four channels. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Technical Note 6) Charge pump (BD6753KV) Each output H-bridge of the BD6753KV on the high and low sides consists of Nch DMOS. Therefore, the gate voltage VG should be higher than the VM voltage to drive the Nch DMOS on the high side.The BD6753KV has a built-in charge pump circuit that generates VG voltage by connecting an external capacitor (0.01μF to 0.1μF). If a 0.1μF capacitor is connected between: CP1 and CP2, CP3 and CP4, VG and GND Then, VG pin output voltage will be: VM1 + (VCC  2) CP1 and CP2, VG and GND CP4 and VG pins are shorted, and CP3 pin is open Then, VG pin output voltage will be: VM1 + VCC The VM1 to VM4 respectively can be set to voltages different to one another. In order to ensure better performance, the voltage differential between VG and VM must be 4.5V or higher, and the VG voltage must not exceed the absolute maximum rating of 18V. 7) Serial interface (BD6753KV) The BD6753KV provides an 8-bit, 3-line serial interface for setting output modes. DATA is sent to the internal shift register during the STROBE low interval at the CLK rising edge. Shift register data is written to the IC's internal 6-bit memory at the STROBE rising edge, according to the addresses stored in Bit[7] and Bit[6]. The serial data input order is Bit[0] to Bit[7]. Serial settings are reset when the PS pin changes to Low-level control voltage, triggering standby mode. Serial settings are also reset when the UVLO circuit operates. BD6753KV Serial Resistor Bit Map DATA BIT Bit[5] Bit[4] Bit[3] Bit[2] mod2 mod1 p2a p2b mod4 mod3 p4a p4b mod6 mod5 p6a p6b If a 0.1μF capacitor is connected between: No. 00H 01H 02H ADDRESS BIT Bit[7] Bit[6] 0 0 0 1 1 0 Bit[1] p1a p3a p5a Bit[0] p1b p3b p5b 100% STROBE Timing of input serial data writing to internal register Timing of register data writing to internal memory 0% 100% CLK 0% 100% DATA Bit[0] Bit[1] Bit[2] Bit[3] Bit[4] Bit[5] Bit[6] Bit[7] Bit[0] Bit[1] Bit[5] Bit[6] Bit[7] 0% DATA BITS ADDRESS BITS DATA BITS ADDRESS BITS Fig.22 BD6753KV Sequence of Serial Control Input ●I/O Truth Table BD6373GW Full-ON Driver ch1 to ch2 I/O Truth Table INPUT OUTPUT Drive mode ENABLE12 INPUTx OUTxA OUTxB H X Z Z EN/IN L L H L L H L H BD6373GW Full-ON Driver ch3 to ch4 I/O Truth Table INPUT OUTPUT Drive mode ENABLE34 INPUTx OUTxA OUTxB H X Z Z EN/IN L L H L L H L H BD6373GW Full-ON Driver ch5 to ch6 I/O Truth Table INPUT OUTPUT Drive mode INPUTx BRAKEx OUTxA OUTxB L L H L IN/IN H L L H X H L L Output mode Standby CW CCW Output mode Standby CW CCW Output mode CW CCW Brake L: Low, H: High, X: Don't care, Z: High impedance At CW, current flows from OUTA to OUTB. At CCW, current flows from OUTB to OUTA. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 12/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV BD6873KN Full-ON Driver ch1 to ch4 I/O Truth Table INPUT Drive mode SELx INxA INxB H X EN/IN L L L L H L L H L IN/IN H L H H H Technical Note OUTPUT OUTxA OUTxB Z Z H L L H Z Z H L L H L L Output mode Standby CW CCW Standby CW CCW Brake L: Low, H: High, X: Don't care, Z: High impedance At CW, current flows from OUTA to OUTB. At CCW, current flows from OUTB to OUTA. BD6873KN Full-ON Driver ch5 I/O Truth Table INPUT Drive mode SEL3 IN5A IN5B BRK1 H X X L L L EN/IN L L H L L X H L L X H L X IN/IN H L H X H H X OUTPUT OUT5A OUT5B Z Z H L L H L L Z Z H L L H L L Output mode Standby CW CCW Brake Standby CW CCW Brake L: Low, H: High, X: Don't care, Z: High impedance At CW, current flows from OUTA to OUTB. At CCW, current flows from OUTB to OUTA. BD6873KN Linear Constant-Current Driver ch6 I/O Truth Table INPUT OUTPUT Drive mode EN1 IN6 OUT6A OUT6B H X Z Z EN/IN L L H L L H L H L: Low, H: High, X: Don't care, Z: High impedance At CW, current flows from OUTA to OUTB. At CCW, current flows from OUTB to OUTA. Output mode Standby CW CCW BD6753KV ch1 to ch6 I/O Truth Table INPUT Serial data Drive mode modx pxa pxa L L L H L H IN/IN L H L H L H H L X H L EN/IN H H L H H Terminal PWMx X L H L H X X L H X OUTPUT OUTxA Z L L H L L Z H L L OUTxB Z H L L L L Z L H L Output mode Standby CCW Brake CW Brake Brake Standby CW CCW Brake L: Low, H: High, X: Don't care, Z: High impedance At CW, current flows from OUTA to OUTB. At CCW, current flows from OUTB to OUTA. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 13/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV ●I/O Circuit Diagram ENABLExx, INPUTx, BRAKEx VCC 10kΩ VCC 140kΩ OUTxA OUTxB 100kΩ PGNDx VMx, OUTxA, OUTxB, PGNDx VMx Technical Note Fig.23 BD6373GW I/O Circuit Diagram (Resistance values are typical ones) PS, INxA, INxB, EN1, IN6, VLIMS VCC 10kΩ VCC VMx, OUTxA, OUTxB, PGNDx, RNF VMx VREF VCC VCC VLIMH, VLIML, SENSE VCC 10kΩ OUTxA OUTxB 100kΩ PGNDx RNF 200kΩ Fig.24 BD6873KN I/O Circuit Diagram (Resistance values are typical ones) PS VCC 40kΩ STROBE, CLK, DATA, PWMx VCC 10kΩ VCC VMx, OUTxA, OUTxB, RNFx VMx CPH1, CPL1 VCC VCC OUTxA OUTxB VCC RNFx 70kΩ 100kΩ 100kΩ VLIMx, SENSEx CP3, CP1 VCC VG, CP4, CP2 VG CR1, CR2 VCC 1kΩ VCC VCC 5kΩ VCC CP4 CP2 VM1 Fig.25 BD6753KV I/O Circuit Diagram (Resistance values are typical ones) ●Operation Notes 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. The implementation of a physical safety measure such as a fuse should be considered when use of the IC in a special mode where the absolute maximum ratings may be exceeded is anticipated. 2) Storage temperature range As long as the IC is kept within this range, there should be no problems in the IC’s performance. Conversely, extreme temperature changes may result in poor IC performance, even if the changes are within the above range. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 14/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Technical Note 3) Power supply pins and lines None of the VM line for the H-bridges is internally connected to the VCC power supply line, which is only for the control logic or analog circuit. Therefore, the VM and VCC lines can be driven at different voltages. Although these lines can be connected to a common power supply, do not open the power supply pin but connect it to the power supply externally. Regenerated current may flow as a result of the motor's back electromotive force. Insert capacitors between the power supply and ground pins to serve as a route for regenerated current. Determine the capacitance in full consideration of all the characteristics of the electrolytic capacitor, because the electrolytic capacitor may loose some capacitance at low temperatures. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and ground pins. For this IC with several power supplies and a part consists of the CMOS block, it is possible that rush current may flow instantaneously due to the internal powering sequence and delays, and to the unstable internal logic, respectively. Therefore, give special consideration to power coupling capacitance, width of power and ground wirings, and routing of wiring. 4) Ground pins and lines Ensure a minimum GND pin potential in all operating conditions. Make sure that no pins are at a voltage below the GND at any time, regardless of whether it is a transient signal or not. When using both small signal GND and large current MGND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either. The power supply and ground lines must be as short and thick as possible to reduce line impedance. 5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 6) Pin short and wrong direction assembly of the device Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any connection error or if positive and ground power supply terminals are reversed. The IC may also be damaged if pins are shorted together or are shorted to other circuit’s power lines. 7) Actions in strong magnetic field Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction. 8) ASO When using the IC, set the output transistor for the motor so that it does not exceed absolute maximum ratings or ASO. 9) Thermal shutdown circuit If the junction temperature (Tjmax) reaches 175°C, the TSD circuit will operate, and the coil output circuit of the motor will open. There is a temperature hysteresis of approximately 25°C (BD6373GW and BD6873KN Typ.) and 25°C (BD6753KV Typ.). The TSD circuit is designed only to shut off the IC in order to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its operation. The performance of the IC’s characteristics is not guaranteed and it is recommended that the device is replaced after the TSD is activated. 10) Serial data input In the BD6753KV, DATA input string start with LSB first. The serial settings are reset during standby mode operation and whenever the UVLO or TSD circuits are operating. 11) Power saving terminal Be cancelled power saving mode after turned on power supply VCC and VM, because of PS terminal combines power saving with serial reset function. If the case of power saving terminal always shorted power supply terminal, reset function may not be well, and it may cause the IC to malfunction. 12) Testing on application board When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to, or removing it from a jig or fixture, during the inspection process. Ground the IC during assembly steps as an antistatic measure. Use similar precaution when transporting and storing the IC. 13) Application example The application circuit is recommended for use. Make sure to confirm the adequacy of the characteristics. When using the circuit with changes to the external circuit constants, make sure to leave an adequate margin for external components including static and transitional characteristics as well as dispersion of the IC. 14) Regarding input pin of the IC This monolithic IC contains P+ isolation and P substrate layers between adjacent elements to keep them isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode or transistor. For example, the relation between each potential is as follows: When GND > Pin A, the P-N junction operates as a parasitic diode. When GND > Pin B, the P-N junction operates as a parasitic diode and transistor. Parasitic elements can occur inevitably in the structure of the IC. The operation of parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic elements operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used. Pin A Resistor Pin A N P N N Parasitic element P+ N P P+ N Pin B C B E B C E Parasitic element Other adjacent elements GND Transistor (NPN) Pin B N P+ P+ P substrate Parasitic element GND Parasitic element P substrate GND GND Fig.26 Example of Simple IC Architecture www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 15/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV ●Ordering part number Technical Note B D 6 3 7 3 G W - E 2 Part No. Part No. 6373 : F.ON 6ch 6873 : F.ON 5ch+C.C. 1ch 6753 : F.ON 4ch+PWM 2ch Package GW : UCSP75M2 KN : UQFN48 KV : VQFP48C Packaging and forming specification E2: Embossed tape and reel (UCSP75M2/ UQFN48)) None: Tray (VQFP48C) UCSP75M2 (BD6373GW) Tape Quantity Direction of feed Embossed carrier tape 3000pcs E2 The direction is the 1pin of product is at the upper left when you hold ( reel on the left hand and you pull out the tape on the right hand ) 1pin Direction of feed (Unit:mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. UQFN48 (1.4) 7.2 ± 0.1 7.0 ± 0.1 36 25 24 Tape Quantity Direction of feed Embossed carrier tape (with dry pack) 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 7.2 ± 0.1 7.0 ± 0.1 37 48 1 12 13 0.2 ± 0.05 0.05 M 0.22 ± 0.05 ( reel on the left hand and you pull out the tape on the right hand ) +0.03 0.02 -0.02 0.05 +0.1 0.6 -0.3 0.95MAX 5) .4 Notice : Do not use the dotted line area for soldering (0 .2 ) .5 (0 5) 3(0 0.4 1pin Reel Direction of feed (Unit : mm) ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 16/17 2009.06 - Rev.A BD6373GW, BD6873KN, BD6753KV Technical Note VQFP48C 9.0 ± 0.2 7.0 ± 0.1 36 37 25 24 Container Quantity Direction of feed 0.5±0.15 1.0±0.2 0.75 Tray 1000pcs Direction of product is fixed in a tray 9.0 ± 0.2 7.0 ± 0.1 48 1 12 13 1pin 0.75 1PIN MARK +0.05 0.145 -0.03 1.6MAX 4 +6 -4 1.4 ± 0.05 0.1 ± 0.05 0.5 ± 0.1 0.08 S +0.05 0.22 -0.04 0.08 M (Unit : mm) ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 17/17 2009.06 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. R0039A