LM4565FVT-GE2

Datasheet Operational Amplifiers Low Noise Operational Amplifier LM4565xxx Key Specifications General Description       The LM4565xxx are low nose operational amplifiers with high voltage gain and wide bandwidth. They have good performance of input referred noise voltage (5 nV/ Hz ) and total harmonic distortion (0.0002%). These are suitable for audio applications and active filter. Package Features      Operating Supply Voltage: Temperature Range: Voltage Gain (RL=2kΩ): Slew Rate: Gain Bandwidth: Input Referred Noise Voltage: SOP-8 SOP-J8 SSOP-B8 TSSOP-B8 MSOP8 TSSOP-B8J High Voltage Gain High Slew Rate Low Input Referred Noise Voltage Low Total Harmonic Distortion Wide Gain Bandwidth ±2V to ±18V -40°C to +85°C 100dB(Typ) 5.0V/μs (Typ) 10MHz (Typ) 5 nV/ Hz (Typ) W(Typ) xD(Typ) xH(Max) 5.00mm x 6.20mm x 1.71mm 4.90mm x 6.00mm x 1.65mm 3.00mm x 6.40mm x 1.35mm 3.00mm x 6.40mm x 1.20mm 2.90mm x 4.00mm x 0.90mm 3.00mm x 4.90mm x 1.10mm Application  Audio Application  Consumer Equipment  Active Filter Pin Configuration LM4565F LM4565FJ LM4565FV LM4565FVT LM4565FVM LM4565FVJ : SOP8 : SOP-J8 : SSOP-B8 : TSSOP-B8 : MSOP8 : TSSOP-B8J 8 VCC OUT1 1 -IN1 2 +IN1 3 VEE 4 CH1 - + CH2 7 OUT2 6 -IN2 + - 5 +IN2 Pin No. Pin Name 1 OUT1 2 -IN1 3 +IN1 4 VEE 5 +IN2 6 -IN2 7 OUT2 8 VCC Figure1. Pin Configuration ○Product structure：Silicon monolithic integrated circuit www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･14･001 ○This product has no designed protection against radioactive rays. 1/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Ordering Information L M 4 5 6 5 Part Number LM4565xxx x x x Package F : SOP8 FJ : SOP-J8 FV : SSOP-B8 FVT : TSSOP-B8 FVM : MSOP8 FVJ : TSSOP-B8J - x x Packaging and forming specification E2: Embossed tape and reel (SOP8/SOP-J8/SSOP-B8/TSSOP-B8/TSSOP-B8J) TR: Embossed tape and reel (MSOP8) Line-up Topr Package Orderable Part Number SOP8 Reel of 2500 LM4565F-E2 SOP-J8 Reel of 2500 LM4565FJ-E2 SSOP-B8 Reel of 2500 LM4565FV-E2 TSSOP-B8 Reel of 3000 LM4565FVT-E2 MSOP8 Reel of 3000 LM4565FVM-TR TSSOP-B8J Reel of 2500 LM4565FVJ-E2 -40°C to +85°C Absolute Maximum Ratings (TA=25°C) Parameter Supply Voltage Symbol Rating Unit VCC - VEE +36 V (Note 1,5) SOP8 Power Dissipation Differential Input Voltage Input Common-mode Voltage Range Operating Voltage PD (Note 6) 0.68 SOP-J8 0.67(Note 2,5) SSOP-B8 0.62(Note 3,5) W (Note 3,5) TSSOP-B8 0.62 MSOP8 0.58(Note 4,5) TSSOP-B8J 0.58(Note 4,5) VID +36 V VICM (VEE - 0.3) to (VEE + 36) V Vopr ±2 to ±18 V Operating Temperature Topr - 40 to +85 °C Storage Temperature Maximum Junction Temperature Tstg - 55 to +150 °C TJmax +150 °C (Note 1) When used at temperature above TA=25°C, reduce by 5.5mW/°C. (Note 2) When used at temperature above TA=25°C, reduce by 5.4mW/°C. (Note 3) When used at temperature above TA=25°C, reduce by 5.0mW/°C. (Note 4) When used at temperature above TA=25°C, reduce by 4.7mW/°C. (Note 5) Mounted on a FR4 glass epoxy PCB(70mm×70mm×1.6mm). (Note 6) The differential input voltage is the voltage difference between inverting input and non-inverting input. Input terminal voltage is set to more than VEE. Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 2/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Electrical Characteristics: ○LM4565xxx (Unless otherwise specified VCC = +15V, VEE = -15V) Parameter Symbol Limit Temperature Range Min Typ Max Unit Conditions Input Offset Voltage (Note 7) VIO 25°C - 0.5 1.5 mV Input Offset Current (Note 7) IIO 25°C - 2 50 nA - Input Bias Current (Note 7) IB 25°C - 70 250 nA - 25°C - 4.5 7 mA RL=∞, All Op-Amps +IN=0V Supply Current (Note 8) ICC RS≤10kΩ Full range - - 8.5 25°C 86 100 - dB RL≥2kΩ, OUT=±10V 25°C ±12 ±14 - V RL≥2kΩ 25°C ±11 ±12.5 - V IO=25mA VICM 25°C ±12 ±14 - V ISOURCE 25°C - 130 - mA ISINK 25°C - 160 - mA Common-mode Rejection Ratio CMRR 25°C 80 100 - dB RL≤10kΩ Power Supply Rejection Ratio PSRR 25°C 82 100 - dB RL≤10kΩ SR 25°C - 5 - V/μs RL=2kΩ, CL=100pF fT 25°C MHz RL=2kΩ GBW 25°C - 10 - MHz RL=2kΩ, f=100kHz θ 25°C - 40 - deg RL=2kΩ - 0.6 - AV=40dB µVrms RS=100Ω DIN-AUDIO - 5 - nV/ Hz Large Signal Voltage Gain AV Maximum Output Voltage VOM Input Common-mode Voltage Range Output Source Current (Note 9) Output Sink Current (Note 9) Slew Rate Unity Gain Frequency Gain Bandwidth Phase Margin Input Referred Noise Voltage Total Harmonic Distortion + Noise Channel Separation VN 4 25°C +IN=1V, -IN=0V OUT=-15V 1CH is short circuit +IN=0V, -IN=1V OUT=+15V 1CH is short circuit AV=40dB, VICM=0V RS=100Ω, f=1kHz THD+N 25°C - 0.0002 - % Av=20dB, f=1kHz OUT=5Vrms CS 25°C - 110 - dB AV=40dB, f=1kHz OUT=1Vrms (Note 7) Absolute value. (Note 8) Full range: TA=-40°C to +85°C (Note 9) Please consider the power dissipation when selecting the output current. When the output terminal is continuously shorted the output current reduces the internal temperature by flushing. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 3/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Description of Electrical Characteristics Described here are the terms of electric characteristics used in this datasheet. Items and symbols used are also shown. Note that item name, symbol and their meaning may differ from those on other manufacturer’s document or general documents. 1. Absolute maximum ratings Absolute maximum rating items indicate the condition which must not be exceeded. Application of voltage in excess of absolute maximum rating or use out of absolute maximum rated temperature environment may cause deterioration of characteristics. (1) Supply Voltage (VCC/VEE) Indicates the maximum voltage that can be applied between the positive power supply terminal and negative power supply terminal without deterioration or destruction of characteristics of internal circuit. (2) Differential Input Voltage (VID) Indicates the maximum voltage that can be applied between non-inverting and inverting terminals without damaging the IC. (3) Input Common-mode Voltage Range (VICM) Indicates the maximum voltage that can be applied to the non-inverting and inverting terminals without deterioration or destruction of electrical characteristics. Input common-mode voltage range of the maximum ratings does not assure normal operation of IC. For normal operation, use the IC within the input common-mode voltage range characteristics. (4) Power dissipation (PD) Indicates the power that can be consumed by the IC when mounted on a specific board at the ambient temperature 25℃ (normal temperature). As for package product, PD is determined by the temperature that can be permitted by the IC in the package (maximum junction temperature) and the thermal resistance of the package. 2. Electrical characteristics item (1) Input Offset Voltage (VIO) Indicates the voltage difference between non-inverting terminal and inverting terminals. It can be translated into the input voltage difference required for setting the output voltage at 0 V. (2) Input Offset Current (IIO) Indicates the difference of input bias current between the non-inverting and inverting terminals. (3) Input Bias Current (IB) Indicates the current that flows into or out of the input terminal. It is defined by the average of input bias currents at the non-inverting and inverting terminals. (4) Supply Current (ICC) Indicates the current that flows within the IC under specified no-load conditions. (5) Large Signal Voltage Gain (AV) Indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting terminal and inverting terminal. It is normally the amplifying rate (gain) with reference to DC voltage. Av = (Output voltage) / (Differential Input voltage) (6) Maximum Output Voltage (VOM) Indicates the voltage range that the IC can output under specified load condition. It is typically divided into high-level output voltage and low-level output voltage. High-level output voltage indicates the upper limit of output voltage. Low-level output voltage indicates the lower limit. (7) Input Common-mode Voltage Range (VICM) Indicates the input voltage range where IC operates normally. (8) Output Source Current/ Output Sink Current (ISOURCE / ISINK) The maximum current that can be output from the IC under specific output conditions. The output source current indicates the current flowing out from the IC, and the output sink current indicates the current flowing into the IC. (9) Common-mode Rejection Ratio (CMRR) Indicates the ratio of fluctuation of input offset voltage when the input common-mode voltage is changed. It is normally the fluctuation of DC. CMRR = (Change of Input common-mode voltage)/(Input offset fluctuation) (10) Power Supply Rejection Ratio (PSRR) Indicates the ratio of fluctuation of input offset voltage when supply voltage is changed. It is normally the fluctuation of DC. PSRR= (Change of power supply voltage)/(Input offset fluctuation) (11) Slew Rate (SR) Indicates the ratio of the change in output voltage with time when a step input signal is applied. (12) Unity Gain Frequency (fT) Indicates a frequency where the voltage gain of operational amplifier is 1. (13) Gain Bandwidth (GBW) Indicates to multiply by the frequency and the gain where the voltage gain decreases 6dB/octave. (14) Phase Margin (θ) Indicates the margin of phase from 180 degree phase lag at unity gain frequency. (15) Input Referred Noise Voltage (VN) Indicates a noise voltage generated inside the operational amplifier reflected back to an ideal voltage source connected in series with the input terminal. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 4/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx (16) Total Harmonic Distortion + Noise (THD+N) Indicates the fluctuation of input offset voltage or that of output voltage with reference to the change of output voltage of driven channel. (17) Channel Separation (CS) Indicates the fluctuation in the output voltage of the driven channel with reference to the change of output voltage of the channel which is not driven. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 5/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Typical Performance Curves ○LM4565xxx 1.0 8 7 0.8 Supply Current [mA] Power Dissipation [W] LM4565FJ 0.6 -40°C 6 LM4565F LM4565FV LM4565FVT LM4565FVM LM4565FVJ 0.4 5 25°C 4 3 85°C 2 0.2 1 0.0 0 85 0 25 50 75 100 125 150 ±0 ±3 ±6 ±9 ±12 ±15 Ambient Temperature [°C] Supply Voltage [V] Figure 2. Power Dissipation vs Ambient Temperature (Derating Curve) Figure 3. Supply Current vs Supply Voltage 8 20 7 15 ±18 -40°C Maximum Output Voltage [V] 25°C Supply Current [mA] 6 10 5 4 3 2 5 0 85°C 25°C -5 -40°C -10 1 -15 0 -50 85°C -20 -25 0 25 50 75 Ambient Temperature [°C] 100 ±0 ±5 ±10 ±15 Supply Voltage [V] ±20 Figure 5. Maximum Output Voltage vs Supply Voltage (RL=2kΩ, TA=25°C) Figure 4. Supply Current vs Ambient Temperature (VCC/VEE=±15V) (*)The above characteristics are measurements of typical sample, they are not guaranteed. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 6/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Typical Performance Curves (Reference data) – continued ○LM4565xxx 20 20 15 15 Maximum Output Voltage [V] Maximum Output Voltage [V] -40°C 25°C 10 10 5 0 -5 85°C 5 0 85°C 25°C -5 -40°C -10 -10 -15 -15 -20 -50 -20 -25 0 25 50 75 ±0 100 ±5 Ambient Temperature [°C] ±10 ±15 Supply Voltage [V] ±20 Figure 7. Maximum Output Voltage vs Supply Voltage (IO=25mA, TA=25°C) Figure 6. Maximum Output Voltage vs Ambient Temperature (VCC/VEE=±15V, RL=2KΩ) 20 3 15 10 Input Offset Voltage [mV] Maximum Output Voltage [V] 2 5 0 -5 1 0 -1 -10 -2 -15 -20 -50 -3 -25 0 25 50 75 100 -50 Ambient Temperature [°C] -25 0 25 50 75 Ambient Temperature [°C] 100 Figure 9. Input Offset Voltage vs Ambient Temperature (VCC/VEE=±15V) Figure 8. Maximum Output Voltage vs Ambient Temperature (VCC/VEE=±15V, IO=25mA) (*)The above characteristics are measurements of typical sample, they are not guaranteed. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 7/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Typical Performance Curves (Reference data) – continued 3 150 2 125 Input Bias Current [nA] Input Offset Voltage [mV] ○LM4565xxx 1 -40°C 0 25°C 85°C -1 100 75 50 25 -2 0 -3 -15 -10 -5 0 5 10 Input Common Mode Voltage [V] -50 15 Figure 10. Input Offset Voltage vs Input Common mode Voltage (VCC/VEE=±15V) 0 25 50 75 Ambient Temperature [°C] 100 Figure 11. Input Bias Current vs Ambient Temperature (VCC/VEE=±15V) 140 130 Common Mode Rejection Ratio [dB] Large Signal Voltage Gain [dB] . -25 130 120 110 100 90 120 110 100 80 90 80 70 -50 -25 0 25 50 75 100 -50 Ambient Temperature [°C] -25 0 25 50 75 Ambient Temperature [°C] 100 Figure 13. Common Mode Rejection Ratio vs Ambient Temperature (VCC/VEE=±15V) Figure 12. Large Signal Voltage Gain vs Ambient Temperature (VCC/VEE=±15V, RL=2kΩ) (*)The above characteristics are measurements of typical sample, they are not guaranteed. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 8/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Typical Performance Curves (Reference data) - continued ○LM4565xxx 10 8 120 Slew Rate L-H [V/µs] Power Supply Rejection Ratio [dB] 140 100 80 6 4 2 0 60 -50 -25 0 25 50 75 Ambient Temperature [°C] -50 100 -25 0 25 50 75 100 Ambient Temperature [°C] Figure 15. Slew Rate L-H vs Ambient Temperature (VCC/VEE=±15V, RL=2kΩ, CL=100pF) Figure 14. Power Supply Rejection Ratio vs Ambient Temperature 10 200 100 Phase 8 80 6 4 60 100 Gain 40 50 2 20 0 0 -50 -25 0 25 50 75 100 102 103 104 105 106 Frequency [Hz] 107 108 0 Ambient Temperature [°C] Figure 16. Slew Rate H-L vs Ambient Temperature (VCC/VEE=±15V, RL=2kΩ, CL=100pF) Figure 17. Voltage Gain・Phase vs Frequency (VCC/VEE=±15V, RL=2kΩ) (*)The above characteristics are measurements of typical sample, they are not guaranteed. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 9/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Phase [deg] Voltage Gain [dB] Slew Rate H-L [V/µs] 150 Datasheet LM4565xxx Typical Performance Curves (Reference data) - continued ○LM4565xxx 30 Input Referred Noise Voltage [nV/√Hz] 0.1 0.01 0.001 20Hz 1kHz 20kHz 25 20 15 10 5 0 0.0001 0.01 0.1 1 10 100 Output Voltage [Vrms] 1 10 103 102 Frequency [Hz] 104 105 Figure 19. Figure 18. Total Harmonic Distortion vs Output Voltage (VCC/VEE=±15V, RL=2kΩ, f=1kHz) Input Referred Noise Voltage vs Frequency (VCC/VEE=±15V, TA=25°C, AV=40dB) 1.0 Input Referred Noise Voltage [µVrms] Total Harmonic Distortion [%] 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 ±0 ±5 ±10 ±15 Supply Voltage [V] ±20 Figure 20. Input Referred Noise Voltage vs Supply Voltage (TA=25°C, DIN-AUDIO) (*)The above characteristics are measurements of typical sample, they are not guaranteed. www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 10/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Application Information NULL method condition for Test Circuit 1 VCC, VEE, EK, VICM Unit:V Parameter Input Offset Voltage VF S1 S2 S3 VCC VEE EK VICM Calculation VF1 ON ON OFF 15 -15 0 0 1 ON ON ON 15 -15 0 2 -10 VF2 Large Signal Voltage Gain VF3 10 VF4 Common Mode Rejection Ratio (Input Common-mode Voltage Range) -10 ON ON OFF 15 -15 0 3 VF5 10 VF6 Power Supply Rejection Ratio ON ON 4 -4 18 -18 OFF VF7 0 0 4 － Calculation－ VIO = 1. Input Offset Voltage (VIO) AV 2. Large Signal Voltage Gain (AV) |VF1| [V] 1+RF/RS = 20Log ∆EK × (1+RF/RS) [dB] |VF2-VF3| 3. Common-mode Rejection Ratio (CMRR) CMRR = 20Log ∆VICM × (1+RF/RS) [dB] |VF4 - VF5| 4. Power Supply Rejection Ratio (PSRR) PSRR = 20Log ∆VCC × (1+ RF/RS) [dB] |VF6 - VF7| 0.1µF RF=50kΩ 0.1µF 500kΩ SW1 VCC EK RS=50Ω 15V VO RI=10kΩ 500kΩ 0.1µF 0.1µF DUT NULL SW3 RS=50Ω RI=10kΩ 1000pF VICM 50kΩ VF RL VEE VRL -15V Figure21. Test Circuit 1 www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 11/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Switch Condition for Test Circuit 2 SW No. SW1 SW2 SW3 SW4 SW5 SW6 SW7 SW8 SW9 SW10 SW11 SW12 Supply Current OFF OFF ON OFF ON OFF OFF OFF OFF OFF OFF OFF Maximum Output Voltage RL=2kΩ OFF OFF OFF ON OFF OFF Slew Rate OFF OFF Maximum Frequency ON ON ON OFF OFF ON OFF OFF OFF OFF OFF OFF OFF OFF OFF ON ON ON ON OFF ON OFF OFF ON ON OFF OFF ON Input voltage SW3 R2 100kΩ SW4 ● VH VCC=30V － VL SW1 SW2 ＋ SW5 SW6 t SW8 SW7 SW9 SW10 SW11 SW12 Input wave Output voltage R1 1kΩ VEE 90% SR=ΔV/Δt VH VIN- RL VIN+ CL VO ΔV 10% VL Δt Figure 22. Test Circuit2 t Output wave Figure 23. Slew Rate Input Output Wave R2=100kΩ R2=100kΩ VCC VCC R1=1kΩ R1//R2 VIN VEE R1=1kΩ OUT1 =1Vrms OUT2 R1//R2 VEE CS=20Log 100×OUT1 OUT2 Figure 24. Test Circuit 3 (Channel Separation) www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 12/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Application Example ○Voltage Follower Voltage gain is 0dB. Using this circuit, the output voltage (OUT) is controlled to be equal to the input voltage (IN). This circuit also stabilizes OUT due to high input impedance and low output impedance. Computation for OUT is shown below. OUT=IN VCC OUT IN VEE Figure 25. Voltage Follower ○Inverting Amplifier R2 VCC R1 IN OUT R1//R2 For inverting amplifier, IN is amplified by a voltage gain decided by the ratio of R1 and R2.The out-of-phase output voltage is shown in the next expression. OUT=-(R2/R1)・IN This circuit has input impedance equal to R1. VEE Figure 26. Inverting Amplifier Circuit ○Non-inverting amplifier R1 R2 VCC OUT For non-inverting amplifier, IN is amplified by a voltage gain decided by the ratio of R1 and R2. OUT is in-phase with Vin and is shown in the next expression. OUT=(1+R2/R1)・IN Effectively, this circuit has high input impedance since its input side is the same as that of the operational amplifier. IN VEE Figure 27. Non-inverting Amplifier Circuit www.rohm.com ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111･15･001 13/24 TSZ02201-0RAR0G200590-1-2 15.Apr.2014 Rev.003 Datasheet LM4565xxx Power Dissipation Power dissipation (total loss) indicates the power that the IC can consume at TA=25°C (normal temperature). As the IC consumes power, it heats up, causing its temperature to be higher than the ambient temperature. The allowable temperature that the IC can accept is limited. This depends on the circuit configuration, manufacturing process, and consumable power. Power dissipation is determined by the allowable temperature within the IC (maximum junction temperature) and the thermal resistance of the package used (heat dissipation capability). Maximum junction temperature is typically equal to the maximum storage temperature. The heat generated through the consumption of power by the IC radiates from the mold resin or lead frame of the package. Thermal resistance, represented by the symbol θJA °C/W, indicates this heat dissipation capability. Similarly, the temperature of an IC inside its package can be estimated by thermal resistance. Figure 28(a) shows the model of the thermal resistance of the package. The equation below shows how to compute for the Thermal resistance (θJA), given the ambient temperature (TA), maximum junction temperature (TJmax), and power dissipation (PD). θJA = (TJmax－TA) / PD °C/W ・・・・・ (Ⅰ) The derating curve in Figure 28(b) indicates the power that the IC can consume with reference to ambient temperature. Power consumption of the IC begins to attenuate at certain temperatures. This gradient is determined by Thermal resistance (θJA), which depends on the chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc. This may also vary even when the same of package is used. Thermal reduction curve indicates a reference value measured at a specified condition. Figure 28(c) shows an example of the derating curve for LM4565xxx. LSIの 消 費 力 [W] Power dissipation of 電 LSI P Pd (max) Dmax θJA=(TJmax-TA)/ PD °C/W θθja2 θja1 JA2