SSO-AD-500NIR-TO52-S1

SSO-AD-500 NIR-TO52-S1 Avalanche Photodiode NIR Special characteristics: quantum efficiency >80% at ! 760-910 nm high speed, low noise 500 µm diameter active area low slope multiplication curve Parameters: active area dark current (M=100) 1) Total capacitance (M=100) Break-down voltage UBR (at ID=2µA) Temperature coefficient of UBR Spectral responsivity (at 780 nm) Cut-off frequency (-3dB) Rise time Optimum gain Gain M "Exess Noise" factor (M=100) "Exess Noise" index (M=100) Noise current (M=100) N.E.P. (M=100, 880 nm) Operating temperature Storage temperature 50 - 60 min 200 1) Package (TO52 S1) : 0,196 mm ∅ 500 µm max. 5 nA typ. 0,5 - 1 nA typ. 1,2 pF 120 - 300 V typ. 0,55 %/°C min. 0,55 A/W typ. 0,60 A/W 400 MHz 550 MHz 550 ps 300 ps 2 typ. 2,5 typ. 0,2 typ. 1 pA/Hz ½ typ. 2 * 10 W/Hz -20 ... +70°C -60 ... +100°C -14 ½ 1) measurement conditions: Setup of photo current 10nA at M=1 and irradiation by a NIR-LED (880 nm, 80 nm bandwith). Rise of the photo current up to 1 µA, (M=100) by internal multiplication due to an increasing bias voltage. SSO-AD-series Spectral Responsivity at M=1 0,700 0,600 0,500 Sabs (A/W) Sabs (A/W) 70,00 60,00 50,00 40,00 30,00 20,00 10,00 0,00 SSO-AD-series Spectral Responsivity at M=100 0,400 0,300 0,200 0,100 0,000 400 500 600 700 800 900 1000 1100 400 500 600 700 800 900 1000 1100 Wavelength (nm) Wavelength (nm) SSO-AD-series QE for M=100 100,0 90,0 80,0 70,0 60,0 QE 50,0 40,0 30,0 20,0 10,0 0,0 400 500 600 700 800 900 1000 1100 Wavelength (nm) SSO-AD 500 Id = f(Ur/Ubr) 10,000 SSO-AD 500 gain= f(Ur/Ubr) 1000,00 1,000 Id [nA] 100,00 0,100 M 10,00 0,010 0,001 0,000 0,100 0,200 0,300 0,400 0,500 0,600 0,700 0,800 0,900 1,000 1,00 0,000 0,100 0,200 0,300 0,400 0,500 0,600 0,700 0,800 0,900 1,000 Ur/Ubr Ur/Ubr Maximum Ratings: • • • • max. electrical power dissipation max. optical peak value, once max. continous optical operation ( Pelectr. = Popt. * Sabs * M * UR ) 100 mW at 22°C 200 mW for 1 s IPh (DC) ≤ 250 µA ≤ 1 mA for signal 50 µs "on" / 1 ms "out" Bias supply voltage Current limiting resistor Application hints: • • • • • • • Current limit is to be realized via protecting resistor or current limiting - IC inside the supply voltage. Use of low noise read-out - IC. For higher gain a regulation of bias voltage due to the temperature is to be realized. For very small signals stray light (noise source) is to be excluded by filters in order to improve the signal-noise relation. Avoid touching the window with fingers! Careful cleaning with Ethyl alcohol possible. Avoid use of pointed and scratching tools! min. 0,1 µF, closest to APD APD Diode, protective circuit Read-out circuit or f.e. 50Ω Load resistance Handling precautions: • • • Soldering temperature min. Pin - length ESD - protection Storage 260°C for max. 10 s. The device must be protected against solder flux vapour! 2mm Only small danger for the device. Standard precautionary measures are sufficient. Store devices in conductive foam. 2000/12 •