BSS192,115

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia SO T8 9 BSS192 240 V, P-channel vertical D-MOS transistor 12 December 2014 Product data sheet 1. General description P-channel enhancement mode vertical Double-Diffused Field-Effect Transistor (DMOSFET) in a SOT89 (SC-62) medium power and flat lead Surface Mounted Device (SMD) plastic package. 2. Features and benefits • • • Direct interface to Complementary (C-MOS) transitor and Transistor-Transistor Logic (TTL) devices Very fast switching No secondary breakdown 3. Applications • • • • Relay driver High-speed line driver High-side loadswitch Switching circuits 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj = 25 °C - - -240 V VGS gate-source voltage -20 - 20 V ID drain current - - -200 mA - 10 12 Ω VGS = -10 V; Tamb = 25 °C [1] Static characteristics RDSon drain-source on-state resistance [1] VGS = -10 V; ID = -200 mA; Tj = 25 °C Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for 2 drain 1 cm . Scan or click this QR code to view the latest information for this product BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 S source 2 D drain 3 G gate Simplified outline Graphic symbol D G 3 2 1 SOT89 S 017aaa257 6. Ordering information Table 3. Ordering information Type number BSS192 Package Name Description Version SOT89 plastic surface-mounted package; die pad for good heat transfer; SOT89 3 leads 7. Marking Table 4. Marking codes Type number Marking code BSS192 KB BSS192 Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 2 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj = 25 °C - -240 V VGS gate-source voltage -20 20 V ID drain current VGS = -10 V; Tamb = 25 °C; t ≤ 5 s [1] - -340 mA VGS = -10 V; Tamb = 25 °C [1] - -200 mA VGS = -10 V; Tamb = 100 °C [1] - -120 mA - -800 mA [2] - 560 mW [1] - 1 W - 12.5 W IDM peak drain current Tamb = 25 °C; single pulse; tp ≤ 10 µs Ptot total power dissipation Tamb = 25 °C Tsp = 25 °C Tj junction temperature -55 150 °C Tamb ambient temperature -55 150 °C Tstg storage temperature -65 150 °C - -200 mA Source-drain diode IS source current BSS192 Product data sheet Tamb = 25 °C [1] [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for [2] drain 1 cm . Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 2 All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 3 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 017aaa123 120 Pder (%) Ider (%) 80 80 40 40 0 - 75 Fig. 1. 017aaa124 120 - 25 25 75 125 Tj (°C) 0 - 75 175 MOSFET transistor: Normalized total power dissipation as a function of junction temperature Fig. 2. - 25 25 75 125 Tj (°C) 175 MOSFET transistor: Normalized continuous drain current as a function of junction temperature aaa-014702 -1 tp = 100 µs Limit RDSon = VDS/ID ID (A) tp = 1 ms tp = 10 ms -10-1 tp = 100 ms DC; Tsp = 25 °C -10-2 DC; Tamb = 25 °C; drain mounting pad 1 cm2 -10-3 -10-1 -1 -10 -102 -103 VDS (V) IDM = single pulse Fig. 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drainsource voltage 9. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air BSS192 Product data sheet t≤5s All information provided in this document is subject to legal disclaimers. 12 December 2014 Min Typ Max Unit [1] - 194 225 K/W [2] - 108 125 K/W [2] - 37 42 K/W © NXP Semiconductors N.V. 2014. All rights reserved 4 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor Symbol Parameter Rth(j-sp) thermal resistance from junction to solder point [1] [2] Conditions Min Typ Max Unit - 4 10 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. aaa-014703 103 Zth(j-a) (K/W) 2 Device mounted on an FR4 PCB, single-sided copper, tin-plated and mounting pad for drain 1 cm . duty cycle = 1 102 0.75 0.5 0.33 0.25 0.2 0.1 10 0.05 0.02 0.01 0 1 10-3 10-2 10-1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values aaa-014704 103 Zth(j-a) (K/W) 102 duty cycle = 1 0.75 0.33 0.2 10 0.5 0.25 0.1 0.05 0.01 0.02 0 1 10-3 10-2 10-1 FR4 PCB, mounting pad for drain 1 cm Fig. 5. 1 10 102 tp (s) 103 2 Transient thermal impedance from junction to ambient as a function of pulse duration; typical values BSS192 Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 5 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 10. Characteristics Table 7. Characteristics Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = -10 µA; VGS = 0 V; Tj = 25 °C -240 - - V VGSth gate-source threshold voltage ID = -1 mA; VDS = VGS; Tj = 25 °C -0.8 - -2.8 V IDSS drain leakage current VDS = -200 V; VGS = 0.2 V; Tj = 25 °C - -0.1 -60 µA VDS = -60 V; VGS = 0 V; Tj = 25 °C - - -200 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - - -100 nA VGS = -10 V; ID = -200 mA; Tj = 25 °C - 10 12 Ω VGS = -10 V; ID = -200 mA; Tj = 150 °C - 21 25 Ω VGS = -4.5 V; ID = -100 mA; Tj = 25 °C - 13 18 Ω VDS = -10 V; ID = -200 mA; Tj = 25 °C - 200 - mS IGSS RDSon gfs gate leakage current drain-source on-state resistance forward transconductance Dynamic characteristics QG(tot) total gate charge VDS = -50 V; ID = -250 mA; VGS = -10 V; - 1.9 5 nC QGS gate-source charge Tj = 25 °C - 0.3 - nC QGD gate-drain charge - 0.6 - nC Ciss input capacitance VDS = -25 V; f = 1 MHz; VGS = 0 V; - 55 90 pF Coss output capacitance Tj = 25 °C - 20 30 pF Crss reverse transfer capacitance - 5 15 pF td(on) turn-on delay time VDS = -50 V; ID = -250 mA; VGS = -10 V; - 3.2 6 ns tr rise time RG(ext) = 6 Ω; Tj = 25 °C - 4.6 6 ns td(off) turn-off delay time - 11.7 20 ns tf fall time - 7 12 ns - 0.86 1.2 V Source-drain diode VSD source-drain voltage BSS192 Product data sheet IS = -200 mA; VGS = 0 V; Tj = 25 °C All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 6 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor aaa-014705 -1.0 VGS = -10 V ID (A) -0.8 aaa-014706 -10-3 ID (A) -6 V -10-4 -0.6 min -5 V -0.4 typ max -10-5 -4 V -0.2 -3 V 0 Fig. 6. 0 -4 -8 -12 -10-6 -16 -20 VDS (V) 0 -1 -2 VGS (V) -3 Tj = 25 °C Tj = 25 °C; VDS = -10 V Output characteristics: drain current as a Fig. 7. function of drain-source voltage; typical values Sub-threshold drain current as a function of gate-source voltage aaa-014707 40 RDSon aaa-014708 60 -4 V RDSon (Ω) 30 40 20 -5 V Tj = 150 °C 20 10 VGS = -10 V 0 0 -0.2 -0.4 -0.6 Tj = 25 °C -0.8 ID (A) 0 -1.0 Tj = 25 °C Fig. 8. Product data sheet -2 -4 -6 -8 -10 VGS (V) ID = -200 mA Drain-source on-state resistance as a function of drain current; typical values BSS192 0 Fig. 9. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 7 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor aaa-014709 -1.0 aaa-014710 2.5 ID (A) a -0.8 2.0 Tj = 150 °C -0.6 1.5 Tj = 25 °C -0.4 1.0 -0.2 0.5 0 0 -2 -4 -6 -8 0 -60 -10 VGS (V) VDS > ID × RDSon Fig. 10. Transfer characteristics: drain current as a function of gate-source voltage; typical values aaa-014711 -3.2 VGS(th) (V) 0 60 120 180 Fig. 11. Normalized drain-source on-state resistance as a function of junction temperature; typical values aaa-014712 103 max Tj (°C) C (pF) -2.4 102 Ciss typ -1.6 Coss 10 min -0.8 Crss 0 -60 0 60 120 Tj (°C) 1 -10-1 180 ID = -1 mA; VDS = VGS Product data sheet -10 VDS (V) -102 f = 1 MHz; VGS = 0 V Fig. 12. Gate-source threshold voltage as a function of junction temperature BSS192 -1 Fig. 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 8 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor aaa-014713 -10 VDS VGS (V) ID -8 VGS(pl) -6 VGS(th) VGS -4 QGS1 QGS2 QGS -2 QGD QG(tot) 017aaa137 0 0 0.5 1 1.5 QG (nC) Fig. 15. MOSFET transistor: Gate charge waveform definitions 2 ID = -0.25 A; VDS = -50 V; Tamb = 25 °C Fig. 14. Gate-source voltage as a function of gate charge; typical values aaa-014714 -1.0 IS (A) -0.8 Tj = 150 °C -0.6 -0.4 -0.2 0 Tj = 25 °C 0 -0.4 -0.8 -1.2 VSD (V) -1.6 VGS = 0 V Fig. 16. Source current as a function of source-drain voltage; typical values 11. Test information P t2 duty cycle δ = t1 t2 t1 t 006aaa812 Fig. 17. Duty cycle definition BSS192 Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 9 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 12. Package outline Plastic surface-mounted package; exposed die pad for good heat transfer; 3 leads SOT89 B D A bp3 E 1 2 HE Lp 3 c bp2 w M B bp1 e1 e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A bp1 bp2 bp3 c D E e e1 HE Lp w mm 1.6 1.4 0.48 0.35 0.53 0.40 1.8 1.4 0.44 0.23 4.6 4.4 2.6 2.4 3.0 1.5 4.25 3.75 1.2 0.8 0.13 OUTLINE VERSION REFERENCES IEC SOT89 JEDEC JEITA TO-243 SC-62 EUROPEAN PROJECTION ISSUE DATE 06-03-16 06-08-29 Fig. 18. Package outline SOT89 BSS192 Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 10 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 13. Soldering 4.75 2.25 2 1.9 1.2 0.2 0.85 solder lands 1.7 1.2 4.6 solder resist 0.5 1 (3×) 4.85 occupied area 1.1 (2×) 1.5 solder paste Dimensions in mm 1.5 0.6 (3×) 0.7 (3×) 3.95 sot089_fr Fig. 19. Reflow soldering footprint for SOT89 6.6 2.4 3.5 solder lands 7.6 0.5 solder resist occupied area 1.8 (2×) Dimensions in mm preferred transport direction during soldering 1.9 1.5 (2×) 1.9 0.7 5.3 sot089_fw Fig. 20. Wave soldering footprint for SOT89 BSS192 Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 11 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor 14. Revision history Table 8. Revision history Data sheet ID Release date Data sheet status Change notice Supersedes BSS192 v.4 20141212 Product data sheet - BSS192 v.3 Modifications: • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors Legal texts have been adapted to the new company name where appropriate BSS192 v.3 20021120 - BSS192 v.2 BSS192 v.2 20020522 - BSS192 v.1 BSS192 v.1 19970620 BSS192 Product data sheet - All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 12 / 15 BSS192 NXP Semiconductors 240 V, P-channel vertical D-MOS transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 15. Legal information 15.1 Data sheet status Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Marking ................................................................... 2 8 Limiting values .......................................................3 9 Thermal characteristics .........................................4 10 Characteristics ....................................................... 6 11 Test information ..................................................... 9 12 Package outline ................................................... 10 13 Soldering .............................................................. 11 14 Revision history ................................................... 12 15 15.1 15.2 15.3 15.4 Legal information .................................................13 Data sheet status ............................................... 13 Definitions ...........................................................13 Disclaimers .........................................................13 Trademarks ........................................................ 14 © NXP Semiconductors N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 12 December 2014 BSS192 Product data sheet All information provided in this document is subject to legal disclaimers. 12 December 2014 © NXP Semiconductors N.V. 2014. All rights reserved 15 / 15