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STR5A162D

STR5A162D

  • 厂商:

    SANKEN(三垦)

  • 封装:

    DIP7

  • 描述:

    IC PWM CTLR AC/DC 8DIP

  • 数据手册
  • 价格&库存
STR5A162D 数据手册
Primary Side Regulation Off-Line PWM Controllers with Integrated Power MOSFET STR5A100D Series General Descriptions Package The STR5A100D series is power IC with primary side regulation for switching power supplies, incorporating a sense MOSFET and a current mode PWM controller IC. Employing the Primary Side Regulation, the product achieves power supply systems with few external components. Including a startup circuit and a standby function in the controller, the product achieves the low standby power by the automatic switching between the PWM operation in normal operation and the burst-oscillation under light load conditions. The rich set of protection features helps to realize low component counts, and high performance-to-cost power supply. DIP8 Typical Application Circuit D50 T1 C3 COMP VCC 2 7 S/GND 6 S/GND 5 S/GND 4 Lineup  Electrical Characteristics VD/ST(max.) = 730 V fOSC(AVG)(typ.) = 65 kHz RDS(ON) (max.) Products IDLIM(H) STR5A162D 24.6 Ω 0.285 A STR5A164D 13 Ω 0.41 A  Output Power, POUT* Adapter Products AC85 Open frame AC230V ~265V AC230V AC85 ~265V STR5A162D 4W 3.5 W 5W 4.5 W STR5A164D 6.0 W 5.5 W 8.5 W 7W * The EI-16 core of transformer is assumed. The output power is actual continues power that is measured at 50 °C ambient. The peak output power can be 120 to 140 % of the value stated here. Core size, ON Duty, and thermal design affect the output power. It may be less than the value stated here. Applications L1 VAC C2 8 Not to scale  Primary Side Regulation  Constant Voltage (CV), Constant Current (CC) Control  Auto Standby Function No Load Power Consumption < 30mW  Operation Mode ・Normal Operation -------------------------- PWM Mode ・Light Load Operation ----------------------Green-Mode ・Standby ------------------------- Burst Oscillation Mode  Build-in Startup Circuit (reducing power consumption at standby operation, shortening the startup time)  Current Mode Type PWM Control  Random Switching Function  Leading Edge Blanking Function  Soft Start Function (reducing the stress of power MOSFET and secondary side rectifier diode at startup)  Protections Overcurrent Protection (OCP) ------------ Pulse-by-Pulse Overvoltage Protection (OVP) ------------- Auto-Restart Thermal Shutdown Protection (TSD) ----- Auto-Restart C1 1 D/ST Features BR1 FB VOUT (+) R1 R51 C51  White Goods  Other SMPS P R2 U1 S/GND D1 D/ST C52 R52 4 NC 5 S1 S/GND 6 C6 C5 R7 7 D2 S/GND VCC COMP FB R6 (-) 2 R3 8 STR5A100D D 1 R4 C4 R5 STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 1 STR5A100D Series Contents General Descriptions ----------------------------------------------------------------------- 1 1. Absolute Maximum Ratings --------------------------------------------------------- 3 2. Recommended Operating Conditions --------------------------------------------- 3 3. Electrical Characteristics ------------------------------------------------------------ 3 4. Performance Curves ------------------------------------------------------------------ 5 5. Functional Block Diagram ----------------------------------------------------------- 6 6. Pin Configuration Definitions ------------------------------------------------------- 6 7. Typical Application Circuit --------------------------------------------------------- 6 8. Physical Dimensions------------------------------------------------------------------- 7 9. Marking Diagram --------------------------------------------------------------------- 7 10. Operational Description -------------------------------------------------------------- 8 10.1 Startup Operation ------------------------------------------------------------ 8 10.2 Undervoltage Lockout (UVLO) ------------------------------------------- 8 10.3 Auxiliary Winding------------------------------------------------------------ 8 10.4 Soft Start Function ----------------------------------------------------------- 9 10.5 Primary Side Regulation (PSR) ------------------------------------------- 9 10.6 Constant Voltage (CV) Control ------------------------------------------ 10 10.7 Constant Current (CC) Control ------------------------------------------ 10 10.8 Leading Edge Blanking Function ---------------------------------------- 11 10.9 Random Switching Function ---------------------------------------------- 11 10.10 Auto Standby Function ----------------------------------------------------- 11 10.11 Overcurrent Protection Function (OCP) ------------------------------- 11 10.12 Overvoltage Protection (OVP) -------------------------------------------- 12 10.13 Thermal Shutdown Protection (TSD) ----------------------------------- 12 11. Design Notes --------------------------------------------------------------------------- 13 11.1 External Components------------------------------------------------------- 13 11.2 PCB Trace Layout and Component Placement ----------------------- 15 12. Pattern Layout Example ------------------------------------------------------------ 17 13. Reference Design of Power Supply ----------------------------------------------- 18 Important Notes ---------------------------------------------------------------------------- 20 STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 2 STR5A100D Series 1. Absolute Maximum Ratings  The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC.  Unless otherwise specified, TA is 25 °C, 5 pin = 6 pin = 7 pin Parameter Symbol Test Conditions Pins Rating Units 1–5 7.0 V 1–5 − 10 mA Remarks FB Pin Voltage VFB FB Pin Source Current IFB VCC Pin Voltage VCC 2–5 − 0.3 to 32 V D/ST Pin Voltage VD/ST 4–5 − 0.3 to 730 V Drain Peak Current IDP − 0.2 to 0.69 A 5A162D − 0.2 to 0.97 A 5A164D COMP Pin Voltage VCOMP 8–5 − 0.3 to 7.0 V – 1.53 W Power Dissipation (1) PD Single pulse Positive: Single pulse Negative: Within 2μs of pulse width (2) 4–5 Operating Ambient Temperature TOP – − 40 to 125 °C Storage Temperature Tstg – − 40 to 125 °C Junction Temperature Tj – 150 °C (1) (2) 2. Refer to MOSFET Temperature versus Power Dissipation Curve When embedding this hybrid IC onto the printed circuit board (cupper area in a 15mm×15mm) Recommended Operating Conditions Recommended operating conditions means the operation conditions maintained normal function shown in electrical characteristics. Parameter Symbol Min. Max. Units Remarks D/ST Pin Voltage in Operation VD/ST(OP) − 0.3 584 V VCC Pin Voltage in Operation VCC(OP) 11 27 V 3. Electrical Characteristics  The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC.  Unless otherwise specified, TA is 25 °C, VD/ST = 10 V, pin = 6 pin = 7 pin Parameter Symbol Test Conditions Pins Min. Typ. Max. Units Remarks Power Supply Startup Operation Operation Start Voltage VCC(ON) 2–5 13.6 15.0 16.6 V Operation Stop Voltage VCC(OFF) 2–5 7.3 8.1 8.9 V Circuit Current in Operation Startup Circuit Operation Voltage ICC(ON) VCC = 12 V 2–5 – – 2.5 mA VSTARTUP VCC = 13.5 V 4–5 19 29 39 V Startup Current ISTARTUP VCC = 13.5 V VD/ST = 100 V 2–5 − 3.7 − 2.1 − 0.9 mA fOSC(AVG) VCOMP = 5.5 V 4–5 57 65 73 kHz 4–5 – 2.8 – kHz PWM Operation Average Switching Frequency Frequency Modulation Deviation Δf STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 3 STR5A100D Series Parameter Symbol Test Conditions Pins Min. Typ. Max. Units 1–5 2.45 2.50 2.55 V 1–5 − 2.4 − 0.8 − μA tFBMS 1–5 – – 2.2 μs Standby Operation Threshold Voltage VSTBOP 8–5 1.7 2.3 3.1 V 5A162D 1.3 2.0 2.7 V 5A164D Standby Operation Cycle TSTBOP 4–5 – 1.3 – ms Maximum ON Duty DMAX 4–5 50 57 64 % Feedback Reference Voltage VFB(REF) Feedback Current VFB(OP) Minimum Sampling Time VFB = 2.4 V Remarks COMP Pin Sink Current ICOMP(SI) VCOMP = 5.5 V 8–5 – 4.5 – μA COMP Pin Source Current ICOMP(SO) VCOMP = 2.5 V 8–5 – – 4.5 – μA gm VFB = 2.4V to 2.6V – – 16 – μS tBW – – 250 – ns DDPC – – 27 – % Drain Current Limit (ON Duty ≥ 27 %) IDLIM(H) 4–5 0.250 0.285 0.320 A 5A162D 0.36 0.41 0.46 A 5A164D Drain Current Limit (ON Duty = 0 %) IDLIM(L) 4–5 0.210 0.242 0.280 A 5A162D 0.29 0.34 0.39 A 5A164D VCC(OVP) 2–5 27.5 29.3 31.3 V tCCD 4–5 – 90 – ms Tj(TSD) – 135 – – °C Tj(TSDHYS) – – 70 – °C Tj = 125 °C VD/ST = 584 V 4–5 – – 50 µA ID = 28.5 mA 4–5 – 21.0 24.6 Ω 5A162D ID = 41 mA 4–5 – 11 13 Ω 5A164D 4–5 – – 250 ns – – 20 °C/W – – 24 °C/W Error Amplifier Conductance Protection Function Leading Edge Blanking Time (1) Drain Current Limit Compensation ON Duty(1) OVP Threshold Voltage Constant Current Control Delay Time Thermal Shutdown Operating Temperature(1) Thermal Shutdown Hysteresis(1) Power MOSFET Drain Leakage Current On Resistance Switching Time IDSS RDS(ON) tf Thermal Characteristics Thermal Resistance Junction to θj-F – Frame (1)(2) Thermal Resistance Junction to θj-C – Case(1)(3) (1) Design assurance (2) Frame temperature (TF) measured at the root of the 6 pin (S/GND) (3) Case temperature (TC) measured at the center of the case top surface STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 4 STR5A100D Series Performance Curves Transient Thermal Resistance θj-C (°C) 4. 1.6 1.2 1 0.8 0.6 Time (s) 0.4 Figure 4-2 STR5A162D Transient Thermal Resistance Curve 0.2 0 0 25 50 75 100 125 150 Ambient Temperature, TA (°C) Figure 4-3 Ambient Temperature versus Power Dissipation Curve Transient Thermal Resistance θj-C (°C) Allowable Power Dissipation, PD (W) 1.53 1.4 Time (s) Figure 4-2 STR5A164D Transient Thermal Resistance Curve STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 5 STR5A100D Series 5. Functional Block Diagram 2 VCC D/ST STARTUP 4 UVLO OVP REG PROTECTION TSD PWM OSC DRV S Q R OCP 1 FB S/H Feedback Control E/A S/GND LEB 5, 6, 7 COMP 8 6. Pin Configuration Definitions FB 1 VCC 2 D/ST 7. 4 8 COMP Pin 1 Name FB 7 S/GND 2 VCC 6 S/GND – D/ST 5 S/GND 3 4 5 6 7 8 Descriptions Input of constant voltage control signal Power supply voltage input for Control Part and input of Overvoltage Protection (OVP) signal (Pin removed) MOSFET Drain and input of startup current S/GND MOSFET Source and ground COMP Input of phase compensation Typical Application Circuit BR1 L1 D50 T1 VAC C3 R1 R51 C1 VOUT (+) C51 P C2 R2 U1 S/GND D1 D/ST C52 R52 4 NC 5 S1 S/GND 6 C6 C5 R7 7 D2 S/GND VCC R6 (-) 2 R3 8 COMP FB STR5A100D D 1 R4 C4 R5 STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 6 STR5A100D Series 8. Physical Dimensions DIP8 9.4±0.3 5 1 4 6.5±0.2 8 1.52 +0.3 -0.05 7.6 TYP 3.3±0.2 4.2±0.3 3.4±0.1 7.5±0.5 +0.3 1.0-0.05 0.2 +0 5 .1 -0. 05 2.54 TYP 0~15° 0~15° 0.89 TYP 0.5±0.1 NOTES: 1) Unit : mm 2) Pb-free. Device composition compliant with the RoHS directive 9. Marking Diagram 8 5A1××D Part Number SKYMD Lot Number Y = Last digit of year (0 to 9) 1 M = Month (1 to 9,O,N or D) D = Period of days (1 to 3) 1 : 1st to 10th 2 : 11th to 20th 3 : 21st to 31st Sanken control number STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 7 STR5A100D Series 10. Operational Description 10.2 Undervoltage Lockout (UVLO)  All of the parameter values used in these descriptions are typical values, unless they are specified as minimum or maximum.  With regard to current direction, "+" indicates sink current (toward the IC) and "–" indicates source current (from the IC). Figure 10-2 shows the relationship of VCC pin voltage and circuit current ICC. When VCC pin voltage increases to VCC(ON) = 15.0 V, the control circuit starts switching operation and the circuit current ICC increases. When VCC pin voltage decreases to VCC(OFF) = 8.1 V, the control circuit stops operation by UVLO (Undervoltage Lockout) circuit, and reverts to the state before startup. 10.1 Startup Operation Figure 10-1 shows the VCC pin peripheral circuit. The IC incorporates the startup circuit. The circuit is connected to D/ST pin. When D/ST pin voltage reaches to Startup Circuit Operation Voltage V STARTUP = 29 V, the startup circuit starts operation. During the startup process, the constant current, ISTARTUP = − 2.1 mA, charges C4 at VCC pin. When VCC pin voltage increases to VCC(ON) = 15.0 V, the control circuit starts switching operation. After switching operation begins, the startup circuit turns off automatically so that its current consumption becomes zero. The approximate startup time of IC, tSTART, is calculated as follows: t START  C4  Circuit current, ICC ICC(ON) Stop VCC(OFF) Start VCC(ON) VCC pin voltage Figure 10-2 Relationship between VCC pin voltage and ICC VCC( ON )-VCC( INT ) (1) I STARTUP 10.3 Auxiliary Winding where, tSTART: Startup time of IC in second VCC(INT) : Initial voltage on VCC pin in V L1 T1 VAC C1 4 D/ST VCC 2 D2 U1 C2 P R6 R3 Figure 10-3 shows VCC voltage behavior during the startup period. When VCC pin voltage increases to VCC(ON) = 15.0 V at startup, the IC starts the operation. Then circuit current increases and VCC pin voltage decreases. Since the Operation Stop Voltage VCC(OFF) = 8.1 V is low, the auxiliary winding voltage reaches to setting value before VCC pin voltage decreases to VCC(OFF). Thus control circuit continues the operation. The voltage from the auxiliary winding D in Figure 10-1 becomes a power source to the control circuit in operation. The approximate value of auxiliary winding voltage is about 12 V to 16 V, taking account of the winding turns of D winding so that VCC pin voltage satisfies Equation (2) within the specification of input and output voltage variation of power supply. D VCC pin voltage IC starts operation C4 S/GND 5,6,7 R4 VD R5 FB 1 Startup success Target operating voltage VCC(ON) Increase with rising of output voltage VCC(OFF) Startup failure Figure 10-1 VCC pin peripheral circuit Time Figure 10-3 VCC pin voltage during startup period STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 8 STR5A100D Series VCC(OFF ) (max .)  VCC  VCC(OVP ) (min .) ⇒ 8.9 (V) < VCC < 27.5 (V) (2) In addition, the auxiliary winding voltage VD is determined as follows: VD  ND × ( VOUT  VF ) NS (3) where, ND: Turns of auxiliary winding of transformer NS: Turns of secondary side winding of transformer VOUT: Output voltage VF: Forward drop voltage of secondary side rectifier diode D50 When VCC pin voltage reaches to VCC(OFF) and a startup failure occurs as shown in Figure 10-3, increase the C4 value. Since the larger capacitance causes the longer startup time of IC, it is necessary to check and adjust the startup process based on actual operation in the application. 10.4 Soft Start Function Figure 10-4 shows the behavior of VCC pin voltage and drain current during the startup period. The IC activates the soft start circuitry during the startup period. Soft start time is fixed to around 4.5 ms. During the soft start period, over current threshold is increased step-wisely (7 steps). This function reduces the voltage and the current stress of MOSFET and secondary side rectifier diode. VCC pin voltage Startup of IC Startup of SMPS Normal opertion tSTART VCC(ON) VCC(OFF) Time D/ST pin current, ID Soft start period approximately 4.5 ms (fixed) IDLIM(H) tLIM < tCCD Time Since the Leading Edge Blanking Function (refer to Section 10.8) is deactivated during the soft start period, there is the case that ON time is less than the leading edge blanking time, tBW = 250 ns. After the soft start period, D/ST pin current, ID, is limited by the Drain Current Limit, IDLIM(H), until the output voltage increases to the target operating voltage. This period is given as tLIM. In case tLIM is longer than the CC Operation Delay Time, tCCD , the output power is limited by the CC mode. Thus, it is necessary to adjust the value of output capacitor and the turn ratio of auxiliary winding D so that the tLIM is less than tCCD = 90 ms. 10.5 Primary Side Regulation (PSR) The IC is for Primary Side Regulation (PSR). In PSR, the auxiliary winding voltage is divided by resistors (R3, R4 and R5) and is induced into FB pin as shown in Figure 10-5. The constant voltage output control is achieved by using FB pin voltage. Figure 10-6 shows the detection timing of auxiliary winding voltage VD. When the power MOSFET turns off, the energy stored in transformer is provided to secondary side of the circuit. Then the current IDO flows through the secondary side rectifier diode. After the transfer of energy, power MOSFET continues off state and the free oscillation of VD starts. During the free oscillation period, IDO becomes zero. The feedback signal is generated by sampling the shoulder of VD waveform (point A in Figure 10-6). Thus the effect of VF is minimized. The Minimum Sampling Time, tFBMS, is 2.2 μs (max.). Since the sampling time becomes the shortest in burst oscillation mode (refer to Section 10.10) , the sampling time should be more than tFBMS (shown in Figure 10-6). The ideal waveform of auxiliary winding voltage V D is shown in Figure 10-6. The VD waveform depends on the waveform of the primary winding P voltage. In order to reduce the transient surge of VD waveform, a clamp snubber circuit of a capacitor-resistor-diode (CRD) combination should be added on the primary winding P as shown in Figure 10-5. In order to improve the accuracy of VD waveform sampling, the IC has sampling delay time, tFBD, so that the surge component of the waveform at the turning off of power MOSFET is not sampled. In case that the width of the surge component is longer than tFBD = 0.9 μs, the width should be adjusted to be under tFBD. It is achieved by adjusting the value of R1 and C3 and by reducing the peak and width of the surge component. In addition, in order to realize the ideal VD waveform shown in Figure 10-6, add the resistor R2 in series with the diode of CRD circuit to suppress the ringing of the waveform. Figure 10-4 VCC and ID behavior during startup STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 9 STR5A100D Series CRD clamp snubber L1 VAC C1 C3 C2 R1 P R2 D1 VDS 4 D/ST D2 R6 2 R3 U1 VD D R4 S/GND 5~8 FB output voltage when the output load becomes light. Accordingly, the output voltage of internal error amplifier (target voltage VSC) decreases. As a result, the peak value of VROCP is controlled to be lower so that the peak of the drain current decreases. This control prevents the output voltage from increasing.  Heavy Load Conditions The control circuit performs reverse operations to the former. The target voltage VSC of internal comparator becomes higher and the peak drain current increases. This control prevents the output voltage from decreasing. D/ST U1 1 4 PWM Control R5 PSR circuit Feedback Control VSC Figure 10-5 FB pin peripheral circuit + - VCC 2 VROCP ROCP tON tON tOFF R6 C4 S/GND FB 5,6,7 1 IDpk Secondary side rectifier diode current, IDO Auxiliary winding voltage, VD VD  I DOpk  I Dpk  VError N  D  VF NS R4 R5 NP NS Figure 10-7 FB pin peripheral circuit tFBMS tFBD ND  VOUT  VF  NS ND  VOUT NS D R3 + - E/A S/H D/ST pin current, ID D2 FB comp - VSC + VROCP FB comparator Voltage on both side of ROCP 0 A Sampling set point Drain current, ID ΔVF:Diode Dropped Voltage Figure 10-6 Detection timing of auxiliary winding voltage Figure 10-8 Drain current ID and FB comparator in steady operation 10.6 Constant Voltage (CV) Control 10.7 Constant Current (CC) Control The IC achieves the constant voltage (CV) control of the power supply output by using the peak-current-mode control method, which enhances the response speed and provides the stable operation. The IC controls the peak value of the voltage of build-in sense resistor (VROCP) to be close to target voltage (VSC), comparing VROCP with VSC by internal FB comparator. Feedback Control circuit receives the sampling voltage which is the reversed auxiliary winding voltage by using error amplifier (refer to Figure 10-7 and Figure 10-8) The IC operates in Constant Current (CC) Control when output current reaches to constant load and the state continues for more than the Constant Current Control Delay Time, tCCD = 90 ms. In case the IC is in discontinuous operation, the CV/CC characteristic is as shown in Figure 10-9. When output current reaches to constant load, MOSFET drain current is limited to the Drain Current Limit IDLIM(H). When the output voltage becomes low, the CC Control is maintained by lowering the oscillation frequency fOSC. When the output voltage becomes low, the FB pin voltage becomes low. When FB pin voltage  Light Load Conditions The FB pin voltage increases with the increase of the STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 10 STR5A100D Series decreases to about 1.6 V or less, the IC is stops oscillation and restarts. The IC repeats the intermittent oscillation operation until the FB pin voltage keeps about 1.6 V or more after the output voltage increases. Output Voltage VOUT L P  I DLIM  f OSC   2VOUT 2 I OUT( PK )  CV Mode CC Mode frequency about 23 kHz. In light load, the number of minimum switching times is two times in TSTBOP (refer to Figure 10-11) Since the oscillator of burst oscillation cycle setting and the oscillator of switching oscillation frequency setting are not synchronized each other, the switching frequency may be high at near the Standby Operation Threshold Voltage, VSTBOP. Switching frequency fOSC 65kHz Normal operation About 23kHz Burst oscillation Output Current IOUT Green mode Burst cycle is 1.3ms Standby power Figure 10-9 CV/CC characteristics Output power, PO Figure 10-10 Relationship between PO and fOSC 10.8 Leading Edge Blanking Function The IC uses the peak-current-mode control method for the constant voltage control of output. In peak-current-mode control method, there is a case that the power MOSFET turns off due to unexpected response of FB comparator or overcurrent protection circuit (OCP) to the steep surge current in turning on a power MOSFET. In order to prevent this operation, Leading Edge Blanking Time, tBW = 250 ns is built-in. In the period of tBW, the IC does not respond to the surge voltage in turning on the power MOSFET. 10.9 Random Switching Function The IC modulates its switching frequency randomly by superposing the modulating frequency on fOSC(AVG) in normal operation. This function reduces the conduction noise compared to others without this function, and simplifies noise filtering of the input lines of power supply. 10.10 Auto Standby Function Auto Standby Function automatically changes the oscillation mode to green mode or burst oscillation mode, when the output load becomes lower, the drain current ID decreases and the oscillation frequency becomes lower gradually (Green Mode) as shown in Figure 10-10. In order to reduce the switching loss, the number of switching is reduced in green mode and the switching operation is stopped during a constant period in burst oscillation mode. The burst oscillation mode operates by the Standby Operation Cycle, TSTBOP = 1.3 ms and the switching ID TSTBOP = 1.3 ms About 23 kHz Time Figure 10-11 Switching waveform at burst oscillation 10.11 Overcurrent Protection Function (OCP) Overcurrent Protection Function (OCP) detects each drain peak current level of a power MOSFET on pulse-by-pulse basis, and limits the output power when the current level reaches to Drain Current Limit. When this OCP operation continues for more than the Constant Current Control Delay Time, tCCD = 90 ms, Constant Current (CC) control is activated (refer to Section 10.7). Input Compensation Function ICs with PWM control usually have some propagation delay time. The steeper the slope of the actual drain current at a high AC input voltage is, the larger the actual drain peak current is, compared to the Drain Current Limit. Thus, the peak current has some variation depending on the AC input voltage in the drain current limitation state. In order to reduce the variation of peak current in the drain current limitation state, the IC incorporates a built-in Input Compensation function. The Input Compensation function superposes a signal with a constant slope (Figure 10-12) into the internal current detection signal and varies the internal threshold voltage. When AC input voltage is low (ON Duty is broad), STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 11 STR5A100D Series the Drain Current Limit after compensation increases. The difference of peak drain current become small compared with the case where the AC input voltage is high (ON Duty is narrow). The compensation signal depends on ON Duty. The relation between the ON Duty and the drain current limit after compensation IDLIM' is expressed as Equation (4). When ON Duty is broader than 27 %, the drain current limit becomes a constant value IDLIM(H). I DLIM '  I DLIM( H )  I DLIM( L) 27(%)  Duty  I DLIM( L ) (4) where, Duty: MOSFET ON Duty (%) IDLIM(H): Drain current limit (ON Duty ≥ 27 %) IDLIM(L): Drain current limit (ON Duty = 0 %) STR5A162D 0.285 A 0.242 A STR5A164D 0.41 A 0.34 A Drain Current Limit after compensation, IDLIM' IDLIM(L) IDLIM(H) IDLIM(L) 0 0% 27% ON Duty VOUT  NORMAL  VOUT(OVP)  VCC NORMAL   29.3 (5) where, VOUT(NORMAL): Output voltage in normal operation VCC(NORMAL): VCC pin voltage in normal operation 10.13 Thermal Shutdown Protection (TSD) IDLIM(H) DDPC In case the VCC pin voltage is provided by using auxiliary winding of transformer, the overvoltage conditions such as FB pin open can be detected because the VCC pin voltage is proportional to FB pin voltage. The approximate value of output voltage VOUT(OVP) in OVP condition is calculated by using Equation (5). DMAX 57% Figure 10-12 Relationship between ON Duty and Drain Current Limit after compensation Figure 10-13 shows the TSD operational waveforms. When the temperature of control circuit increases to Tj(TSD) = 135 °C or more, Thermal Shutdown function (TSD) is activated, and the IC stops switching operation. After that, VCC pin voltage decreases. When the VCC pin voltage decreases to about 9.4 V, the bias assist function is activated and VCC pin voltage is kept to over the VCC(OFF). When the temperature reduces to less than Tj(TSD)−Tj(TSD)HYS, the Bias Assist function is disabled and the VCC pin voltage decreases to VCC(OFF). At that time, the IC stops operation by the UVLO circuit and reverts to the state before startup. After that, the startup circuit is activated, the VCC pin voltage increases to VCC(ON), and the IC starts switching operation again. In this way, the intermittent operation by TSD and UVLO is repeated while there is an excess thermal condition. When the fault condition is removed, the IC returns to normal operation automatically. Junction Temperature, Tj 10.12 Overvoltage Protection (OVP) When a voltage between VCC pin and S/GND terminal increases to VCC(OVP) = 29.3 V or more, OVP Function is activated and stops switching operation. When OVP Function is activated, VCC pin voltage decreases to Operation Stop Voltage VCC(OFF) = 8.1 V. After that, the IC reverts to the initial state by UVLO (Undervoltage Lockout) circuit, and the IC starts operation when VCC pin voltage increases to VCC(ON) = 15.0 V by Startup Current. Thus the intermittent operation by UVLO is repeated in OVP condition. This intermittent operation reduces the stress of parts such as power MOSFET and secondary side rectifier diode. In addition, this operation reduces power consumption because the switching period in this intermittent operation is short compared with oscillation stop period. When the abnormal condition is removed, the IC returns to normal operation automatically. Tj(TSD) Tj(TSD)−Tj(TSD)HYS Bias assist function ON ON OFF OFF VCC pin voltage VCC(ON) VCC(BIAS) VCC(OFF) Drain current ID Figure 10-13 TSD operational waveforms STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 12 STR5A100D Series VD is calculated as follows: 11. Design Notes VFW  11.1 External Components Take care to use properly rated, including derating as necessary and proper type of components. CRD clamp snubber L1 VAC P C3 C1 D/ST VCC 2 D50 VOUT (+) R1 R2 C52 R52 D1 where, VIN(AC) : Input voltage ND : Turns of D winding NP : Turns of P winding (-) D2 R6 (7) Auxiliary winding voltage, VD R51 C51 C2 4 U1 S1 ND  VIN(AC)  2 NP 0 D VREV VFW R3 C4 FB 1 S/GND 5~8 R4 VD R5 Figure 11-2 The auxiliary winding voltage waveform Figure 11-1 Peripheral circuit of FB pin and VCC pin  Output Electrolytic Capacitor Apply proper derating to ripple current, voltage, and temperature rise. Use of high ripple current and low impedance types, designed for switch mode power supplies, is recommended.  FB Pin Peripheral Circuit and CRD Clamp Snubber Figure 11-1 shows the FB pin peripheral circuit. The auxiliary winding voltage, VD is divided by resistors (R3, R4 and R5) and induced into FB pin. The FB pin voltage is controlled to be Feedback Reference Voltage, VFB(REF) = 2.50 V. The value of R5 is about 3.3 kΩ to 10 kΩ. The value of R3 and R4 are calculated as follows: ND  VOUT  VF   VFB ( REF) N R3  R 4  S VFB ( REF)  I FB ( OP ) R5 (6) where, ND: Turns of auxiliary winding of transformer NS: Turns of secondary side winding of transformer VOUT: Output voltage VF: Forward drop voltage of secondary side rectifier diode D50 VFB(REF): Feedback Reference Voltage, 2.50 V IFB(OP): Feedback Current, − 0.8 μA In addition, the negative voltage is input to FB pin. As shown in Figure 11-2, the negative voltage, VFW, of The absolute maximum rating of FB Pin Source Current, IFB is − 10 mA. The value of R3 and R4 are chosen so that the FB pin source current, IFB(FW), satisfies Equation (8) considered about surge. I FB(FW)   VFW R3  R 4 N D VIN( AC )    2      5mA N P R3  R 4 (8) There, the maximum input voltage substitutes in VIN(AC). R3, R4 and R5 should be adjusted in actual operation condition. The IC generates the feedback signal by sampled VD waveform that is FB pin input signal. In order to improve the accuracy of VD waveform sampling, it is necessary to realize the ideal VD waveform for reducing the peak and width of the surge component and suppressing the ringing. Because the VD waveform depends on the waveform of the primary winding P voltage, a clamp snubber circuit should be added on the primary winding P. The method of setting the value of the clamp snubber circuit is shown in Section 10.5. In order to maintain the sampling accuracy during light load operation, an auxiliary switch diode SARS05 should be used as D1 where the approximate value of R2 is 220 Ω to 470 Ω. R2 should be adjusted to obtain proper VD waveform in actual operation condition. STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 13 STR5A100D Series  VCC Pin Peripheral Circuit The reference value of C4 (see Figure 11-1) is generally from 4.7 µF to 2.2 μF. The startup time is determined by the value of C4 (refer to Section 10.1 Startup Operation). In actual power supply circuits, there are cases in which the VCC pin voltage fluctuates in proportion to the output current, IOUT (see Figure 11-3), and the Overvoltage Protection function (OVP) on the VCC pin may be activated. This happens because C4 is charged to a peak voltage on the auxiliary winding D, which is caused by the transient surge voltage coupled from the primary winding when the power MOSFET turns off. For alleviating C4 peak charging, it is effective to add some value R6, of several tenths of ohms to several ohms, in series with D2 (see Figure 11-1). The optimal value of R6 should be determined using a transformer matching what will be used in the actual application, because the variation of the auxiliary winding voltage is affected by the transformer structural design. Without R6 VCC pin voltage With R6 Output current IOUT value of both C6 and R7 are 680 pF to 2200 pF and 680 kΩ, respectively. These should be adjusted on actual operation. Because the internal impedance of COMP pin is high, the measurement of COMP pin waveform by using the oscilloscope needs a caution. Especially in light load condition, the probe of the oscilloscope may affect the control of IC. Thus the voltage-follower (buffer) circuit with high impedance Op Amp should be used for the measurement of COMP pin.  D/ST Pin The internal power MOSFET connected to D/ST pin (see Figure 11-1) is permanently damaged when the D/ST pin voltage and the current exceed the Absolute Maximum Ratings. Therefore, as shown in Figure 11-5, The D/ST pin voltage is tuned to be less than about 90 % of the Absolute Maximum Ratings (657 V) in all condition of actual operation, and the value of transformer and components should be selected based on actual operation in the application. And the D/ST pin voltage in normal operation is tuned to be the Recommended Operating Conditions, VD/ST(OP) < 584 V. The fast recovery diodes are recommended for using as D2 and D51. The way of setting the value of the clamp snubber circuit is shown in Section 10.5. D/ST pin voltage < 657 V Figure 11-3 Variation of VCC pin voltage and power supply output current with / without R6 resistor VD/ST(OP) < 584 V  COMP Pin Peripheral Circuit Figure 11-4shows the COMP pin peripheral circuit. U1 S/GND 8 5,6,7 + - R7 C6 Time COMP C5 Probe Buffer circuit Figure 11-4 COMP pin peripheral circuit The capacitor C5 between COMP pin and S/GND pin performs for high frequency noise reduction and phase compensation. C5 should be connected to both COMP pin and S/GND pin as short as possible. The recommended value of C5 is 100 pF to 680 pF. The approximate Figure 11-5 D/ST pin voltage waveform  Bleeder Resistance Since the IC employs the primary side regulation, the IC continues burst oscillation operation at light load in order to detect the state of secondary side. In case the power supply is used under light load condition (input power is 25 mW or less at maximum input voltage) or no load condition, in order to prevent the increase of output voltage, the bleeder resistance, R52, is connected to both ends of the output capacitor, C52, as shown in Figure 11-1. The value of R52 should be selected based on actual operation in the application after the R52 STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 14 STR5A100D Series In the following cases, the surge of VCC pin voltage becomes high. ▫ The surge voltage of primary main winding, P, is high (low output voltage and high output current power supply designs) ▫ The winding structure of auxiliary winding, D, is susceptible to the noise of winding P. When the surge voltage of winding D is high, the VCC pin voltage increases and the Overvoltage Protection function (OVP) may be activated. In transformer design, the following should be considered; ▫ The coupling of the winding P and the secondary output winding S should be maximized to reduce the leakage inductance. ▫ The coupling of the winding D and the winding S should be maximized. ▫ The coupling of the winding D and the winding P should be minimized. In the case of multi-output power supply, the coupling of the secondary-side stabilized output winding, S1, and the others (S2, S3…) should be maximized to improve the line-regulation of those outputs. Figure 11-6 shows the winding structural examples of two outputs. Winding structural example (a): S1 is sandwiched between P1 and P2 to maximize the coupling of them for surge reduction of P1 and P2. D is placed far from P1 and P2 to minimize the coupling to the primary for the surge reduction of D. Winding structural example (b) P1 and P2 are placed close to S1 to maximize the coupling of S1 for surge reduction of P1 and P2. D and S2 are sandwiched by S1 to maximize the coupling of D and S1, and that of S1 and S2. Margin tape Bobbin  Transformer Apply proper design margin to core temperature rise by core loss and copper loss. Because the switching currents contain high frequency currents, the skin effect may become a consideration. Choose a suitable wire gauge in consideration of the RMS current and a current density of 4 to 6 A/mm2. If measures to further reduce temperature are still necessary, the following should be considered to increase the total surface area of the wiring: ▫ Increase the number of wires in parallel. ▫ Use litz wires. ▫ Thicken the wire gauge. This structure reduces the surge of D, and improves the line-regulation of outputs. P1 S1 P2 S2 D Margin tape Winding structural example (a) Margin tape Bobbin which loss of R52 becomes about 10 mW is connected. P1 S1 D S2 S1 P2 Margin tape Winding structural example (b) Figure 11-6 Winding structural examples 11.2 PCB Trace Layout and Component Placement Since the PCB circuit trace design and the component layout significantly affects operation, EMI noise, and power dissipation, the high frequency PCB trace should be low impedance with small loop and wide trace. In addition, the ground traces affect radiated EMI noise, and wide, short traces should be taken into account. Figure 11-7 shows the circuit design example. (1) Main Circuit Trace Layout: This is the main trace containing switching currents, and thus it should be as wide trace and small loop as possible. If C2 and the IC are distant from each other, placing a capacitor such as film capacitor (about 0.1 μF and with proper voltage rating) close to the transformer or the IC is recommended to reduce impedance of the high frequency current loop. (2) Control Ground Trace Layout Since the operation of IC may be affected from the large current of the main trace that flows in control ground trace, the control ground trace should be connected at a single point grounding of point A as close to the S/GND pin as possible. (3) VCC Trace Layout: This is the trace for supplying power to the IC, and thus it should be as small loop as possible. If C4 and the IC are distant from each other, placing a capacitor such as film capacitor Cf (about 0.1 μF to 1.0 μF) close to the VCC pin and the S/GND pin is recommended. STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 15 STR5A100D Series (4) COMP Trace Layout C5, C6 and R7 are connected to COMP pin for phase compensation. These capacitors and resistor should be placed to shorten the trace between COMP pin and S/GND pin. In order to stabilize the operation of IC, a dedicated trace to S/GND pin is recommended. (7) Thermal Considerations Because the power MOSFET has a positive thermal coefficient of RDS(ON), consider it in thermal design. Since the copper area under the IC and the S/GND trace act as a heatsink, its traces should be as wide as possible. (5) FB Trace Layout The auxiliary winding voltage is divided by resistors and is induced to FB pin. In order to achieve the accurate primary side regulation, the trace between the resistors and FB pin should be as short as possible. (6) Secondary Rectifier Smoothing Circuit Trace Layout: This is the trace of the rectifier smoothing loop, carrying the switching current, and thus it should be as wide trace and small loop as possible. If this trace is thin and long, inductance resulting from the loop may increase surge voltage at turning off the power MOSFET. Proper rectifier smoothing trace layout helps to increase margin against the power MOSFET breakdown voltage, and reduces stress on the clamp snubber circuit and losses in it. (6)Main trace of secondary side should be wide trace and small loop (1) Main trace should be wide trace and small loop F1 BR1 L1 D50 T1 VAC C3 C1 C2 R1 C8 R51 C51 P R2 U1 S/GND D/ST R52 S 4 NC 5 (7)Trace of S/GND pin should be wide for heat release C52 D1 S/GND 6 R6 D2 (2)GND trace for IC should be connected at a single point S/GND VCC COMP FB 2 7 C6 C5 R7 R3 8 1 STR5A1××D C4 R5 (4)The components connected to COMP pin should be short, and these components connected to S/GND pin should be dedicated trace. D R4 (5) The components connected to FB pin should be short C7 (3) Loop of the power supply should be small Figure 11-7 Example of peripheral circuit around the IC STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 16 STR5A100D Series 12. Pattern Layout Example The following show the PCB pattern layout example and the circuit schematic with STR5A100D series.The above circuit symbols correspond to these of Figure 12-1. Slit width Top view Bottom view Figure 12-1 PCB circuit trace layout example F1 BR1 L1 5 T1 VAC C3 C1 R51 U1 C51 S1 D1 D/ST C52 C54 4 R52 3 NC 5 VOUT (+) P R2 S/GND D50 R1 C8 C2 7 S/GND 6 C6 C5 R7 7 D2 S/GND VCC R6 2 (-) 2 R3 8 COMP FB STR5A100D 9 D 1 R4 C4 C7 R5 1 Figure 12-2 Circuit schematic for PCB circuit trace layout STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 17 STR5A100D Series 13. Reference Design of Power Supply As an example, the following show the power supply specification, the circuit schematic, the bill of materials, and the transformer specification.  Power supply specification IC Input voltage Maximum output power Output voltage Output current STR5A164D AC 85 V to AC 265 V 5 W (max.) 5V 1 A (max.)  Circuit schematic F1 BR1 L1 D50 T1 VAC C3 C1 R1 R51 C8 C2 R2 S/GND C51 P U1 S1 D1 D/ST C52 R52 4 NC 5 5V/1A S/GND 6 C6 C5 R7 7 D2 S/GND VCC COMP FB R6 2 R3 8 STR5A100D D 1 R4 C4 R5 C7  Bill of materials Symbol BR1 Part type General F1 Fuse 600 V, 1 A AC 250 V, 1 A Recommended Symbol Part type Sanken Parts (2) R4 Chip Ratings(1) R5 Chip 4.7 kΩ Chip 0Ω Chip 680 kΩ 800 V, 1 A CM inductor 330 μH R6 C1 Electrolytic 400 V, 4.7 μF R7 (2) C2 Electrolytic 400 V, 4.7 μF D1 General C3 Ceramic, chip 630 V, 1000 pF D2 Fast recovery, chip FRD 200 V, 1 A C4 Electrolytic 50 V, 10 µF U1 IC Transformer C5 (2) Ceramic, chip 330 pF T1 C6 (2) Ceramic, chip 1000 pF D50 C7 (2) Ceramic, chip Open C51 C8 (2) Ceramic, chip Open C52 R1 (3) Metal oxide, chip 470 kΩ R51 R2 R3 (2) Chip 270 Ω Chip 3.9 kΩ R52* (2) (2) Recommended Sanken Parts 15 kΩ (2) (2) L1* (2) Ratings(1) SARS05 Schottky STR5A164D See the specification 60 V, 3 A SJPB-L6 Ceramic, chip 50 V, 2200 pF Electrolytic 10V, 470µF Chip 22 Ω Chip 2.7 kΩ (1) Unless otherwise specified, the voltage rating of capacitor is 50 V or less and the power rating of resistor is 1/8 W or less. (2) It is necessary to be adjusted based on actual operation in the application. (3) Resistors applied high DC voltage and of high resistance are recommended to select resistors designed against electromigration or use combinations of resistors in series for that to reduce each applied voltage, according to the requirement of the application. STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 18 STR5A100D Series  Transformer specification ▫ Primary inductance, LP : 1.7 mH ▫ Core size : EI-16 ▫ AL-value: 118 nH/N2 (Center gap of about 0.3 mm) ▫ Winding specification Number of Wire diameter Winding Symbol turns (T) (mm) Primary winding 1 P1 80 φ 0.16 Primary winding 2 P2 40 φ 0.16 Auxiliary winding D 18 φ 0.16 × 2 Output winding 1 S1 8 φ 0.3 × 2 Output winding 2 S2 8 φ 0.3 × 2 5 pin P2 S2 D S1 Construction Two layers, solenoid winding Single-layer, solenoid winding Single-layer, solenoid winding Single-layer, solenoid winding Single-layer, solenoid winding VDC 5V P1 Wire Enameled Copper Wire Enameled Copper Wire Enameled Copper Wire Triple insulated wire Triple insulated wire 7 pin S1 9 pin P2 3 pin D/ST 2 pin VCC P1 Bobbin 1 pin GND S2 D ●:Start Cross-section view at this pin Figure 13-1 Example of transformer structure Notes: 1) Coupling between D winding and S1 winding should be adjusted and be improved by applying the solid winding construction in D winding, for example. 2) The peak value of drain current ID in normal operation is determined by LP value. Since the slope of ID is expressed as VDS/LP, the smaller the LP value, the steeper the slope of ID becomes. Thus the peak value of drain current becomes high as shown in Figure 13-2. The IC limits the peak current by drain current limit IDLIM (Overcurrent state). If LP value becomes small by variation, there is the case that the system is in overcurrent state. Then the designed output power cannot be achieved. Thus the L P value should be determined after the confirmation in actual operation using minimum LP value within the variation, where the peak current value should be less than IDLIM(MIN) in minimum input voltage of power supply. Drain current, ID IDLIM Limited by IDLIM (Overcurrent state) LP (min.) LP (typ.) LP (max.) Time Figure 13-2 Relation between LP and drain current ID STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 19 STR5A100D Series Important Notes  All data, illustrations, graphs, tables and any other information included in this document (the “Information”) as to Sanken’s products listed herein (the “Sanken Products”) are current as of the date this document is issued. The Information is subject to any change without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales representative that the contents set forth in this document reflect the latest revisions before use.  The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products, please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to Sanken. When considering use of the Sanken Products for any applications that require higher reliability (such as transportation equipment and its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety devices, etc.), you must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to Sanken, prior to the use of the Sanken Products. The Sanken Products are not intended for use in any applications that require extremely high reliability such as: aerospace equipment; nuclear power control systems; and medical equipment or systems, whose failure or malfunction may result in death or serious injury to people, i.e., medical devices in Class III or a higher class as defined by relevant laws of Japan (collectively, the “Specific Applications”). Sanken assumes no liability or responsibility whatsoever for any and all damages and losses that may be suffered by you, users or any third party, resulting from the use of the Sanken Products in the Specific Applications or in manner not in compliance with the instructions set forth herein.  In the event of using the Sanken Products by either (i) combining other products or materials or both therewith or (ii) physically, chemically or otherwise processing or treating or both the same, you must duly consider all possible risks that may result from all such uses in advance and proceed therewith at your own responsibility.  Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the occurrence of any failure or defect or both in semiconductor products at a certain rate. You must take, at your own responsibility, preventative measures including using a sufficient safety design and confirming safety of any equipment or systems in/for which the Sanken Products are used, upon due consideration of a failure occurrence rate and derating, etc., in order not to cause any human injury or death, fire accident or social harm which may result from any failure or malfunction of the Sanken Products. Please refer to the relevant specification documents and Sanken’s official website in relation to derating.  No anti-radioactive ray design has been adopted for the Sanken Products.  The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples, all information and evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference of use of the Sanken Products.  Sanken assumes no responsibility whatsoever for any and all damages and losses that may be suffered by you, users or any third party, or any possible infringement of any and all property rights including intellectual property rights and any other rights of you, users or any third party, resulting from the Information.  No information in this document can be transcribed or copied or both without Sanken’s prior written consent.  Regarding the Information, no license, express, implied or otherwise, is granted hereby under any intellectual property rights and any other rights of Sanken.  Unless otherwise agreed in writing between Sanken and you, Sanken makes no warranty of any kind, whether express or implied, including, without limitation, any warranty (i) as to the quality or performance of the Sanken Products (such as implied warranty of merchantability, and implied warranty of fitness for a particular purpose or special environment), (ii) that any Sanken Product is delivered free of claims of third parties by way of infringement or the like, (iii) that may arise from course of performance, course of dealing or usage of trade, and (iv) as to the Information (including its accuracy, usefulness, and reliability).  In the event of using the Sanken Products, you must use the same after carefully examining all applicable environmental laws and regulations that regulate the inclusion or use or both of any particular controlled substances, including, but not limited to, the EU RoHS Directive, so as to be in strict compliance with such applicable laws and regulations.  You must not use the Sanken Products or the Information for the purpose of any military applications or use, including but not limited to the development of weapons of mass destruction. In the event of exporting the Sanken Products or the Information, or providing them for non-residents, you must comply with all applicable export control laws and regulations in each country including the U.S. Export Administration Regulations (EAR) and the Foreign Exchange and Foreign Trade Act of Japan, and follow the procedures required by such applicable laws and regulations.  Sanken assumes no responsibility for any troubles, which may occur during the transportation of the Sanken Products including the falling thereof, out of Sanken’s distribution network.  Although Sanken has prepared this document with its due care to pursue the accuracy thereof, Sanken does not warrant that it is error free and Sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting from any possible errors or omissions in connection with the Information.  Please refer to our official website in relation to general instructions and directions for using the Sanken Products, and refer to the relevant specification documents in relation to particular precautions when using the Sanken Products.  All rights and title in and to any specific trademark or tradename belong to Sanken and such original right holder(s). DSGN-CEZ-16003 STR5A100D-DSE Rev.1.5 SANKEN ELECTRIC CO., LTD. Aug. 21, 2018 https://www.sanken-ele.co.jp/en © SANKEN ELECTRIC CO., LTD. 2012 20
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