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SFD2N60

SFD2N60

  • 厂商:

    SEMIWELL

  • 封装:

  • 描述:

    SFD2N60 - N-Channel MOSFET - SemiWell Semiconductor

  • 数据手册
  • 价格&库存
SFD2N60 数据手册
SemiWell Semiconductor SFD/U2N60 N-Channel MOSFET Features ■ ■ ■ ■ ■ RDS(on) (Max 5.0 Ω )@VGS=10V Gate Charge (Typical 9.5nC) Improved dv/dt Capability, High Ruggedness 100% Avalanche Tested Maximum Junction Temperature Range (150°C) Symbol ● 2. Drain 1. Gate ◀ ● ● ▲ 3. Source General Description This Power MOSFET is produced using Semiwell’s advanced planar stripe, DMOS technology. This latest technology has been especially designed to minimize on-state resistance, have a high rugged avalanche characteristics. These devices are well suited for high efficiency switch mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology. D-PAK, I-PAK 2 1 3 1 2 3 Absolute Maximum Ratings Symbol VDSS ID IDM VGS EAS EAR dv/dt PD TSTG, TJ TL Drain to Source Voltage Continuous Drain Current(@TC = 25°C) Continuous Drain Current(@TC = 100°C) Drain Current Pulsed Gate to Source Voltage Single Pulsed Avalanche Energy Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation(@TC = 25 °C) Derating Factor above 25 °C Operating Junction Temperature & Storage Temperature Maximum Lead Temperature for soldering purpose, 1/8 from Case for 5 seconds. (Note 2) (Note 1) (Note 3) (Note 1) Parameter Value 600 1.8 1.1 6.0 Units V A A A V mJ mJ V/ns W W/°C °C °C ±30 120 4.4 4.5 44 0.35 - 55 ~ 150 300 Thermal Characteristics Symbol RθJC RθJA RθJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient* Thermal Resistance, Junction-to-Ambient Value Min. - Typ. - Max. 2.87 50 110 Units °C/W °C/W °C/W * When mounted on the minimum pad size recommended (PCB Mount) Copyright@Semiwell Semiconductor Inc., All rights reserved. SFD/U2N60 Electrical Characteristics Symbol Off Characteristics BVDSS Δ BVDSS/ Δ TJ IDSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature coefficient Drain-Source Leakage Current Gate-Source Leakage, Forward Gate-source Leakage, Reverse VGS = 0V, ID = 250uA ID = 250uA, referenced to 25 °C VDS = 600V, VGS = 0V VDS = 480V, TC = 125 °C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250uA VGS =10 V, ID = 0.9A 600 0.6 10 100 100 -100 V V/°C uA uA nA nA ( TC = 25 °C unless otherwise noted ) Parameter Test Conditions Min Typ Max Units IGSS On Characteristics VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-state Resistance 2.0 4.0 4.0 5.0 V Ω Dynamic Characteristics Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Input Capacitance Output Capacitance Reverse Transfer Capacitance VGS =0 V, VDS =25V, f = 1MHz 320 35 4.5 420 46 6.0 pF Dynamic Characteristics Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge(Miller Charge) VDS =480V, VGS =10V, ID =2.0A (Note 4, 5) VDD =300V, ID =2.0A, RG =25Ω (Note 4, 5) 8 23 25 28 9.5 1.6 4.0 30 60 60 70 13 nC ns - Source-Drain Diode Ratings and Characteristics Symbol IS ISM VSD trr Qrr ※ NOTES 1. Repeativity rating : pulse width limited by junction temperature 2. L = 68mH, IAS =1.8A, VDD = 50V, RG = 25Ω , Starting TJ = 25°C 3. ISD ≤ 2A, di/dt ≤ 200A/us, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse Width ≤ 300us, Duty Cycle ≤ 2% 5. Essentially independent of operating temperature. Parameter Continuous Source Current Pulsed Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions Integral Reverse p-n Junction Diode in the MOSFET IS =1.8A, VGS =0V IS=2.0A, VGS=0V, dIF/dt=100A/us Min. - Typ. 230 1.0 Max. 1.8 6.0 1.4 - Unit. A V ns uC Copyright@Semiwell Semiconductor Inc., All rights reserved. Typical Characteristics ID, Drain Current [A] ID, Drain Current [A] 10 0 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V Top : 10 0 150 C o 10 -1 25 C -55 C o o ※ Notes : 1. 250µs Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 40V 2. 250µs Pulse Test 10 -2 10 -1 10 0 10 1 10 -1 2 4 6 8 10 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 18 RDS(ON) [Ω ], Drain-Source On-Resistance VGS = 10V 12 VGS = 20V 9 IDR, Reverse Drain Current [A] 15 10 0 6 150℃ 25℃ ※ Notes : 1. VGS = 0V 2. 250µs Pulse Test 3 ※ Note : TJ = 25℃ 0 0 1 2 3 4 5 6 10 -1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current 600 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 VGS, Gate-Source Voltage [V] 10 VDS = 120V VDS = 300V Capacitance [pF] 400 Ciss 8 VDS = 480V 6 Coss 200 4 Crss ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 2 ※ Note : ID = 2.0 A 0 -1 10 0 10 0 10 1 0 2 4 6 8 10 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics Typical Characteristics (Continued) 1.2 3.0 BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.1 RDS(ON), (Normalized) Drain-Source On-Resistance 2.5 2.0 1.0 1.5 1.0 0.9 ※ Notes : 1. VGS = 0 V 2. ID = 250 µA 0.5 ※ Notes : 1. VGS = 10 V 2. ID = 1.0 A 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 2.0 10 1 Operation in This Area is Limited by R DS(on) 1.6 ID, Drain Current [A] 10 0 1 ms 10 ms DC ID, Drain Current [A] 100 µs 1.2 0.8 10 -1 ※ Notes : o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse 0.4 10 -2 10 0 10 1 10 2 10 3 0.0 25 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [℃] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature Zθ JC(t), Thermal Response D = 0 .5 10 0 0 .2 0 .1 0 .0 5 10 -1 ※ N o te s : 1 . Z θ J C (t) = 2 .8 7 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) 0 .0 2 0 .0 1 s in g le p u ls e PDM t1 t2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve Gate Charge Test Circuit & Waveform 5K 0Ω 1V 2 20F 0n 30F 0n Sm Tp a e ye a DT sU VS D VS G Q g 1V 0 Q g s Q g d VS G DT U 3A m Cag hr e Resistive Switching Test Circuit & Waveforms V D S R G V G S R L V D D V D S 9 0 % 1 0 V D U T V G S 1 0 % t(n d) o t r tn o t(f) df o tf o f t f Unclamped Inductive Switching Test Circuit & Waveforms L V D S I D R G 1 0 V tp BS VS D 1 - I 2 ---------E =-- L S ---------AS A 2 B S -V VS D D D BS VS D IS A V D D I( t D) V D D tp D U T V () Dt S Te i m Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + V DS _ I SD L D r iv e r R G S am e T ype as DUT V DD V GS • d v / d t c o n t r o lle d b y R G • I S D c o n t r o lle d b y p u ls e p e r io d V GS ( D r iv e r ) G a t e P u ls e W id t h D = -------------------------G a t e P u ls e P e r io d 10V I F M , B o d y D io d e F o r w a r d C u r r e n t I SD (DUT ) IR M d i/d t B o d y D io d e R e v e r s e C u r r e n t V DS (DUT ) B o d y D io d e R e c o v e r y d v / d t V SD V DD B o d y D io d e F o r w a r d V o lt a g e D r o p Package Dimensions DPAK 6.60 ±0.20 5.34 ±0.30 (0.50) (4.34) (0.50) 0.70 ±0.20 2.30 ±0.10 0.50 ±0.10 0.60 ±0.20 6.10 ±0.20 2.70 ±0.20 9.50 ±0.30 0.91 ±0.10 0.80 ±0.20 MAX0.96 2.30TYP [2.30±0.20] 0.76 ±0.10 2.30TYP [2.30±0.20] 0.89 ±0.10 0.50 ±0.10 1.02 ±0.20 2.30 ±0.20 (0.70) (0.90) (0.10) (3.05) 6.10 ±0.20 9.50 ±0.30 2.70 ±0.20 (2XR0.25) 0.76 ±0.10 (1.00) 6.60 ±0.20 (5.34) (5.04) (1.50) MIN0.55 Package Dimensions (Continued) IPAK 6.60 ±0.20 5.34 ±0.20 (0.50) (4.34) (0.50) 0.50 ±0.10 2.30 ±0.20 0.60 ±0.20 0.70 ±0.20 0.80 ±0.10 6.10 ±0.20 1.80 ±0.20 MAX0.96 0.76 ±0.10 9.30 ±0.30 2.30TYP [2.30±0.20] 2.30TYP [2.30±0.20] 0.50 ±0.10 16.10 ±0.30
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