STR4A60S

SemiWell Semiconductor Sensitive Gate Triacs STR4A60S Symbol Features Repetitive Peak Off-State Voltage : 600V R.M.S On-State Current ( IT(RMS)= 4 A ) ◆ High Commutation dv/dt ◆ Sensitive Gate Triggering 4 Mode ◆ ◆ ○ 2.T2 ▼ ▲ ○ 3.Gate 1.T1 ○ General Description This device is sensitive gate triac suitable for direct coupling to TTL, HTL, CMOS and application such as various logic functions, low power AC switching applications, such as fan speed, small light controllers and home appliance equipment. TO-126 3 2 1 Absolute Maximum Ratings Symbol VDRM IT(RMS) ITSM I2 t PGM PG(AV) IGM VGM TJ TSTG ( TJ = 25°C unless otherwise specified ) Condition Ratings 600 TC = 95 °C One Cycle, 50Hz/60Hz, Peak, Non-Repetitive 4.0 30/33 4.5 1.5 0.1 1.0 7.0 - 40 ~ 125 - 40 ~ 150 Parameter Repetitive Peak Off-State Voltage R.M.S On-State Current Surge On-State Current I2 t Peak Gate Power Dissipation Average Gate Power Dissipation Peak Gate Current Peak Gate Voltage Operating Junction Temperature Storage Temperature Units V A A A2 s W W A V °C °C Jan, 2003. Rev. 3 copyright@SemiWell Semiconductor Co., LTd., All rights reserved. 1/5 STR4A60S Electrical Characteristics Symbol Items Repetitive Peak Off-State Current Peak On-State Voltage Ⅰ Ⅱ Gate Trigger Current I -GT3 I+GT3 V+GT1 V-GT1 V-GT3 V+GT3 VGD (dv/dt)c IH Rth(j-c) Ⅲ Ⅳ Ⅰ Ⅱ Gate Trigger Voltage Ⅲ Ⅳ Non-Trigger Gate Voltage Critical Rate of Rise Off-State Voltage at Commutation Holding Current Thermal Impedance Junction to case TJ = 125 °C, VD = 1/2 VDRM TJ = 125 °C, [di/dt]c = -0.5 A/ms, VD=2/3 VDRM VD = 6 V, RL=10 Ω ─ ─ 0.2 5 ─ ─ ─ 1.6 ─ ─ ─ ─ 1.4 2.0 ─ ─ 10 3.5 V VD = 6 V, RL=10 Ω ─ ─ ─ ─ ─ 8 ─ ─ 5 12 1.4 1.4 V Conditions VD = VDRM, Single Phase, Half Wave TJ = 125 °C IT = 6 A, Inst. Measurement Ratings Min. ─ ─ ─ ─ Typ. ─ ─ ─ ─ Max. 1.0 1.6 5 5 Unit IDRM VTM I+GT1 I -GT1 mA V mA V/㎲ mA °C/W 2/5 STR4A60S Fig 1. Gate Characteristics 10 10 1 Fig 2. On-State Voltage 2 VGM (7V) PGM (1.5W) On-State Current [A] Gate Voltage [V] 10 1 PG(AV) (0.1W) IGM (1A) 10 0 125 C o 25 ℃ I+GT1 I -GT1 I -GT3 25 ℃ I+GT3 10 0 25 C o VGD(0.2V) 10 -1 10 0 10 1 10 2 10 3 10 -1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Gate Current [mA] On-State Voltage [V] Fig 3. On State Current vs. Maximum Power Dissipation 5.5 Fig 4. On State Current vs. Allowable Case Temperature = 180 o = 150 o = 120 o = 90 o o o Power Dissipation [W] 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0.5 π θ 360° θ 2π θ θ θ θ Allowable Case Temperature [ oC] 6.0 130 125 120 115 110 o θ : Conduction Angle θ = 60 θ = 30 π θ θ 2π 105 360° θ = 30o θ = 60 o θ = 90 o θ = 120 o θ = 150 o θ = 180 100 95 0.0 θ : Conduction Angle 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 RMS On-State Current [A] RMS On-State Current [A] Fig 5. Surge On-State Current Rating ( Non-Repetitive ) 35 Fig 6. Gate Trigger Voltage vs. Junction Temperature 10 3 30 Surge On-State Current [A] 25 X 100 (%) 60Hz V 20 V GT1 10 2 + GT1 - V GT3 VGT (t C) 15 10 o 50Hz VGT (25 C) o 5 1 V + GT3 0 0 10 10 10 1 10 2 -50 0 50 100 o 150 Time (cycles) Junction Temperature [ C] 3/5 STR4A60S Fig 7. Gate Trigger Current vs. Junction Temperature 10 3 Fig 8. Transient Thermal Impedance 10 I 10 2 + GT1 GT1 GT3 I I Transient Thermal Impedance [ C/W] IGT (25 C) IGT (t C) o o X 100 (%) o 1 I 10 1 + GT3 -50 0 50 100 o 150 10 -2 10 -1 10 0 10 1 10 2 Junction Temperature [ C] Time (sec) Fig 9. Gate Trigger Characteristics Test Circuit 10Ω 10Ω 10Ω 10Ω ▼ ▲ 6V ● ▼ ▲ A ● ▼ ▲ A ● 6V 6V A ▼ ▲ RG 6V ● A V ● RG V ● RG V ● V ● RG Test Procedure Ⅰ Test Procedure Ⅱ Test Procedure Ⅲ Test Procedure Ⅳ 4/5 STR4A60S TO-126 Package Dimension Dim. A B C D E F G H I J K L mm Min. 7.5 10.8 14.2 2.7 3.8 2.5 1.2 2.3 4.6 0.48 0.7 1.4 3.2 0.62 0.86 0.019 0.028 1.5 0.047 Typ. Max. 7.9 11.2 14.7 2.9 Min. 0.295 0.425 0.559 0.106 Inch Typ. Max. 0.311 0.441 0.579 0.114 0.150 0.098 0.059 0.091 0.181 0.024 0.034 0.055 0.126 φ A E B D φ F 3 C 2 1 G L 1. Gate 2. T2 3. T1 J K H I 5/5