SP7661ER

Solved by SP7661 TM Evaluation Board Manual Easy Evaluation of the SP7661ER 0 to 3A Output Synchronous Buck Converter Built in Power MOSFETs UVLO Detects Both VCC and VIN Highly Integrated Design, Minimal Components High Efficiency: up to 90% Feature Rich: UVIN, Programmable Soft Start, Built In VCC Supply Output Short Circuit Protection and Current Limiting SP7661EB Schematic Nov27-06 SP7661 Evaluation Board Manual Page 1 of 11 © 2006 Sipex Corporation Using the Evaluation Board 1) Powering Up the SP7661EB Circuit Connect the SP7661 Evaluation Board with an external +12V power supply. Connect with short leads and large diameter wire directly to the “VIN” and “GND” posts. Connect a Load between the VOUT and GND posts, again using short leads with large diameter wire to minimize inductance and voltage drops. 2) Measuring Output Load Characteristics VOUT ripple can best be seen by touching the probe tip to the pad for C5 and the scope GND collar touching Output GND post – avoid a GND lead on the scope which will increase noise pickup. 3) Using the Evaluation Board with Different Output Voltages While the SP7661 Evaluation Board has been tested and delivered with the output set to 3.30V, by simply changing one resistor, R2, the SP7661 can be set to other output voltages. The relationship in the Equation 1 is based on a voltage divider from the output to the feedback pin VFB, which is set to an internal reference voltage of 0.80V. Note, due to the common mode voltage range of the current sense amplifier, output voltages greater than 3.3V are only possible if the current sense is disabled. To disable current limit, remove R3 and R4. Standard 1% metal film resistors of surface mount size 0603 are recommended. R2 = R1 Vout ( − 1) .80V Equation 1 Where R1 = 10kΩ and for VOUT = 0.80V setting, simply remove R2 from the board. Furthermore, one could select the value of the R1 & R2 combination to meet the exact output voltage setting by restricting R1 resistance range such that 10kΩ ≤ R1 ≤ 100kΩ for overall system loop stability. Note that since the SP7661 Evaluation Board design was optimized for 12V down conversion to 3.30V, changes of output voltage and/or input voltage will alter performance from the data given in the Power Supply Data section. In addition, the SP7661ER provides short circuit protection by sensing VOUT at GND. The current limit of the converter is set to about 5.5A which is accomplished by sensing the current through the inductor. To adjust the current limit, follow Equations 2 and 3 to set the current limit accordingly. The current limit should be set to about 50% higher than the maximum output current that is desired. This will prevent the part from accidentally triggering the current limit during large transient load steps. Adjusting the current upwards is done by adjusting resistor R9. R9 = Where 60mV ⋅ ( R3 + R4) I max ⋅ ( DCR - 60mV) Equation 2 DCR is the Inductor winding resistance IMAX is the desired output current Feb21-07 SP7661 Evaluation Manual Page 2 of 11 ©2007 Sipex Corporation Adjusting the current downwards is controlled by adjusting R8.  (Vout - 60mV) + (Imax ⋅ DCR) R8 = R4 ⋅   60mV - (Imax ⋅ DCR)  Where   Equation 3   DCR is the Inductor winding resistance and IMAX is the desired output current Further details on the current limit can be found in the SP7661 data sheet. For the Wurth Inductor on this demo board, DCR= 14mΩ nominal. POWER SUPPLY DATA The SP7661ER is designed with an accurate 2.0% reference over line, load and temperature. Figure 1 data shows a typical SP7661 evaluation board efficiency plot, with efficiencies up to 90% and output currents up to 3A. The output voltage ripple of less than 10mV at full load and the LX node are shown in figure 2. Figures 3 and 4 illustrate a 0A to 3A and 1A to 3A Load Step. Short circuit and current limit are shown in Figures 5 and 6. Typical startup characteristics into a full load and no load are shown in figure 7 and 8. All data was taken at 12VIN. While data on individual power supply boards may vary, the capability of the SP7661ER of achieving high accuracy over a range of load conditions shown here is quite impressive and desirable for accurate power supply design. 7661 Efficiency 12Vin, 3.3Vout, 3Amps 95.0 90.0 85.0 80.0 Efficiency 75.0 70.0 65.0 60.0 55.0 50.0 0.5 1 1.5 Iout (Amps) 2 2.5 3 Figure 1. Efficiency vs. Load Feb21-07 SP7661 Evaluation Manual Page 3 of 11 ©2007 Sipex Corporation Vout Vout Iout 1A/div Figure 2. LX node output & ripple voltage Figure 3. Load Step Response: 0->3A Vout Vout Soft Start Iout 1A/div Iout 2A/div Figure 4. Load Step Response 1->3A Figure 5. Current limit set point ~6A Vin Vout Soft Start Vout Soft Start Iin 5A/div Iout 2A/div Figure 6. Output Short Circuit w/IIN Feb21-07 Figure 7. Startup into full load ©2007 Sipex Corporation SP7661 Evaluation Manual Page 4 of 11 VOUT Soft Start IOUT 2A/div Figure 8. Current Limit Re-start Rate TYPE III LOOP COMPENSATION DESIGN The open loop gain of the SP7661EB can be divided into the gain of the error amplifier Gamp(s), PWM modulator Gpwm, buck converter output stage Gout(s), and feedback resistor divider Gfbk. In order to cross over at the selecting frequency fco, the gain of the error amplifier must compensate for the attenuation caused by the rest of the loop at this frequency. The goal of loop compensation is to manipulate the open loop frequency response such that its gain crosses over 0dB at a slope of –20dB/dec. The open loop crossover frequency should be higher than the ESR zero of the output capacitors but less than 1/5 to 1/10 of the switching frequency fs to insure proper operation. Since the SP7661EB is designed with Ceramic Type output capacitors, a Type III compensation circuit is required to give a phase boost of 180° in order to counteract the effects of the output LC underdamped resonance double pole frequency. Feb21-07 SP7661 Evaluation Manual Page 5 of 11 ©2007 Sipex Corporation Figure 9. Voltage Mode Control Loop with Loop Dynamic for Type III Compensation The simple guidelines for positioning the poles and zeros and for calculating the component values for Type III compensation are as follows. As a particular example, consider for the following SP7661EB with a Type III Voltage Loop Compensation component selections: Input requirements and inductor selection Vin = 12V, we will use 12V as Vin max for this design. Vout = 3.30V @ 0 to 3A load Select L = 2.2uH => yield ≈ 60% of maximum 3A output current ripple. Select Cout = 100uF Ceramic capacitor (Resr ≈ 3mΩ) Given the performance of ceramic caps we will use ~80% of the output capacitance in calcualations. fs = 600khz SP7661 internal Oscillator Frequency Vramp_pp = 1.0V SP7661 internal Ramp Peak to Peak Amplitude Feb21-07 SP7661 Evaluation Manual Page 6 of 11 ©2007 Sipex Corporation Step by step design procedures: Note: Loop Compensation component calculations discussed in this section are further elaborated in the application note #ANP16, “Loop Compensation of Voltage-Mode Buck Converters”. These calculations shown here can be quickly iterated with the Type III Loop Compensation Calculator on the web at: www.sipex.com/files/Application-Notes/TypeIIICalculator.xls Choose fco = fs/10 fco = 600Khz/10 = 60Khz Calculate fp_LC, the double pole frequency of the filter fp_LC = 1 2π ( L ⋅ C ) 1 2π ⋅ 2.2uH ⋅ 80uF ) = 11.99kHz ≈ 12kHz fp_LC = Calculate fz_ESR , the ESR zero frequency fz_ESR = 1 2π ⋅ Cesr ⋅ Cout fz _ ESR = 1 = 663kHz 2π ⋅ (3mΩ ) ⋅ (80 µF ) Select R1 component value such that 10kΩ ≤ R1 ≤ 100kΩ R1 = 10kΩ, 1% Calculate R2 base on the desired VOUT R2 = R1 Vout   .8V  − 1   10 KΩ = 3200Ω ≈ 3160Ω  3.3V   .8V  − 1   R2 = Feb21-07 SP7661 Evaluation Manual Page 7 of 11 ©2007 Sipex Corporation Select the ratio of RZ2 / R1 gain for the desired gain bandwidth (from above, we will use 60kHz) Vramp _ pp   fco   RZ 2 = R1 ⋅   ⋅    Vin _ max   fp _ LC   1V   60kHz  RZ 2 = R1 ⋅   = 4166Ω ≅ 4020Ω  ⋅ 12V   12 kHz  Calculate CZ2 by placing the zero at ½ of the output filter pole frequency CZ 2 = 1 π ⋅ RZ 2 ⋅ fp _ LC CZ 2 = 1 = 6.59nF ≈ 6.8nF π ⋅ 4020Ω ⋅ 12kHz Calculate CP1 by placing the first pole at ESR zero frequency CP1 = 1 2π ⋅ ( Rz 2 ⋅ fz _ ESR ) 1 = 59.7 pF ≈ 56 pF 2π ⋅ (4020 ⋅ 663KHz ) CP1 = Calculate RZ3 by setting the second pole at ½ of the switching frequency and the second zero at the output filter double pole frequency RZ 3 = 2 ⋅ ( R1) ⋅ ( fp _ LC ) fs − 2 fp _ LC RZ 3 = 2 ⋅ (10kΩ) ⋅ (12kHz ) = 408Ω ≅ 400Ω 600 KHz − 12kHz Calculate CZ3 from RZ3 component value above CZ 3 = 1 π ⋅ RZ 3 ⋅ fs CZ 3 = 1 = 1.3nF ≈ 1500 pF π ⋅ 400Ω ⋅ 600 KHz Choose 100pF ≤ CF1 ≤ 220pF to stabilize the SP7661ER internal Error Amplifier. For this example let’s select 100pF. Feb21-07 SP7661 Evaluation Manual Page 8 of 11 ©2007 Sipex Corporation PC LAYOUT DRAWINGS Figure 10. SP7661EB Component Placement Figure 11. SP7661EB PC Layout Top Side Figure 12. SP7661EB PC Layout 2nd Layer Side Feb21-07 SP7661 Evaluation Manual Page 9 of 11 ©2007 Sipex Corporation Figure 13. SP7661EB PC Layout 3rd Layer Side Figure 14. SP7661EB PC Layout Bottom Side Figure 15. SP7661EB PC Layout Bottom Side Components Feb21-07 SP7661 Evaluation Manual Page 10 of 11 ©2007 Sipex Corporation Table 1: SP7661EB Suggested Components and Vendor Lists ORDERING INFORMATION Model Temperature Range Package Type SP7661EB…................................-40°C to +85°C...............…………….SP7661 Evaluation Board SP7661ER..............................…. -40°C to +85°C...................................……26-pin DFN(option2) For further assistance: Email: WWW Support page: Live Technical Chat: Sipex Application Notes: Type III Loop Compensation Calculator: Sipexsupport@sipex.com http://www.sipex.com/content.aspx?p=support http://www.geolink-group.com/sipex/ http://www.sipex.com/applicationNotes.aspx www.sipex.com/files/Application-Notes/TypeIIICalculator.xls Solved by Sipex Corporation Headquarters and Sales Office 233 South Hillview Drive Milpitas, CA95035 tel: (408) 934-7500 faX: (408) 935-7600 TM Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Feb21-07 SP7661 Evaluation Manual Page 11 of 11 ©2007 Sipex Corporation