74LVQ157

74LVQ157 LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER s s s s s s s s s s s HIGH SPEED: tPD = 7 ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.2V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY SOP TSSOP Table 1: Order Codes PACKAGE SOP TSSOP T&R 74LVQ157MTR 74LVQ157TTR DESCRIPTION The 74LVQ157 is a low voltage CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. It consists of four 2-input digital multiplexers with common select and strobe inputs. When STROBE input is held high selection of data is inhibit and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols July 2004 Rev. 5 1/12 74LVQ157 Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description PIN N° 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 15 8 16 SYMBOL SELECT 1A to 4A 1B to 4B 1Y to 4Y STROBE GND VCC NAME AND FUNCTION Common Data Select Input Data Inputs From Source A Data Inputs From Source B Multiplexer Outputs Strobe Input Ground (0V) Positive Supply Voltage Table 3: Truth Table INPUTS STROBE H L L L L X : Don’t Care OUTPUT A X L H X X B X X X L H Y L L H L H SELECT X L L H H Figure 3: Logic Diagram 2/12 74LVQ157 Table 4: Absolute Maximum Ratings Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 200 -65 to +150 300 Unit V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions Symbol VCC VI VO Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 3.0V (note 2) Parameter Value 2 to 3.6 0 to VCC 0 to VCC -55 to 125 0 to 10 Unit V V V °C ns/V 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V Table 6: DC Specifications Test Condition Symbol Parameter VCC (V) TA = 25°C Min. 2.0 0.8 IO=-50 µA 3.0 IO=-12 mA IO=-24 mA VOL Low Level Output Voltage IO=50 µA 3.0 IO=12 mA IO=24 mA II ICC IOLD IOHD Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 3.6 3.6 3.6 VI = VCC or GND VI = VCC or GND VOLD = 0.8 V max VOHD = 2 V min ± 0.1 4 36 -25 0.002 0 0.1 0.36 2.9 2.58 2.99 2.9 2.48 2.2 0.1 0.44 0.55 ±1 40 25 -25 Typ. Max. Value -40 to 85°C Min. 2.0 0.8 2.9 2.48 2.2 0.1 0.44 0.55 ±1 40 µA µA mA mA V V Max. -55 to 125°C Min. 2.0 0.8 Max. V V Unit VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage 3.0 to 3.6 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 75Ω 3/12 74LVQ157 Table 7: Dynamic Switching Characteristics Test Condition Symbol Parameter VCC (V) 3.3 3.3 CL = 50 pF 3.3 0.8 V TA = 25°C Min. Typ. 0.2 -0.8 2 -0.2 Max. 0.8 V V Value -40 to 85°C Min. Max. -55 to 125°C Min. Max. Unit VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. Table 8: AC Electrical Characteristics (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 2.7 3.3 2.7 (*) Value TA = 25°C Min. Typ. 8.4 7.0 7.6 7.0 6.8 5.5 0.5 0.5 Max. 13.5 10.0 12.0 10.0 10.5 8.0 1.0 1.0 -40 to 85°C Min. Max. 15.5 11.5 14.0 11.5 12.0 9.0 1.0 1.0 -55 to 125°C Min. Max. 17.5 13.0 16.0 13.0 13.5 10 1.0 1.0 ns ns ns Unit tPLH tPHL Propagation Delay Time SELECT -Y tPLH tPHL Propagation Delay Time STROBE -Y tPLH tPHL Propagation Delay Time A, B -Y tOSLH tOSHL Output To Output Skew Time (note1, 2) 3.3(*) 2.7 3.3 2.7 3.3 (*) (*) ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tPHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V Table 9: Capacitive Characteristics Test Condition Symbol Parameter VCC (V) 3.3 3.3 fIN = 10MHz TA = 25°C Min. Typ. 5 32 Max. Value -40 to 85°C Min. Max. -55 to 125°C Min. Max. pF pF Unit CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per channel) 4/12 74LVQ157 Figure 4: Test Circuit CL = 50pF or equivalent (includes jig and probe capacitance) RL = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 5: Waveform - Propagation Delays For Non Inverting Conditions 5/12 74LVQ157 Figure 6: Waveform - Propagation Delays For Non-inverting Conditions 6/12 74LVQ157 SO-16 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8° (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45° (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.25 1.64 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.010 0.063 0.018 0.010 0016020D 7/12 74LVQ157 TSSOP16 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0˚ 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8˚ 0.75 0˚ 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8˚ 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0079 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 8/12 74LVQ157 Tape & Reel SO-16 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.45 10.3 2.1 3.9 7.9 12.8 20.2 60 22.4 6.65 10.5 2.3 4.1 8.1 0.254 0.406 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.262 0.414 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 9/12 74LVQ157 Tape & Reel TSSOP16 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 10/12 74LVQ157 Table 10: Revision History Date 29-Jul-2004 Revision 5 Description of Changes Ordering Codes Revision - pag. 1. 11/12 74LVQ157 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners © 2004 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 12/12