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74LVQ157T

74LVQ157T

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    74LVQ157T - LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER - STMicroelectronics

  • 数据手册
  • 价格&库存
74LVQ157T 数据手册
® 74LVQ157 LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER s s s s s s s s s s s HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 3.3V COMPATIBLE WITH TTL OUTPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.2V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE OUTPUT DRIVE CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12 mA (MIN) PCI BUS LEVELS GUARANTEED AT 24mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2VData Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 157 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ157M 74LVQ157T DESCRIPTION The LVQ157 is a low voltage CMOS QUAD 2-CHANNEL MULTIPLEXER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications. PIN CONNECTION AND IEC LOGIC SYMBOLS It has better speed performance at 3.3V than 5V LSTTL family combined with the true CMOS low power consumption. It consists of four 2-input digital multiplexers with common select and strobe inputs. When strobe input is held high selection of data is inhibit and all the outputs become low. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 1999 1/8 74LVQ157 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 11, 14 3, 6, 10, 13 4, 7,9, 12 15 8 16 SYMBOL SELECT 1A to 4A 1B to 4B 1Y to 4Y STROBE GND VCC NAME AND FUNCT ION Common Data Select Input Data Inputs From Source A Data Inputs From Source B Multiplexer Outputs Strobe Input Ground (0V) Positive Supply Voltage TRUTH TABLE INPUT STROBE H L L L L X:”H” or ”L” OUT PUT A X L H X X B X X X L H Y L L H L H SELE CT X L L H H ABSOLUTE MAXIMUM RATING Symbol VCC VI VO IIK IOK IO ICC orIGND Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current DC VCC or Ground Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 200 -65 to +150 300 Unit V V V mA mA mA mA o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time (VCC = 3V) (note 2) Parameter Supply Voltage (note 1) Valu e 2 to 3.6 0 to VCC 0 to VCC -40 to +85 0 to 10 Unit V V V o C ns/V 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V 2/8 74LVQ157 DC SPECIFICATIONS Symb ol Parameter V CC (V) VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 3.0 to 3.6 3.0 VI(*) = VIH or VIL 3.0 VI(*) = VIH or VIL IO=-50 µA IO=-12 mA IO=-24 mA IO=50 µA IO=12 mA IO=24 mA ±0.1 4 36 -25 0.002 0 0.1 0.36 Test Co nditions Min. 2.0 0.8 2.9 2.58 2.99 2.9 2.48 2.2 0.1 0.44 0.55 ±1 40 µA µA mA mA V V T yp. Valu e T A = 25 oC Max. -40 to 85 o C Min. 2.0 0.8 Max. V V Un it VOL II ICC IOLD IOHD 3.6 3.6 3.6 VI = VCC orGND VI = VCC orGND VOLD = 0.8 V max VOHD = 2 V min 1) Maximum test duration 2ms, one output loaded attime 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50 Ω. (*) All outputs loaded. DYNAMIC SWITCHING CHARACTERISTICS Symb ol Parameter V CC (V) VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 3.3 -0.8 3.3 3.3 CL = 50 pF 0.8 Test Co nditions Min. T yp. 0.2 0.2 2 V Valu e T A = 25 oC Max. 0.8 -40 to 85 o C Min. Max. Un it 1) Worst case package 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n -1) outputs switching and one output at GND 3) max number of data inputs (n) switching. (n-1) switching 0V to3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD). f=1MHz 3/8 74LVQ157 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns) Symb ol Parameter V CC (V) tPLH tPHL tPLH tPHL tPLH tPHL tOSLH tOSHL Propagation Delay Time (SELECT-Y) Propagation Delay Time (STROBE-Y) Propagation Delay Time (A,B-Y) Output to Output Skew Time (note 1, 2) 2.7 3.3(*) 2.7 3.3(*) 2.7 3.3 (*) T est Con ditio n Valu e T A = 25 oC -40 to 85 o C Min. T yp. Max. Min. Max. 7.5 15 17 6.5 11 12 7 6 6 5 0.5 0.5 15 11 11 8 1.5 1.5 17 12 13 9 1.5 1.5 Un it ns ns ns ns 2.7 3.3(*) 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = |tPLHm - tPLHn|, tOSHL = |tPHLm - tpHLn|) 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V CAPACITIVE CHARACTERISTICS Symb ol Parameter V CC (V) CIN CPD Input Capacitance Power Dissipation Capacitance (note 1) 3.3 3.3 fIN = 10 MHz Test Co nditions Min. T yp. 5 24 Valu e T A = 25 oC Max. -40 to 85 o C Min. Max. pF pF Un it 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/4(per channel) TEST CIRCUIT CL = 50 pF or equivalent (includes jigand probe capacitance) RL = R1 = 500Ω orequivalent RT = ZOUT of pulse generator (typically 50Ω) 4/8 74LVQ157 WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING CONDITIONS WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING CONDITIONS 5/8 74LVQ157 SO-16 MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013H 6/8 74LVQ157 TSSOP16 MECHANICAL DATA mm MIN. A A1 A2 b c D E E1 e K L 0o 0.50 0.05 0.85 0.19 0.09 4.9 6.25 4.3 5 6.4 4.4 0.65 BSC 4o 0.60 8o 0.70 0o 0.020 0.10 0.9 TYP. MAX. 1.1 0.15 0.95 0.30 0.20 5.1 6.5 4.48 0.002 0.335 0.0075 0.0035 0.193 0.246 0.169 0.197 0.252 0.173 0.0256 BSC 4o 0.024 8o 0.028 0.004 0.354 MIN. inch TYP. MAX. 0.433 0.006 0.374 0.0118 0.0079 0.201 0.256 0.176 DIM. A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 7/8 74LVQ157 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 8/8
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