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B5S16862

B5S16862

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    B5S16862 - 20-BIT TWO PORT BUS SWITCH WITH FOUR ENABLE CONTROL - STMicroelectronics

  • 数据手册
  • 价格&库存
B5S16862 数据手册
B5S16862 20-BIT TWO PORT BUS SWITCH WITH FOUR ENABLE CONTROL PRELIMINARY DATA s s s s s s s s s HIGH SPEED: tPD = 0.25ns (MAX.) at VCC = 4.5V TA=85°C ON RESISTANCE BETWEEN TWO PORT: 5Ω (TYP) at VCC = 5.0V TA=25°C LOW POWER DISSIPATION: ICC = 1uA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH=2V(MIN), VIL=0.8V(MAX) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 4V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16862 IMPROVED LATCH-UP IMMUNITY ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V TSSOP ORDER CODES PACKAGE TSSOP48 T&R PIN CONNECTION bs O DESCRIPTION The B5S16862 is an advanced high-speed CMOS 20-BIT TWO PORT BUS SWITCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It is ideal for 4V to 5.5V VCC operations and ultra-low power and low noise applications, typically notebook and docking station. Any nG output control governs four 5-bit BUS SWITCHES. Output Enable inputs (nG) tied together gives full 20-bit operations. When nG is LOW, the switches are on. When nG is HIGH, the switches are in high impedance state. It has ultra high-speed performance at 5V near zero delay with low ON resistance. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. let o Pr e du o (s) ct so Ob - te le ro P uc d B5S16862TTR s) t( February 2003 1/9 This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice. B5S16862 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 13 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 34, 33, 32, 31, 30, 29, 28, 27, 26, 25 46, 45, 44, 43, 42, 41, 40, 39, 38, 37 47, 35 12, 24 36, 48 SYMBOL 2G, 4G NAME QND FUNCTION Bus Enable Input (Active Low) SCHEMATIC DIAGRAM 1A0 to 1A9 Data Inputs 2A0 to 2A9 Data Inputs 2B0 to 2B9 Data Outputs 1B0 to 1B9 Data Outputs 1G, 3G GND VCC TRUTH TABLE O bs let o yG L H INPUT Pr e X X du o Bus Enable Input (Active Low) Ground (0V) (s) ct OUTPUT 1Bn, 2Bn Bus ON Z so Ob - te le ro P uc d s) t( Positive Supply Voltage 1An, 2An y: 1 to 4 y: 1, active on 1An, y: 2, active on 1An, y: 3, active on 2An, y: 4, active on 2An, X: "H" or "L" Z: High Impedance 1Bn port only with n:0 to 1Bn port only with n:5 to 2Bn port only with n:0 to 2Bn port only with n:5 to 4 9 4 9 2/9 B5S16862 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO VO IIK IOK IO Supply Voltage DC Switch and Control Pin Voltage DC Output Voltage (VCC = 0V) (note 1) DC Output Voltage (VI/O=Gnd) DC Input Diode Current (VI/O < 0V) DC Output Diode Current (note 2) DC Output Current (note 3) Parameter² Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 - 50 - 50 128 ± 100 -65 to +150 300 Unit V V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current per Supply Pin Storage Temperature Tstg TL Lead Temperature (10 sec) Absolute Maximum Rating are those value beyond which damage to the device may occour. Functional operation under these condition is not implied 1) IO absolute maximum rating must be observed 2) VO < GND, VO > VCC 3) Not more than one output should be tested at one time. Duration of the test should not exceed one second. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO VO Top dt/dv dt/dv Supply Voltage Input Voltage Output Voltage (VCC = 0V) Output Voltage Operating Temperqture Switch Input Rise and Fall Time Control Input Rise and Fall Time (note 1) Parameter 1) VIN from 0.8V to 2V at VCC = 3.0V bs O let o Pr e du o (s) ct Ob - so te le ro P Value 4 to 5.5 0 to 5.5 uc d s) t( Unit V V V V °C ns/V ns/V 0 to 5.5 0 to 5.5 -55 to 125 0 to DC 0 to 10 3/9 B5S16862 DC SPECIFICATION Test Condition Symbol Parameter VCC (V) 4 to 5.5 4 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.0 II IOZ VIK ICC ICCD Input Leakage Current 0 to 5.5 ION=64 mA VI=0V ION=48 mA VI=0V ION=15 mA VI=2.4V ION=15 mA VI=2.4V 5 10 14 ±0.1 150 7 7 Ω 15 22 TA = 25 °C Value -40 to 85 °C -55 to 125 °C Unit Min. Typ. Max. Min. Max. Min. Max. 2 0.8 2 0.8 2 0.8 V V mV VIH VIL VH RON High Level Input Voltage Low Level Input Voltage Input Hysteresis at Control pin Switch ON Resistance VI = 5.5V or GND High Impedance Leakage VI/O = 5.5V 4.5 to 5.5 Current to GND Clamp Diode Voltage II = -18mA 4.0 to 5.5 Quiescent Supply Current Supply Current per Control Input per MHz (1) 5.5 5.5 VI = VCC or GND VI/O = Open nG=GND; Control Input Toggling 50% Duty Cycle VIC=VCC-2.1 V ±1.0 ∆ICC ICC incr. per Input 1) This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency. The 1An and 2An inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is guaranteed by design. AC ELECTRICAL CHARACTERISTICS bs O Symbol let o Pr e du o (s) ct 5.5 so Ob - te le 0.1 -0.7 ro P ±1.0 -1.2 3.0 uc d s) t( ±2.0 ±2.0 -1.2 10.0 µA µA V µA 1.0 0.25 mA/ MHz 2.5 mA Test Condition VCC (V) CL (pF) 50 4.5 to 5.5 50 50 RL (Ω) 500 500 500 Value ts = tr -40 to 85 °C -55 to 125°C (ns) Min. Max. Min. Max. 2.5 2.5 2.5 1.5 1.5 0.25 5.5 5.5 Unit Parameter tPLH tPHL tPZL tPZH tPLZ tPHZ Propagation Delay Time (1) xAn to xBn, xBn to xAn(2) Output Enable Time Output Disable Time ns ns ns 1) Parameter guaranteed by design 2) X=1,2; n=0..9. 4/9 B5S16862 CAPACITANCE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) Value TA = 25 °C Min. Typ. 4 5.0 nG=VCC 5.5 Max. pF pF Unit CIN CI/O Input Capacitance at Control Pin Input Capacitance at I/O Pin TEST CIRCUIT TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ CL = 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) bs O let o od Pr e ct u (s) so Ob - te le ro P uc d s) t( SWITCH Open 7V Open 5/9 B5S16862 WAVEFORM 1: PROPAGATION DELAY (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) bs O let o Pr e du o (s) ct so Ob - te le ro P uc d s) t( 6/9 B5S16862 TSSOP48 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0˚ 0.50 6.0 0.5 BSC 8˚ 0.17 0.09 12.4 8.1 BSC 6.2 0.236 0.05 0.9 0.27 0.20 12.6 0.0067 0.0035 0.488 0.318 BSC TYP MAX. 1.2 0.15 0.002 0.035 0.011 0.0079 MIN. TYP. MAX. 0.047 0.006 inch A A2 A1 b bs O let o ro P e du (s) ct e D so Ob c 0.75 te le 0˚ 0.020 ro P 0.0197 BSC uc d s) t( 0.496 0.244 8˚ 0.030 K L E E1 PIN 1 IDENTIFICATION 1 7065588C 7/9 B5S16862 Tape & Reel TSSOP48 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 8.7 13.1 1.5 3.9 11.9 12.8 20.2 60 30.4 8.9 13.3 1.7 4.1 12.1 0.343 0.516 0.059 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.350 MIN. TYP. MAX. 12.992 0.519 inch bs O let o Pr e du o (s) ct so Ob - eP let ro uc d s) t( 0.524 0.067 0.161 0.476 8/9 B5S16862 bs O let o Pr e du o (s) ct so Ob - te le ro P uc d s) t( Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 9/9
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