EMIF06-MSD02N16
Datasheet
6-line IPAD EMI filter and ESD protection in micro QFN package
Features
Micro QFN 16L 3.5 mm x 1.2 mm
(bottom view)
1
•
•
•
•
•
•
Vcc
WP/CD
R11
R7
R8
R9
R10
R12
DAT3 pull- up
DAT2_In
R1
DAT2_Ex
DAT3_In
R2
DAT3_Ex
CMD_In
R3
CMD_Ex
R4
R5
DAT1_In
R6
GND
R13
CLK_In
DAT0_In
DAT3 pull- down
CLK_Ex
•
•
High design flexibility
Lead free package
Very low PCB space consuming: 3.5 mm x 1.2 mm
Very thin package: 0.55 mm max.
High efficiency in ESD suppression
Complies with the following standards:
–
IEC 61000-4-2 level 4 on external pins
High reliability offered by monolithic integration
High reduction of parasitic elements through integration and μQFN packaging
Applications
DAT0_Ex
DAT1_Ex
GND
Where EMI filtering in ESD sensitive equipment is required:
•
Portable devices
•
Navigation systems
•
Digital still cameras
•
Industrial and medical devices
Description
Product status
EMIF06-MSD02N16
Product label
The EMIF06-MSD02N16 is a 6-line, highly integrated product designed to suppress
EMI/RFI noise and protect against ESD all the devices implementing a SD card or a
T-Flash card.
The EMIF06-MSD02N16 allows designers to choose either mechanical card
detection of electrical card detection without any additional components.
By integrating 20 discrete components in a single DFN package of 4 mm²,
the EMIF06-MSD02N16 provides a robust and immune space-saving solution to
interface the connector and the controller of the SD cad slot.
DS5979 - Rev 7 - February 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
EMIF06-MSD02N16
Characteristics
1
Characteristics
Figure 1. Pin configuration
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
Value
Unit
ESD IEC 61000-4-2
Contact discharge:
VPP
•
on DATx_In, CMD_In and CLK_In pins
±2
•
On all other pins
±8
kV
Air discharge:
Tj
DS5979 - Rev 7
•
on DATx_In, CMD_In and CLK_In pins
±12
•
On all other pins
±15
Maximum junction temperature
125
°C
Top
Operating temperature range
- 40 to + 85
°C
Tstg
Storage temperature range
- 55 to + 150
°C
page 2/14
EMIF06-MSD02N16
Characteristics
Figure 2. Electrical characteristics (definitions)
I
IF
Symbol
Parameter
Breakdown voltage
VBR
IRM
Leakage current at VRM
VRM
VCL
VBR
VCL
Stand-off voltage
Clamping voltage
Rd
IPP
RI/O
Cline
VF
VRM
V
IRM
IR
Dynamic resistance
Peak pulse current
Series resistance between Input and Output
Input capacitance per line
IPP
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol
VBR
IR = 1 mA
IRM
VRM = 3 V per line
R1, R2, R3, R4, R5, R6
Min.
Typ.
5
Max.
Unit
8
V
200
nA
Series resistors - tolerance ±20%
36
45
54
Ω
Pull-up resistors
80
90
100
kΩ
R13
Pull-down resistor - tolerance ±20%
375
470
565
kΩ
Cline
VLINE = 0 V dc, VOSC = 30 mV, F = 1 MHz
20
pF
R7, R8, R9, R10, R11, R12
DS5979 - Rev 7
Test conditions
page 3/14
EMIF06-MSD02N16
Characteristics (curves)
1.1
Characteristics (curves)
Figure 4. Analog cross talk measurements
Figure 3. S21 attenuation measurement
0.00
dB
0.00
-10.00
-20.00
-10.00
-30.00
-40.00
-50.00
-20.00
-60.00
-70.00
-80.00
-30.00
-90.00
-100.00
-40.00
-110.00
F (Hz)
-50.00
F (Hz)
-120.00
-130.00
100.0k
DAT0
DAT2
CLK
1.0M
10.0M
100.0M
1.0G
-140.00
DAT1
DAT3
CMD
100.0k
1.0M
DAT2 -DAT3
Figure 5. ESD response to IEC 61000-4-2 (+12 kV air
discharge) on one input (Vin) and on one output (Vout)
10.0M
100.0M
DAT2 -DAT1
1.0G
Figure 6. ESD response to IEC 61000-4-2 (- 12 kV air
discharge) on one input (Vin) and on one output (Vout)
IN
55V Max
IN
-41V Max
OUT
39V Max
-34V Max
OUT
Figure 7. Line capacitance versus reverse voltage applied on DATx and CMD line
CLINE (pF)
16
14
12
10
8
6
4
VLINE(V)
2
0
0.0
DS5979 - Rev 7
1.0
2.0
3.0
4.0
5.0
page 4/14
EMIF06-MSD02N16
Application information
2
Application information
The EMIF06-mSD02N16 is a dedicated interface device for micro SD card/T-Flash card. The device provides:
•
ESD protection
•
EMI filterering
•
Pull-up resistors
•
Card detection circuit
2.1
ESD protection
Each pin is connected to a TVS diode able to withstand 12 kV on all pins except on DATx_In, CMD_In and
CLK_In.
2.2
EMI filtering
DATx, CMD and CLK lines are immunized against EMI radiations thanks to pi-filters. To avoid any degradation
of the signal integrity at high frequency, the total line capacitance stays lower than 20 pF making the device
compatible with a clock frequency up to 52 MHz.
2.3
Pull-up resistors
As recommended by the SD Specifications (Part 1 Physical Layer Version 2.00), all the data lines DATx and the
CMD line must be pulled-up with resistors of 10 to 100 kΩ to avoid bus floating not only in SD 4-bit mode but also
in SD 1-bit and SPI mode.
For the EMIF06-MSD02N16 device the pull-up resistor value has been fixed at 90 kΩ. This value makes the
EMIF06-MSD02N16 compatible with most of the level shifters that may be used in the circuit including auto
direction-sensing translators known to exhibit a weak current output.
2.4
Card detection circuit
The EMIF06-mSD02N16 provides the flexibility to use either mechanical card detection with a dedicated pin
connected to the memory card slot or the electrical card detection using the internal pull-up resistor of DAT3 of the
micro SD card/T-Flash card.
In case of mechanical card detection, the user must add a pull-up on the circuit connected to the CD (Card
Detect) of the micro-SD/T-Flash slot as shown in Figure 8.
Figure 8. Mechanical card detection
VDD
Pull-u p
resistor
Host
controller
GND
WP/CD
GND
Contact when
insertingthe card
SD card
DS5979 - Rev 7
page 5/14
EMIF06-MSD02N16
Card detection circuit
A pull-up of 90 kΩ is embedded into the EMIF06-MSD02N16. The routing corresponding to the mechanical card
detection configuration is shown in Figure 9.
Figure 9. Circuit routing for mechanical card detection
Card detect host input
Card detect host input
NC
Pin 1–DAT2
Pin 2–CD/DAT3
Pin 3–CMD
Pin 4–VCC
Pin 5–CLK
Pin 6–GND
Pin 7–DAT0
HO ST CONT RO LL ER
HO ST CONT RO LLE R
Card detect pin
Card detect pi n
NC
DAT2 – Pin 1
CD/DAT3 – Pin 2
CMD – Pin 3
VCC – Pin 4
CLK – Pin 5
GND – Pin 6
DAT0 – Pin 7
DAT1– Pin 8
Pin 8–DAT1
Top level
DAT3 pul l-up
Card detect pull-up
Top le vel
DAT3 pul l-up
Card detect pul l-up
Bottom view
Top view
In case of electrical card detection, the user must add a pull-down on the circuit connected to the CD/DAT3 pin of
the micro-SD/T-Flash pin as shown in Figure 10.
Figure 10. Electrical card detection
Host
contr oller
DAT3 (CD)
Pull -d own
resistor
GND
VDD
50 kΩ
0
SD card
A pull-down of 470k is embedded into the EMIF06-mSD02N16. The routing corresponding to the electrical card
detection configuration is shown in Figure 11.
Figure 11. Circuit routing for electrical card detection
NC
Pin
Pin
4––VCC
4VCC
Pin
Pin
5–CLK
–CLK
5
PinPin
6 –GND
–GND
6
Pin
Pin
7–DAT0
–DAT0
7
HO ST CONT RO LLE R
Pin
Pin
3––CMD
3CMD
Pin
Pin
8–DAT1
–DAT1
8
HO ST CONT RO LLE R
Pin
Pin
1–DAT2
–DAT2
1
PinPin
2 –CD/DAT3
2
NC
DAT2
–Pin
– Pin
1 1
CD/DAT3
–Pin –2Pin 2
CMD
–Pin
– Pin
3 3
VCC
–Pin
– Pin
4 4
CLK
–Pin
– Pin
5 5
GND
–Pin
– Pin
6 6
DAT0
–Pin
– Pin
7 7
DAT1
–Pin
– Pin
8 8
Top le vel
DAT3 pullpul l down
Bottom view
DS5979 - Rev 7
Top le vel
DAT3 pul l-down
Top vie w
page 6/14
EMIF06-MSD02N16
Package information
3
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
3.1
Micro QFN 3.5x1.2-16L package information
•
Epoxy meets UL94, V0
Figure 12. Micro QFN 3.5x1.2-16L package outline
A
E
Pin 1
Index area
1
D
A1
M
E2
D2
L
k
1
b
DS5979 - Rev 7
e
b1
L1
page 7/14
EMIF06-MSD02N16
Micro QFN 3.5x1.2-16L package information
Table 3. Micro QFN 3.5x1.2-16L package mechanical data
Dimensions
Millimeters
Ref.
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.45
0.50
0.55
0.018
0.020
0.022
A1
0.00
0.05
0.000
b
0.15
0.20
0.25
0.006
0.008
0.010
b1
0.25
0.30
0.35
0.010
0.012
0.014
0.002
D
3.45
3.50
3.55
0.136
0.138
0.140
D2
2.70
2.80
2.90
0.106
0.110
0.114
E
1.15
1.20
1.25
0.045
0.047
0.049
E2
0.20
0.30
0.40
0.008
0.012
0.016
e
0.40
0.016
k
0.20
0.008
L
0.20
0.25
0.30
0.008
0.010
L1
0.15
0.006
M
0.20
0.008
Figure 13. Micro QFN 3.5x1.2-16L footprint (dimensions in
mm)
1.6
0.70
0.30
2.30
0.45
0.40
DS5979 - Rev 7
Figure 14. Marking
Dot : Pin 1 Identification
XX = Marking (see Table4)
WW = Data code (week)
Y = Data code (year)
P = Assembly plant
3.00
0.012
XX
WW
YP
0.20
page 8/14
EMIF06-MSD02N16
Micro QFN 3.5x1.2-16L package information
Figure 15. Tape and reel outline
Dot identifying Pin A1 location
5.5 ± 0.1
12.00 ± 0.3
3.70 ± 0.1
All dimensions in mm
1.75 ± 0.1
4.00 ± 0.1
2.00 ± 0.1
0.80 ± 0.1
Ø 1.55 ± 0.05
N6
N6
1.70 ± 0.1
N6
N6
N6
N6
4.00 ± 0.1
User direction of unreeling
In no case should the product marking be used to orient the component for its placement on a PCB. Only pin 1
mark is to be used for this purpose.
DS5979 - Rev 7
page 9/14
EMIF06-MSD02N16
Recommendation on PCB assembly
4
Recommendation on PCB assembly
4.1
Stencil opening design
1.
2.
General recommendation on stencil opening design
a.
Stencil opening dimensions: L (Length), W (Width), T (Thickness).
General design rule
a.
Stencil thickness (T) = 75 ~ 125 μm
b.
c.
3.
Aspect ratio = W
T ≥ 1.5
Aspect area =
L × W
≥ 0.66
2T L + W
Reference design
a.
Stencil opening thickness: 100 μm
b.
Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c.
Stencil opening for leads: Opening to footprint ratio is 90%
Figure 16. Stencil opening dimensions
L
T
W
Figure 17. Recommended stencil window position
5µm
5µm
420 µm
450 µm
15 µm
3.00
190 µm
15 µm
1.6
0.70
0.30
200 µm
2.30
0.45
2800 µm
300 µm
200 µm
50 µm
2100 µm
DS5979 - Rev 7
0.20
Footprint
50 µm
350 µm
0.40
350 µm
Stencil window
Footprint
page 10/14
EMIF06-MSD02N16
Solder paste
4.2
Solder paste
1.
2.
3.
4.
4.3
Placement
1.
2.
3.
4.
5.
6.
4.4
Manual positioning is not recommended.
It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
Standard tolerance of ±0.05 mm is recommended.
3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
PCB design preference
1.
2.
4.5
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during high speed.
Solder paste with fine particles: powder particle size is 20-45 μm.
To control the solder paste amount, the closed via is recommended instead of open vias.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
Reflow profile
Figure 18. ST ECOPACK® recommended soldering reflow profile for PCB mounting
250
240-245 °C
Temperature (°C)
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
DS5979 - Rev 7
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile
corresponds to the latest IPC/JEDEC J-STD-020.
page 11/14
EMIF06-MSD02N16
Ordering information
5
Ordering information
Figure 19. Ordering information scheme
EMIF
06 - MSD02
N16
EMI Filter
Number of lines
Information
MSD = application
02 = version
Package
N = narrow micro QFN
16 = 16 leads
Table 4. Ordering information
DS5979 - Rev 7
Part number
Marking
Package
Weight
Base qty.
Delivery mode
EMIF06-MSD02N16
N6
Micro QFN
6.17 mg
3000
Tape and reel (7”)
page 12/14
EMIF06-MSD02N16
Revision history
Table 5. Document revision history
DS5979 - Rev 7
Date
Version
Changes
21-Nov-2008
1
Initial release.
06-Sep-2019
2
Updated Table 3. Minor text changed.
11-May-2020
3
Updated product links and product label.
05-Nov-2020
4
Updated Figure 1.
20-Jan-2021
5
Updated Table 1.
27-Apr-2021
6
Updated Table 1.
01-Feb-2022
7
Updated Description, Figure 14 and Table 4.
page 13/14
EMIF06-MSD02N16
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2022 STMicroelectronics – All rights reserved
DS5979 - Rev 7
page 14/14
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