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L9349TR-LF

L9349TR-LF

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOIC20

  • 描述:

    IC PWR SWITCH N-CHAN 1:1 PWRSO20

  • 数据手册
  • 价格&库存
L9349TR-LF 数据手册
L9349-LF Quad intelligent power low side switch ■ Four low-side output driver with protection diagnostics designed as a conventional switch – 2 channels with 5 A output current capability and rON = 0.2  typ. – 2 channels with 3 A output current capability and rON = 0.3  typ. ■ Integrated 60 V Zener diodes output clamping structure ■ Output slope control ■ Short circuit protection ■ Open load detection in ON and OFF condition ■ Load bypass detection ■ Overload disable ■ Signal and power ground loss shutdown ■ Selective overtemperature shutdown ■ Electrostatic discharge (ESD) protection PowerSO-20 The device is equipped with an integrated Zener diodes clamp for fast inductive load current recirculation. This structure limits the output voltage during the recirculation phase to 50V. The device is self-protected against short circuit at the outputs and overtemperature. For the real time error diagnosis, the voltage and the current of the outputs are compared with internally fixed thresholds to recognize open load in OFF and ON conditions. Description The L9349 is a monolithic IC designed to drive inductive loads in low side configurations like hydraulic valves used in ABS systems. The output voltages are also compared with each other in OFF condition with a fixed offset, in order to recognize load bypasses. Particular care has been taken to protect the device against failures, to avoid electromagnetic interferences and to offer extensive real time diagnostics. If the over load current threshold is exceeded, the output current will be limited internally during the diagnostic overload delay switch-off time. The internal pull down current source at the ENable and INput pins assures, that the device is switched off, in case of open input conditions. All four channels are monitored with a status output. The diagnostic output level in connection with different enable and input conditions allows it to recognize the different fail states. An output voltage slope limitation is implemented to reduce the EMI. Table 1. Device summary Order code Package(1) Packing L9349-LF PowerSO-20 Tray L9349TR-LF PowerSO-20 Tape and reel 1. ECOPACK® package (see Section 4: Package information) September 2013 Rev 6 1/17 www.st.com 1 Contents L9349-LF Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.3 Electrical characteristics (operating range) . . . . . . . . . . . . . . . . . . . . . . . . 8 3.4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.5 Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3.6 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/17 L9349-LF List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics (operating range). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Corresponding filter time for each detected signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3/17 List of figures L9349-LF List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. 4/17 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pins connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 tEO clamping time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Output slope (resistive load for testing) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Timing (tDOL, tDIOU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Block diagram - Open load voltage detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Application circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 PowerSO-20 mechanical data and package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . 15 L9349-LF 1 Block diagram Block diagram Figure 1. Block diagram IN1 D1 Channel 1 OUT1 VS EN 52V Output Control OUT4 IN4 Overtemp R Q S Delay Time R IO Overload D4 Diagnostic Control Openload Channel 4 IN2 D2 Channel 2 OUT2 IN3 D3 Channel 3 OUT3 00AT0025 GND 5/17 Pins description 2 L9349-LF Pins description Figure 2. Pins connection (top view) Heat sink connected to pins 1, 10, 11, 20 PGND OUT1 D1 IN4 VS NC IN3 D2 OUT2 PGND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 PGND OUT4 D4 IN1 EN GND IN2 D3 OUT3 PGND 00AT0026 Table 2. 6/17 Pins description N° Pin Function 1 PGND Power Ground 2 Out1 Output 1 (5A) 3 D1 Diagnostic 1 4 IN4 Input 4 5 VS Supply Voltage 6 NC Not Connected 7 IN3 Input 3 8 D2 Diagnostic 2 9 Out2 Output 2 (5A) 10 PGND Power Ground 11 PGND Power Ground 12 Out3 Output 3 (3A) 13 D3 Diagnostic 3 14 IN2 Input 2 15 GND 16 EN Common Enable 17 IN1 Input 1 18 D4 Diagnostic 4 19 Out4 Output 4 (3A) 20 PGND Power Ground Signal Ground L9349-LF Electrical specifications 3 Electrical specifications 3.1 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Conditions Value Unit VS DC supply voltage -0.3 to 32 V VSP Supply voltage pulse (duration 5 (Min.) internal limited (Max.) A IO3, 4 DC output current out 3, 4 >3 (Min.) internal limited (Max.) A IOR1, 2 Reverse output current -5 A IOR3, 4 Reverse output current -3 A 50 mJ 30 mJ ±0.3 V 175 °C 190 °C EO1, 2 tEO = 250s,(1) Switch-off energy for inductive loads T = 5ms VGND GND potential difference Tj = -40 to 150°C TjEO Junction temperature during switch- t  30 min off t  15 min EO3, 4 Tj Junction temperature -40 to TjDIS °C Tstg Storage temperature -55 to 150 °C TjDIS Thermal disable junction temperature threshold 180 to 210 °C ESD Electrostatical discharging MIL883C +-2 kV ESD OUT1 - 4 vs. Common-GND (PGNDs + GND) +-4 kV Value Unit 3 °C/W 1. tEO is the clamping time (see Figure 3) 3.2 Thermal data Table 4. Symbol Thermal data Parameter RTh j-case Thermal resistance junction to case 7/17 Electrical specifications 3.3 L9349-LF Electrical characteristics (operating range) The electrical characteristics are valid within the below defined operating range, unless otherwise specified. Table 5. Electrical characteristics (operating range) Symbol VS Tj1 Parameter Test Condition Board supply voltage Junction temperature Tj2 t  15min (1) over life time Min. Typ. Max. Unit 4.5 12 32 V -40 150 °C 150 TjDIS °C 1. Parameters guaranteed by correlation 3.4 Electrical characteristics Table 6. Electrical characteristics (VS = 4.5 to 32V; -40°C  Tj1  150°C < Tj2  TjDIS, unless otherwise specified.) Values Tj1 Symbol Parameter Values Tj2 Test conditions Unit Min. Typ. Max. 10 Min. Max. Supply IVS OFF DC supply current Off EN = 1.0V 5 IVS ON DC supply current On VS  14V; VIN, VEN = 2V 8 mA mA Diagnostic outputs D1 - D4 VDL Diagnostic output low voltage ID  3mA 0.65 1.0 1.5 V IDLE Diagnostic output leakage current VD = 14V (1) 0.1 2 20 A Tj = 25°C Tj = 150°C VS > 9.5V IO1,2 = 2A 200 300 500 m Tj = 25°C Tj = 150°C VS > 9.5V IO3,4 = 1.3A 300 450 750 m V Outputs Out 1 - Out 4 RDSON 1, 2 Output On resistance RDSON 3, 4 VZ Z-diode clamping voltage IOCL  200mA 45 60 RO Output pull down resistor VS > 9.5V EN = 0V 10 40 Open load voltage threshold VIN = 1V VOUV 1-4 8/17 0.525 x VS 0.55 x VS 0.575 x VS 50 k V L9349-LF Table 6. Electrical specifications Electrical characteristics (continued) (VS = 4.5 to 32V; -40°C  Tj1  150°C < Tj2  TjDIS, unless otherwise specified.) Values Tj1 Symbol Parameter Unit Min. 2-3, 4-1, 3-2 Open load difference voltage threshold Typ. Max. 0.003 x VS VOUV hys 1-4 Hysteresis VOUV 1-4, Values Tj2 Test conditions VIN1,4/2,3 = 1V VS  16V VOc  4.5V VOC = output voltage of other channel VOC 1.0V VOC 1.25V Min. Max. V VOC 1.5V V VOUV hys 14, 2-3, Open load hysteresis 40 mV 4-1, 3-2 IOUC 1, 2, 3, 4 IOOC 1, 2 IOOC 3, 4 Open load current threshold VEN=VIN=2V; VS=6.5 - 16V Over load current threshold VS > 6.5V; VOUT = 32V TSD Thermal shut down TSD-hys Thermal shut down hysteresis IOUT-LE OUT leakage current 160 320 480 5 10 A 3 6 A 180 195 210 20 VOUT = 20V VS = 0V mA °C °C 5 A -0.3 1 V 2.0 6 V Inputs IN1-4, EN VIN,EN L Logic input/enable low voltage VIN,EN H Logic input/enable high voltage VEN,IN hys IN, EN Logic input hysteresis IIN Input sink current IEN Enable sink current 2V < VIN, VEN < 6V VIN, VEN < Vs (2) 50 100 mV 10 20 40 A 10 20 40 A 4 25 s Timing tON Output delay ON time IO 1A VS = 12V (3) Figure 4 tf,r Output fall and rise time IO 1A VS = 12V Figure 4 3 10 30 s tOFF Output delay OFF time IO  1A VS = 12V (3) Figure 4 5 15 30 s 9/17 Electrical specifications Table 6. L9349-LF Electrical characteristics (continued) (VS = 4.5 to 32V; -40°C  Tj1  150°C < Tj2  TjDIS, unless otherwise specified.) Values Tj1 Symbol Parameter Unit Min. Diag. delay output OFF time (3) tD IOU Diagnostic open load delay time 9V< VS 3A H H off L SGND or PGND loss channel off X L off H SGND or PGND loss channel on H H off L Normal function GND short Load bypass Open load 1.25V IO1,2,3,4typ < 320mA Tjtyp  190°C Overtemperature Over load 10/17 L9349-LF 3.6 Electrical specifications Circuit description The L9349 is a quad low side driver for inductive loads like valves in automotive environment. The internal pull down current sources at the ENable and INput pins assure in case of open input conditions that the device is switched off. An output voltage slope limitation for du/dt is implemented to reduce the EMI. An integrated active flyback voltage limitation clamps the output voltage during the flyback phase to 50 V. Each driver is protected against short circuit at VOUT < 32V and thermal overload. In short circuit condition the output will be disabled after a short delay time tDOL. The thermal disable for TJ > 180°C of the output will be reset if the junction temperature decreases about 20°C below the disable threshold temperature. The overtemperature, overload and groundloss information is stored until IN is low. For the real time error diagnosis the voltage and the current of the outputs are compared with internal fixed values VOUV for OFF and IOUC for ON conditions to recognize open load (RL  20K, RL > 38) in OFF and ON conditions. Also the output voltages VO1- 4 are compared to each other output in OFF condition with a fixed offset of VOUV to recognize load bypasses. The VOUV diagnoses is suppressed during the flyback phases of the compared output. The outputs 1 and 4 are compared for VOUV and also outputs 2 and 3 are compared. The diagnostic output level in connection with different ENable and INput conditions allows to recognize different fail states, like overtemp, short to VS, short to GND, bypass to GND and disconnected load (see Table 7: Diagnostic). The diagnostic output is protected against short circuit. Exceeding the over load current threshold IOOC, the output current will be limited internally during the diagnostic overload delay switch-off time tDOL. The device complies the ISO pulses imposed to the supply voltage of the valves without any failures of the functionality. Therefore some diagnostic functions are internal filtered. The following table shows the corresponding filter time for each detected signal. Table 8. Corresponding filter time for each detected signal Overloading of output (also shorted load to supply) ON State OFF State EN and IN = HIGH EN or IN, = LOW X Open load (under voltage detection) X min. Filter time Reset done by 4 s INx = “LOW” - Open load (under current detection) X - Overtemperature X 4 s INx = “LOW” Power-signal GND-loss X 4 s INx = “LOW” Power-signal GND-loss X 4 s Openload difference X 4s 11/17 Electrical specifications Figure 3. L9349-LF tEO clamping time VO1-4 VOCL VS t tEO T 00AT0027 Figure 4. Output slope (resistive load for testing) VIN VEN 5V VH VL t VOUT tON tOFF VS 0.85V S VOUV 0.15V S t VDIAG tf VD 0.5V D 00AT0030 12/17 tr tD H-L Diag L9349-LF Electrical specifications Figure 5. Timing (tDOL, tDIOU) IN VON IOOC IOUC VD tfilt tDIOU tDOL Open Load Current 00AT0032 Figure 6. Block diagram - Open load voltage detection VBatt L1 (L2) OUT1 (OUT2) L4 (L3) OUT4 (OUT3) IN1 IN4 RIO RIO VS 55% ± + + ± Enable R Latch Q S S R Latch Q 00AT0033 VO UV1 VO UV4 13/17 Electrical specifications Figure 7. L9349-LF Logic diagram VEN VIN VO U IOO IOU Figure 8. Open Load Voltage Normal Operation OFF Open Load Voltage Open Load Current Normal Operation ON Latch Reset Latched Over. Load Diagnostic Open Load Current 00AT0034 Normal Operation ON Open Load Current VD Application circuit diagram +5V VCC I/O IN1 I/O D1 I/O EN OUT1 Channel 1 Z VALVE VS KL15 +45V 52V IN4 Overtemp +5V R Q I/O D4 S Delay Time KL30 OUT4 Output Control I/O Z VALVE R IO Overload μP Controller Diagnostic Control +5V Openload Channel 4 I/O IN2 I/O D2 Channel 2 OUT2 Z VALVE +5V GND 00AT0035 14/17 I/O IN3 I/O D3 Channel 3 OUT3 Z VALVE GND VBatt L9349-LF 4 Package information Package information In order to meet environmental requirements, ST (also) offers these devices in ECOPACK® packages. ECOPACK® packages are lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 9. PowerSO-20 mechanical data and package dimensions DIM. mm MIN. TYP. A a1 inch MAX. MIN. TYP. 3.6 0.1 0.3 a2 0.004 0.012 3.3 0.130 a3 0 0.1 0.000 0.004 b 0.4 0.53 0.016 0.021 c 0.23 0.32 0.009 0.013 D (1) 15.8 16 0.622 0.630 D1 (2) 9.4 9.8 0.370 0.386 E 13.9 14.5 0.547 e 1.27 e3 E1 (1) 0.570 0.450 11.1 E2 0.429 0.437 2.9 0.114 E3 5.8 6.2 0.228 G 0 0.1 0.000 0.004 H 15.5 15.9 0.610 0.626 h L 0.244 1.1 0.8 1.1 0.043 0.031 N 8˚(typ.) S 8˚(max. ) T Weight: 1.9gr 0.050 11.43 10.9 OUTLINE AND MECHANICAL DATA MAX. 0.142 10 JEDEC MO-166 0.043 0.394 PowerSO-20 (1) “D and E1” do not include mold flash or protusions. - Mold flash or protusions shall not exceed 0.15mm (0.006”) - Critical dimensions: “E”, “G” and “a3”. (2) For subcontractors, the limit is the one quoted in jedec MO-166 N R N a2 b A e DETAIL A c a1 DETAIL B E e3 H DETAIL A lead D slug a3 DETAIL B 20 11 0.35 Gage Plane -C- S SEATING PLANE L G E2 E1 BOTTOM VIEW C (COPLANARITY) T E3 1 h x 45˚ 1 0 PSO20MEC D1 0056635 I 15/17 Revision history 5 L9349-LF Revision history Table 9. 16/17 Document revision history Date Revision Changes 20-Sep-2002 4 Initial release. 09-Sep-2008 5 Document reformatted. Updated feature and description on page 1. Added Table 1: Device summary on page 1. Updated Table 3: Absolute maximum ratings on page 7. 20-Sep-2013 6 Updated disclaimer. L9349-LF Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B) AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 17/17
L9349TR-LF 价格&库存

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L9349TR-LF
  •  国内价格 香港价格
  • 600+29.04159600+3.51411
  • 1200+24.492931200+2.96371
  • 3000+23.268313000+2.81552

库存:1201