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LMC7101ILT

LMC7101ILT

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOT23-5

  • 描述:

    LMC7101ILT

  • 数据手册
  • 价格&库存
LMC7101ILT 数据手册
LMC7101 Datasheet Tiny, low power, 16 V single operational amplifier for cost-optimized systems Features SOT23-5 • • • • • • • • • Low power consumption: 235 µA typ. at 5 V Supply voltage: 3 V to 16 V Gain bandwidth product: 900 kHz typ. Offset voltage: 3 mV maximum Low input bias current: 1 pA typ. High tolerance to ESD: 4 kV Wide temperature range: -40 °C to +125 °C Rail-to-Rail input and output SOT23-5 package Applications • • • • • • Industrial and automotive signal conditioning Active filtering Power savings in power-conscious applications Medical instrumentation High impedance sensors Easy interfacing with high impedance sensors Description Product status link LMC7101 Related products See TSX631 for reduced power consumption The LMC7101 operational amplifier benefits from STMicroelectronics 16 V CMOS technology to offer state-of-the-art accuracy and performance in the smallest industrial packages. The LMC7101 offers an outstanding speed/power consumption ratio, 900 kHz gain bandwidth product while consuming only 250 µA at 16 V. Such features make the LMC7101 ideal for sensor interfaces and industrial signal conditioning. The wide temperature range and high ESD tolerance ease use in harsh automotive applications. (45 μA, 200 kHz) See TSX921 for higher gain bandwidth products (10 MHz) DS13567 - Rev 2 - November 2022 For further information contact your local STMicroelectronics sales office. www.st.com LMC7101 Pinout information 1 Pinout information Figure 1. Pin connections (top view) DS13567 - Rev 2 page 2/19 LMC7101 Absolute maximum ratings and operating conditions 2 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings (AMR) Symbol Parameter VCC Supply voltage (1) Vid Differential input voltage (2) Vin Input voltage Iin Input current (4) Tstg Value 18 ±VCC V (VCC-) - 0.2 to (VCC+) + 0.2 (3) 10 Storage temperature mA -65 to 150 Tj Maximum junction temperature Rthja Thermal resistance junction-toambient (5)(6) 150 SOT23-5 °C 250 °C/W 4 kV 200 V CDM: charged device model (9) 1.5 kV Latch-up immunity 200 mA HBM: human body model (7) ESD Unit MM: machine model (8) 1. All voltage values, except the differential voltage are with respect to the network ground terminal. 2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. 3. Vcc - Vin must not exceed 18 V, Vin must not exceed 18 V 4. Input current must be limited by a resistor in series with the inputs. 5. Rth are typical values. 6. Short-circuits can cause excessive heating and destructive dissipation. 7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 8. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating. 9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to ground. Table 2. Operating conditions DS13567 - Rev 2 Symbol Parameter Value VCC Supply voltage 3 to 16 Vicm Common-mode input voltage range (VCC-) - 0.1 to (VCC+) + 0.1 Toper Operating free-air temperature range -40 to 125 Unit V °C page 3/19 LMC7101 Electrical characteristics 3 Electrical characteristics Table 3. Electrical characteristics at VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance Vio Offset voltage ΔVio/ΔT Input offset voltage drift Iib Input bias current, Vout = VCC/2 T = 25 °C 3 -40 °C < T < 125 °C 5 -40 °C < T < 125 °C 1 T = 25 °C 1 100 (1) -40 °C < T < 125 °C 1 200 (1) T = 25 °C 1 100 (1) -40 °C < T < 125 °C 1 200 (1) µV/°C Iio Input offset current, Vout = VCC/2 CMR1 Common mode rejection ratio, CMR = 20 log (ΔVic/ΔVio), Vic = -0.1 V to VCC - 1.5 V, Vout = VCC/2, RL > 1 MΩ CMR2 Common mode rejection ratio, CMR = 20 log (ΔVic/ΔVio), Vic = -0.1 V to VCC + 0.1 V, Vout = VCC/2, RL > 1 MΩ Avd Large signal voltage gain, Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ High-level output voltage, T = 25 °C 70 VOH = VCC - Vout -40 °C < T < 125 °C 100 T = 25 °C 70 -40 °C < T < 125 °C 100 VOH VOL Low-level output voltage Isink, Vout = VCC Iout Isource, Vout = 0 V ICC Supply current, per channel, Vout = VCC/2, RL > 1 MΩ T = 25 °C 63 -40 °C < T < 125 °C 59 T = 25 °C 47 -40 °C < T < 125 °C 45 T = 25 °C 85 -40 °C < T < 125 °C 83 T = 25 °C 4.3 -40 °C < T < 125 °C 2.5 T = 25 °C 3.3 -40 °C < T < 125 °C 2.5 T = 25 °C mV pA 80 66 dB mV 5.3 mA 4.3 220 -40 °C < T < 125 °C 300 350 μA AC performance GBP Gain bandwidth product Fu Unity gain frequency ɸm Phase margin Gm Gain margin SR Slew rate en Equivalent input noise voltage density ∫en Low-frequency peak-to-peak input noise DS13567 - Rev 2 600 RL = 10 kΩ, CL = 100 pF RL = 10 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5 V 800 690 kHz 55 Degrees 9 dB 1 V/μs f = 1 kHz 55 f = 10 kHz 29 Bandwidth, f = 0.1 to 10 Hz 16 nV/√Hz µVpp page 4/19 LMC7101 Electrical characteristics Symbol Parameter Conditions Min. Typ. Max. Unit Follower configuration, THD+N Total harmonic distortion + noise fin = 1 kHz, RL = 100 kΩ, Vicm = (VCC -1.5 V)/2, 0.004 % BW = 22 kHz, Vout = 1 Vpp 1. Guaranteed by design Table 4. Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance T = 25 °C 3 -40 °C < T < 125 °C 5 Vio Offset voltage ΔVio/ΔT Input offset voltage drift -40 °C < T < 125 °C 1 ΔVio Long-term input offset voltage drift T = 25 °C (1) 5 Iib Input bias current, Vout = VCC/2 mV µV/°C nV/√month (2) T = 25 °C 1 100 -40 °C < T < 125 °C 1 200 (2) T = 25 °C 1 100 (2) -40 °C < T < 125 °C 1 200 (2) Iio Input offset current, Vout = VCC/2 CMR1 Common mode rejection ratio, CMR = 20 log (ΔVic/ΔVio), Vic = -0.1 V to VCC - 1.5 V, Vout = VCC/2, RL > 1 MΩ CMR2 Common mode rejection ratio, CMR = 20 log (ΔVic/ΔVio), Vic = -0.1 V to VCC + 0.1 V, Vout = VCC/2, RL > 1 MΩ Avd Large signal voltage gain, Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ High-level output voltage, RL = 10 kΩ, T = 25 °C 70 VOH = VCC - Vout RL = 10 kΩ, -40 °C < T < 125 °C 100 RL = 10 kΩ, T = 25 °C 70 RL = 10 kΩ, -40 °C < T < 125 °C 100 VOH VOL Low-level output voltage Isink Iout Isource ICC Supply current, per channel, Vout = VCC/2, RL > 1 MΩ T = 25 °C 66 -40 °C < T < 125 °C 63 T = 25 °C 50 -40 °C < T < 125 °C 47 T = 25 °C 85 -40 °C < T < 125 °C 83 Vout = VCC, T = 25 °C 11 Vout = VCC, -40 °C < T < 125 °C 8 Vout = 0 V, T = 25 °C 9 Vout = 0 V, -40 °C < T < 125 °C 7 T = 25 °C pA 84 69 dB mV 14 mA 12 235 -40 °C < T < 125 °C 350 400 μA AC performance GBP Gain bandwidth product Fu Unity gain frequency ɸm Phase margin Gm Gain margin DS13567 - Rev 2 700 RL = 10 kΩ, CL = 100 pF 850 730 kHz 55 Degrees 9 dB page 5/19 LMC7101 Electrical characteristics Symbol Parameter SR Slew rate en Equivalent input noise voltage density ∫en Low-frequency peak-to-peak input noise Conditions Min. RL = 10 kΩ, CL = 100 pF, Typ. Max. 1.1 Vout = 0.5 V to VCC - 0.5 V Unit V/μs f = 1 kHz 55 f = 10 kHz 29 Bandwidth, f = 0.1 to 10 Hz 15 µVpp 0.002 % nV/√Hz Follower configuration, THD+N Total harmonic distortion + noise fin = 1 kHz, RL = 100 kΩ, Vicm = (VCC -1.5 V) / 2, BW = 22 kHz, Vout = 2 Vpp 1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. 2. Guaranteed by design Table 5. Electrical characteristics at VCC+ = 16 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit DC performance T = 25 °C 3 -40 °C < T < 125 °C 5 Vio Offset voltage ΔVio/ΔT Input offset voltage drift -40 °C < T < 125 °C 1 µV/°C ΔVio Long-term input offset voltage drift T = 25 °C (1) 1.6 nV/√month Iib Input bias current, Vout = VCC/2 T = 25 °C 1 100 (2) -40 °C < T < 125 °C 1 200 (2) T = 25 °C 1 100 (2) -40 °C < T < 125 °C 1 200 (2) Iio Input offset current, Vout = VCC/2 CMR1 Common mode rejection ratio, CMR = 20 log (ΔVic/ΔVio), Vic = -0.1 V to VCC - 1.5 V, Vout = VCC/2, RL > 1 MΩ CMR2 Common mode rejection ratio, CMR = 20 log (ΔVic/ΔVio), Vic = -0.1 V to VCC + 0.1 V, Vout = VCC/2, RL > 1 MΩ SVR Common mode rejection ratio, 20 log (ΔVCC/ΔVio), VCC = 3 V to 16 V, Vout = Vicm = VCC/2 Avd VOH VOL DS13567 - Rev 2 T = 25 °C 76 -40 °C < T < 125 °C 72 T = 25 °C 60 -40 °C < T < 125 °C 56 T = 25 °C 76 -40 °C < T < 125 °C 72 pA 95 78 dB 90 Large signal voltage gain, Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ T = 25 °C 85 -40 °C < T < 125 °C 83 High-level output voltage, RL = 10 kΩ, T = 25 °C 70 VOH = VCC - Vout RL = 10 kΩ, -40 °C < T < 125 °C 100 RL = 10 kΩ, T = 25 °C 70 RL = 10 kΩ, -40 °C < T < 125 °C 100 Low-level output voltage mV mV page 6/19 LMC7101 Electrical characteristics Symbol Parameter Isink Iout Isource ICC Conditions Min. Typ. Vout = VCC, T = 25 °C 40 92 Vout = VCC, -40 °C < T < 125 °C 35 Vout = 0 V, T = 25 °C 30 Vout = 0 V, -40 °C < T < 125 °C 25 Supply current, per channel, Vout = VCC/2, T = 25 °C RL > 1 MΩ -40 °C < T < 125 °C Max. mA 90 250 Unit 360 400 μA AC performance GBP Gain bandwidth product Fu Unity gain frequency ɸm Phase margin Gm Gain margin SR Slew rate en Equivalent input noise voltage density ∫en 750 900 750 RL = 10 kΩ, CL = 100 pF RL = 10 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5 V kHz 55 Degrees 9 dB 1.1 V/μs f = 1 kHz 48 f = 10 kHz 27 Low-frequency peak-to-peak input noise Bandwidth, f = 0.1 to 10 Hz 15 µVpp Total harmonic distortion + noise fin = 1 kHz, RL = 100 kΩ, Vicm = (VCC -1.5 V)/2, 0.0005 % nV/√Hz Follower configuration, THD+N BW = 22 kHz, Vout = 5 Vpp 1. Typical value is based on the Vio drift observed after 1000h at 125 °C extrapolated to 25 °C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. 2. Guaranteed by design DS13567 - Rev 2 page 7/19 LMC7101 Electrical characteristic curves 4 Electrical characteristic curves Figure 2. Supply current vs. supply voltage at Vicm = VCC/2 Figure 3. Output current vs. output voltage at VCC = 3.3 V Figure 4. Output current vs. output voltage at VCC = 5 V Figure 5. Output current vs. output voltage at VCC = 16 V Figure 6. Bode diagram at VCC = 3.3 V Figure 7. Bode diagram at VCC = 5 V DS13567 - Rev 2 page 8/19 LMC7101 Electrical characteristic curves Figure 8. Bode diagram at VCC = 16 V Figure 9. Phase margin vs. capacitive load at VCC = 12 V Figure 10. GBP vs. input common-mode voltage at VCC = 12 V Figure 11. Avd vs. input common-mode voltage at VCC = 12 V Figure 12. Slew rate vs. supply voltage Figure 13. Noise vs. frequency at VCC = 3.3 V DS13567 - Rev 2 page 9/19 LMC7101 Electrical characteristic curves Figure 14. Noise vs. frequency at VCC = 5 V Figure 15. Noise vs. frequency at VCC = 16 V Figure 16. Distortion and noise vs. output voltage amplitude Figure 17. Distortion and noise vs. amplitude at Vicm = VCC/2 and VCC = 12 V Figure 18. Distortion and noise vs. frequency DS13567 - Rev 2 page 10/19 LMC7101 Application information 5 Application information 5.1 Operating voltages The LMC7101 amplifier can operate from 3 V to 16 V. Its parameters are fully specified at 3.3 V, 5 V, and 16 V power supplies. However, the parameters are very stable in the full VCC range. Additionally, the main specifications are guaranteed in extended temperature ranges from -40 to 125 ° C. 5.2 Rail-to-rail input The LMC7101 device is built with two complementary PMOS and NMOS input differential pairs. The devices have a rail-to-rail input, and the input common mode range is extended from (VCC-) - 0.1 V to (VCC+) + 0.1 V. However, the performance of this device is clearly optimized for the PMOS differential pairs (which means from (VCC-) - 0.1 V to (VCC+) - 1.5 V). Beyond (VCC+) - 1.5 V, the operational amplifiers are still functional but with degraded performance, as can be observed in the electrical characteristics section of this datasheet (mainly Vio and GBP). These performances are suitable for a number of applications that need to be rail-to-rail. The devices are designed to prevent phase reversal. 5.3 Long term input offset voltage drift To evaluate product reliability, two types of stress acceleration are used: • Voltage acceleration, by changing the applied voltage • Temperature acceleration, by changing the die temperature (below the maximum junction temperature allowed by the technology) with the ambient temperature. The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2. Equation 2 A FV = e β . ( VS – VU ) Where: AFV is the voltage acceleration factor β is the voltage acceleration constant in 1/V, constant technology parameter (β = 1) VS is the stress voltage used for the accelerated test VU is the voltage used for the application The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3. Equation 3 A FT = e E 1 1 -----a- . – k TU TS Where: AFT is the temperature acceleration factor Ea is the activation energy of the technology based on the failure rate k is the Boltzmann constant (8.6173 x 10-5 eV.K-1) TU is the temperature of the die when VU is used (K) TS is the temperature of the die under temperature stress (K) The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and the temperature acceleration factor (Equation 4). Equation 4 DS13567 - Rev 2 page 11/19 LMC7101 PCB layouts A F = A FT × A FV AF is calculated using the temperature and voltage defined in the mission profile of the product. The AF value can then be used in Equation 5 to calculate the number of months of use equivalent to 1000 hours of reliable stress duration. Equation 5 Months = A F × 1000 h × 12 months / ( 24 h × 365.25 days ) To evaluate the op amp reliability, a follower stress condition is used where VCC is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules). The Vio drift (in µV) of the product after 1000 h of stress is tracked with parameters at different measurement conditions (see Equation 6). Equation 6 V CC = maxV op with V icm = V CC / 2 The long term drift parameter (ΔVio), estimating the reliability performance of the product, is obtained using the ratio of the Vio (input offset voltage value) drift over the square root of the calculated number of months (Equation 7). Equation 7 ∆V io = V io dr ift ( month s ) Where Vio drift is the measured drift value in the specified test conditions after 1000 h stress duration. 5.4 PCB layouts For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins. 5.5 Macromodel Accurate macromodels of the LMC7101 device are available on the STMicroelectronics’ website at: www.st.com. These models are a trade-off between accuracy and complexity (that is, time simulation) of the LMC7101 operational amplifier. They emulate the nominal performance of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements. DS13567 - Rev 2 page 12/19 LMC7101 Package information 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 6.1 SOT23-5 package information Figure 19. SOT23-5 package outline Table 6. SOT23-5 mechanical data Dimensions Millimeters Ref. A Min. Typ. Max. Min. Typ. Max. 0.90 1.20 1.45 0.035 0.047 0.057 A1 DS13567 - Rev 2 Inches 0.15 0.006 A2 0.90 1.05 1.30 0.035 0.041 0.051 B 0.35 0.40 0.50 0.014 0.016 0.020 C 0.09 0.15 0.20 0.004 0.006 0.008 D 2.80 2.90 3.00 0.110 0.114 0.118 D1 1.90 0.075 e 0.95 0.037 E 2.60 2.80 3.00 0.102 0.110 0.118 F 1.50 1.60 1.75 0.059 0.063 0.069 L 0.10 0.35 0.60 0.004 0.014 0.024 K 0 degrees 10 degrees 0 degrees 10 degrees page 13/19 LMC7101 Ordering information 7 Ordering information Table 7. Order codes DS13567 - Rev 2 Order code Temperature range Package Packing Marking LMC7101ILT -40 to 125 °C SΟΤ23-5 Tape and reel K228 page 14/19 LMC7101 Revision history Table 8. Document revision history Date Revision 09-Nov-2020 1 Initial release. 16-Nov-2022 2 Updated marking in Table 7. Order codes. DS13567 - Rev 2 Changes page 15/19 LMC7101 Contents Contents 1 Pinout information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 6 5.1 Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.2 Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.3 Long term input offset voltage drift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5.4 PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.5 Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 6.1 7 SOT23-5 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 DS13567 - Rev 2 page 16/19 LMC7101 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Absolute maximum ratings (AMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics at VCC+ = 3.3 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics at VCC+ = 5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics at VCC+ = 16 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 SOT23-5 mechanical data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DS13567 - Rev 2 page 17/19 LMC7101 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. DS13567 - Rev 2 Pin connections (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply current vs. supply voltage at Vicm = VCC/2 . . . . . . . . . . . . . Output current vs. output voltage at VCC = 3.3 V . . . . . . . . . . . . . . Output current vs. output voltage at VCC = 5 V . . . . . . . . . . . . . . . Output current vs. output voltage at VCC = 16 V . . . . . . . . . . . . . . Bode diagram at VCC = 3.3 V . . . . . . . . . . . . . . . . . . . . . . . . . . . Bode diagram at VCC = 5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bode diagram at VCC = 16 V . . . . . . . . . . . . . . . . . . . . . . . . . . . Phase margin vs. capacitive load at VCC = 12 V . . . . . . . . . . . . . . GBP vs. input common-mode voltage at VCC = 12 V . . . . . . . . . . . Avd vs. input common-mode voltage at VCC = 12 V . . . . . . . . . . . . Slew rate vs. supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noise vs. frequency at VCC = 3.3 V . . . . . . . . . . . . . . . . . . . . . . . Noise vs. frequency at VCC = 5 V . . . . . . . . . . . . . . . . . . . . . . . . Noise vs. frequency at VCC = 16 V . . . . . . . . . . . . . . . . . . . . . . . Distortion and noise vs. output voltage amplitude . . . . . . . . . . . . . Distortion and noise vs. amplitude at Vicm = VCC/2 and VCC = 12 V . Distortion and noise vs. frequency. . . . . . . . . . . . . . . . . . . . . . . . SOT23-5 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 8 . 8 . 8 . 8 . 8 . 8 . 9 . 9 . 9 . 9 . 9 . 9 10 10 10 10 10 13 page 18/19 LMC7101 IMPORTANT NOTICE – READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2022 STMicroelectronics – All rights reserved DS13567 - Rev 2 page 19/19
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