ST2329A
2-bit dual supply level translator
without direction control pin
Features
■
18 Mbps (max) data rate when driven by a
totem pole driver
■
6.8 Mbps (max) data rate when driven by an
open drain pole driver
■
Bidirectional level translation without
direction control pin
■
Wide VL voltage range of 1.65 to 3.6 V
■
Wide VCC voltage range of 1.80 to 5.5 V
■
Power down mode feature – when either
supply is off, all I/Os are in high impedance
■
Low quiescent current (max 4 µA)
■
Able to be driven by totem pole and open drain
drivers
■
5.5 V tolerant enable pin
■
ESD performance on all pins: ±2 kV HBM
■
Small package and footprint:
QFN10L (1.8 x 1.4 mm) package
Applications
■
Low voltage system level translation
■
Mobile phones and other mobile devices
■
I2C level translation
■
UART level translation
QFN10
(1.8 x 1.4 mm)
Description
The ST2329A is a 2-bit dual supply level
translator which provides the level shifting
capability to allow data transfer in a multi-voltage
system. Externally applied voltages, VCC and VL,
set the logic levels on either side of the device. It
utilizes transmission gate-based design that
allows bidirectional level translation without a
control pin.
The ST2329A accepts a VL from 1.65 to 3.6 V
and VCC from 1.80 to 5.5 V, making it ideal for
data transfer between low-voltage ASICs/PLD
and higher voltage systems. This device has a tristate output mode which can be used to disable
all I/Os.
The ST2329A supports power down mode when
VCC is grounded/floating and the device is
disabled via the OE pin.
Table 1.
June 2009
Device summary
Order code
Package
Packaging
ST2329AQTR
QFN10 (1.8 x 1.4 mm)
Tape and reel (3000 parts per reel)
Doc ID 14907 Rev 2
1/21
www.st.com
21
Contents
ST2329A
Contents
1
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Device block diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4
3.1
Driver requirement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2
Load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3
Power off feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.4
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1
5
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.1
DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.2
AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2.1
Device driven by open drain driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2.2
Device driven by totem pole driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
Doc ID 14907 Rev 2
ST2329A
Pin settings
1
Pin settings
1.1
Pin connection
Figure 1.
Pin connection (top through view)
V
L
V CC
10
I/O
VL1
I/O VL2
OE
9
1
8
I/O
2
7
I/O VCC2
3
4
5
NC
NC
6
VCC1
GND
CS00011
1.2
Pin description
Table 2.
Pin description
Pin number
Symbol
Name and function
1
I/OVL1
Data input/output
2
I/OVL2
Data input/output
3
OE
Output enable
4
NC
No connection
5
NC
No connection
6
GND
Ground
7
I/OVCC2
Data input/output
8
I/OVCC1
Data input/output
9
VCC
Supply voltage
10
VL
Supply voltage
Doc ID 14907 Rev 2
3/21
Device block diagrams
2
ST2329A
Device block diagrams
Figure 2.
ST2329A block diagram
ST2329A
VL
EN
OE
VCC
VL
I/O VL
I/O VCC
= one-shot circuit
* ST2329A has 2 channels. For simplicity, the above diagram shows only 1 channel.
* When OE is Low, all I/Os are in High-Impedance mode.
AM00707V2
Figure 3.
Application block diagram
VL
V CC
0.1 μF
0.1 μF 1 μF
VL
system
controller
VL VL
VL
V CC
I/O VL1
I/O VCC1
I/O VL2
I/O VCC2
V CCV CC
VCC
system
controller
OE
AM00708V1
4/21
Doc ID 14907 Rev 2
ST2329A
Supplementary notes
3
Supplementary notes
3.1
Driver requirement
The ST2329A may be driven by an open drain or totem pole driver and the nature of the
device’s output is “open drain”. It must not be used to drive a pull-down resistor since the
impedance of the output at HIGH state depends on the pull-up resistor placed at the I/Os.
As the device has pull-up resistors on both the I/OVCC and I/OVL ports, the user needs to
ensure that the driver is able to sink the required amount of current. For example, if the
settings are VCC = 5.5 V, VL = 4.3 V and the pull-up resistor is 10 kΩ, then the driver must be
able to sink at least (5.5 V/10 kΩ) + (4.3 V /10 kΩ) = 1 mA and still meet the VIL
requirements of the ST2329A.
3.2
Load driving capability
To support the open drain system, the one-shot transistor is turned on only during high
transition at the output side. When it drives a high state, after the one-shot transistor is
turned off, only the pull-up resistor is able to maintain the state. In this case, the resistive
load is not recommended.
3.3
Power off feature
In some applications where it might be required to turn off one of the power supplies
powering up the level translator, the user may turn off the VCC only when the OE pin is low
(device is disabled). There will be no current consumption in VL due to floating gates or
other causes, and the I/Os are in a high-impedance state in this mode.
3.4
Truth table
Table 3.
Truth table
Enable
Bidirectional Input/Output
OE
H
I/OVCC
(1)
H
H(1)
(2)
L
L
Z
(3)
I/OVL
H(1)
L
Z(3)
1. High level VL power supply referred
2. High level VCC power supply referred
3. Z = high impedance
Doc ID 14907 Rev 2
5/21
Maximum rating
4
ST2329A
Maximum rating
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only, and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 4.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VL
Supply voltage
-0.3 to 4.6
V
VCC
Supply voltage
-0.3 to 6.5
V
VOE
DC control input voltage
-0.3 to 6.5
V
-0.3 to VL + 0.3
V
-0.3 to VCC + 0.3
V
DC input diode current
-20
mA
II/OVL
DC output current
±25
mA
II/OVCC
DC output current
±258
mA
40
mA
VI/OVL
VI/OVCC
IIK
DC I/OVL input voltage (OE = GND or VL)
DC I/OVCC input voltage (OE = GND or VL)
ISCTOUT Short circuit duration, continuous
PD
Power dissipation(1)
500
mW
TSTG
Storage temperature
-65 to 150
oC
Lead temperature (10 seconds)
300
oC
Electrostatic discharge protection (HBM)
±2
kV
TL
ESD
1. 500 mW: 65 oC derated to 300 mW by 10W/oC: 65 oC to 85 oC
4.1
Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
VL
VCC
(1)
VOE
VI/OVL
VI/OVCC
Parameter
Min
Typ
Max
Unit
Supply voltage
1.65
−
3.6
V
Supply voltage
1.8
−
5.5
V
Input voltage
(OE output enable pin, VL power supply referred)
0
−
3.6
V
I/OVL voltage
0
−
VL
V
I/OVCC voltage
0
−
VCC
V
Top
Operating temperature
-40
−
85
oC
dt/dV
Input rise and fall time
0
−
1
ns/V
1. VCC must be greater than VL.
6/21
Doc ID 14907 Rev 2
ST2329A
Electrical characteristics
5
Electrical characteristics
5.1
DC characteristics
Over recommended operating conditions unless otherwise noted. All typical values are at
TA = 25 oC.
Table 6.
DC characteristics
Value
Symbol
VIHL
VILL
VIHC
VILC
VIH-OE
Parameter
High level input
voltage (I/OVL)
Low level input
voltage (I/OVL)
High level input
voltage
(I/OVCC)
Low level input
voltage
(I/OVCC)
High level input
voltage (OE)
VL
VCC
TA = 25 oC
Test conditions
-40 to 85 oC
Min
Typ
Max
Min
Max
1.65
1.4
−
−
1.4
−
2.0
1.6
−
−
1.6
−
2.0
−
−
2.0
−
3.0
2.4
−
−
2.4
−
3.6
2.8
−
−
2.8
−
1.65
−
−
0.3
−
0.3
2.0
−
−
0.4
−
0.4
−
−
0.5
−
0.5
3.0
−
−
0.6
−
0.6
3.6
−
−
0.8
−
0.8
1.8
1.6
−
−
1.6
−
2.5
2.3
−
−
2.3
−
2.7
−
−
2.7
−
3.3
−
−
3.3
−
4.3
3.5
−
−
3.5
−
5.5
4.2
−
−
4.2
−
−
−
−
0.3
−
2.5
2.5
1.65 to
VCC
1.65 2.5
VL to 5.5
VL to 5.5
3.0
−
−
−
3.6
−
3 - 5.5
Unit
V
V
V
V
2.7 3.6
−
−
−
0.5
−
1.65
1.0
−
−
1.0
−
2.0
1.2
−
−
1.2
−
1.4
−
−
1.4
−
3.0
1.6
−
−
1.6
−
3.6
2.0
−
−
2.0
−
2.5
−
3.6 - 5.5
VL to 5.5
−
Doc ID 14907 Rev 2
V
7/21
Electrical characteristics
Table 6.
ST2329A
DC characteristics (continued)
Value
Symbol
VIL-OE
Parameter
Low level input
voltage (OE)
VL
VCC
TA = 25 oC
Test conditions
-40 to 85 oC
Min
Typ
Max
Min
Max
1.65
−
−
0.33
−
0.33
2.0
−
−
0.40
−
0.40
−
−
0.50
−
0.50
3.0
−
−
0.60
−
0.60
3.6
−
−
0.75
−
0.75
2.5
VL to 5.5
Unit
V
VOLL
Low level
output voltage
(I/OVL)
IO = 1.0 mA
1.65 to
VL to 5.5
3.6
I/OVCC ≤ 0.15 V
−
−
0.40
−
0.40
V
VOLC
Low level
output voltage
(I/OVCC)
IO = 1.0 mA
1.65 to
VL to 5.5
3.6
I/OVL ≤ 0.15 V
−
−
0.40
−
0.40
V
IOE
Control input
leakage current
(OE)
V = GND or
1.65 to
VL to 5.5 OE
VL
3.6
−
−
±0.1
−
±0.1
µA
IIO_LKG
High
impedance
leakage current
(I/OVL, I/OVCC)
1.65 to
VL to 5.5 OE = GND
3.6
−
−
±0.1
−
±0.1
µA
IQVCC
Quiescent
supply current
VCC
Only pull-up
1.65 to
VL to 5.5 resistor
3.6
connected to I/O
−
3
3.5
−
4
µA
IQVL
Quiescent
supply current
VL
only pull-up
1.65 to
VL to 5.5 resistor
3.6
connected to I/O
−
0.01
0.1
−
1
µA
IZ-VCC
High
impedance
quiescent
supply current
VCC
OE = GND;
1.65 to
only pull-up
VL to 5.5
3.6
resistor
connected to I/O
−
3
3.5
−
4
µA
IZ-VL
High
impedance
quiescent
supply current
VL
OE = GND;
1.65 to
only pull-up
VL to 5.5
3.6
resistor
connected to I/O
−
0.01
0.1
−
1
µA
8/21
Doc ID 14907 Rev 2
ST2329A
Electrical characteristics
5.2
AC characteristics
5.2.1
Device driven by open drain driver
Load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns over temperature range -40 °C to 85 °C.
Table 7.
AC characteristics - test conditions: VL = 1.65 - 1.8 V
VCC = 1.8 − 2.5 V
Symbol
VCC = 2.7 − 3.6 V
Parameter
VCC = 4.3 −
5.5 V
Min
Max
Min
Max
Min
Max
Unit
tRVCC
Rise time I/OVCC
−
80.0
−
60.0
−
45.0
ns
tFVCC
Fall time I/OVCC
−
23.2
−
33.9
−
53.3
ns
tRVL
Rise time I/OVL
−
60.0
−
45.0
−
35.0
ns
tFVL
Fall time I/OVL
−
16.4
−
17.6
−
16.9
ns
tPLH
−
3.4
−
2.0
−
2.0
ns
tPHL
−
13.9
−
19.1
−
30.2
ns
tPLH
−
2.0
−
2.0
−
2.6
ns
tPHL
−
8.6
−
9.0
−
9.5
ns
En
−
10
−
10
−
10
ns
Dis
−
40
−
40
−
40
ns
−
1.8
−
2.2
−
3.4
MHz
Propagation delay time
tI/OVL-VCC I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
Propagation delay time
tI/OVCC-VL I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-LH
tPZL tPZH
tPLZ tPHZ
DR
Output enable and
disable time
Data
rate(1)
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%.
Table 8.
AC characteristics - test conditions: VL = 2.5 −2.7 V
VCC = 2.7
Symbol
− 3.6 V
VCC = 4.3 − 5.5 V
Parameter
Unit
Min
Max
Min
Max
tRVCC
Rise time I/OVCC
−
70.0
−
50.0
ns
tFVCC
Fall time I/OVCC
−
14.8
−
19.1
ns
tRVL
Rise time I/OVL
−
50.0
−
35.0
ns
tFVL
Fall time I/OVL
−
9.8
−
10.0
ns
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH
−
2.0
−
2.0
ns
tI/OVL-VCC
tPHL
−
8.2
−
11.6
ns
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-LH
tPLH
−
2.0
−
2.0
ns
tI/OVCC-VL
tPHL
−
5.3
−
5.9
ns
Doc ID 14907 Rev 2
9/21
Electrical characteristics
ST2329A
AC characteristics - test conditions: VL = 2.5 −2.7 V (continued)
Table 8.
VCC = 2.7
Symbol
− 3.6 V
VCC = 4.3 − 5.5 V
Parameter
tPZL tPZH
tPLZ tPHZ
Output enable and
disable time
Unit
Min
Max
Min
Max
En
−
6
−
6
ns
Dis
−
40
−
40
ns
−
2.2
−
3.0
MHz
(1)
Data rate
DR
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%.
AC characteristics - test conditions: VL = 2.7 − 3.6 V
Table 9.
VCC = 4.3 − 5.5 V
Symbol
Parameter
Unit
Min
Max
tRVCC
Rise time I/OVCC
−
55.0
ns
tFVCC
Fall time I/OVCC
−
17.2
ns
tRVL
Rise time I/OVL
−
40.0
ns
tFVL
Fall time I/OVL
−
9.7
ns
tPLH
−
2.0
ns
tPHL
−
10.6
ns
tPLH
−
2.0
ns
tPHL
−
4.8
ns
En
−
6
ns
Dis
−
40
ns
−
−
3.0
MHz
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPZL tPZH
tPLZ tPHZ
Output enable and disable time
DR
Data rate(1)
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%.
5.2.2
Device driven by totem pole driver
Load CL = 15 pF; Rup = 10 kΩ; driver tr=tf ≤ 2 ns over temperature range -40 °C to 85 °C
Table 10.
AC characteristics - test conditions: VL = 1.65 − 1.8 V
VCCB = 1.8 – 2.5 V VCCB = 2.7 – 3.6 V VCCB = 4.3 – 5.5 V
Symbol
Parameter
Unit
Min
Max
Min
Max
Min
Max
tRVCC
Rise time I/OVCC
−
7.2
−
4.6
−
1.4
ns
tFVCC
Fall time I/OVCC
−
23.2
−
33.9
−
53.3
ns
tRVL
Rise time I/OVL
−
5.9
−
5.7
−
5.5
ns
tFVL
Fall time I/OVL
−
16.4
−
17.6
−
16.9
ns
10/21
Doc ID 14907 Rev 2
ST2329A
Table 10.
tI/OVLVCC
tI/OVCCVL
Electrical characteristics
AC characteristics - test conditions: VL = 1.65 − 1.8 V
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tPLH
−
5.5
−
4.1
−
3.6
ns
tPHL
−
13.9
−
19.1
−
30.2
ns
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPLH
−
4.5
−
3.9
−
3.6
ns
tPHL
−
8.6
−
9.0
−
9.5
ns
En
−
10
−
10
−
10
ns
Dis
−
40
−
40
−
40
ns
−
6.4
−
4.5
−
3.0
MHz
tPZL tPZH Output enable and
tPLZ tPHZ disable time
DR
Data rate(1)
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%.
Doc ID 14907 Rev 2
11/21
Electrical characteristics
Table 11.
ST2329A
AC characteristics - test conditions: VL = 2.5 − 2.7 V
VCC = 2.7
Symbol
− 3.6 V
VCC = 4.3 − 5.5 V
Parameter
Unit
Min
Max
Min
Max
tRVCC
Rise time I/OVCC
−
3.8
−
2.8
ns
tFVCC
Fall time I/OVCC
−
14.8
−
19.1
ns
tRVL
Rise time I/OVL
−
3.3
−
3.2
ns
tFVL
Fall time I/OVL
−
9.8
−
10.0
ns
tPLH
−
3.2
−
2.8
tPHL
−
8.2
−
11.6
tPLH
−
2.6
−
2.0
tPHL
−−
5.3
−−
5.9
En
−
6
−
6
ns
Dis
−
40
−
40
ns
−
9
−
6.8
MHz
tI/OVL-VCC
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPZL tPZH
tPLZ tPHZ
Output enable and
disable time
Data
DR
rate(1)
ns
ns
ns
ns
ns
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%.
Table 12.
AC characteristics - test conditions: VL = 2.7 − 3.6 V
VCC = 4.3 − 5.5 V
Symbol
Parameter
Unit
Min
Max
tRVCC
Rise time I/OVCC
−
2.9
ns
tFVCC
Fall time I/OVCC
−
17.2
ns
tRVL
Rise time I/OVL
−
3.0
ns
tFVL
Fall time I/OVL
−
9.7
ns
tPLH
−
2.7
ns
tPHL
−
10.6
ns
tPLH
−−
1.9
tPHL
−
4.8
−
6
ns
−
40
ns
−
7.2
MHz
tI/OVL-VCC
Propagation delay time
I/OVL-LH to I/OVCC-LH
I/OVL-HL to I/OVCC-HL
tI/OVCC-VL
Propagation delay time
I/OVCC-LH to I/OVL-LH
I/OVCC-HL to I/OVL-HL
tPZL tPZH
tPLZ tPHZ
DR
Output enable and disable En
time
Dis
Data
rate(1)
ns
ns
ns
ns
1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O
signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation not less than 30%.
12/21
Doc ID 14907 Rev 2
ST2329A
Electrical characteristics
Figure 4.
Test circuit
VL
VL
VCC
Rup
Pulse
generator
VCC
Rup
VL
VCC
OPEN
GND
D.U.T
CL
CS14021
Table 13.
Test circuit switches
Switch
Test
tPLH, tPHL
Driving I/OVL
Driving I/OVCC
Open drain driving
Open
Open
Open
Doc ID 14907 Rev 2
13/21
Waveforms
6
ST2329A
Waveforms
Table 14.
Waveform symbol value
Driving I/OVCC
Driving I/OVL
Symbol
1.8 V ≤ VL ≤ VCC ≤
2.5 V
3.3 V ≤ VL ≤ VCC ≤
5.0 V
1.8 V ≤ VL ≤ VCC ≤
2.5 V
3.3V ≤ VL ≤ VCC ≤
5.0 V
VIH
VL
VL
VCC
VCC
VIM
50% VL
50% VL
50% VCC
50% VCC
VOM
50% VCC
50% VCC
50% VL
50% VL
VX
VOL +0.15V
VOL +0.3V
VOL +0.15V
VOL +0.3V
VY
VOH -0.15V
VOH -0.3V
VOH -0.15V
VOH -0.3V
Figure 5.
14/21
Waveform - propagation delay (f = 1 MHz; 50% duty cycle)
Doc ID 14907 Rev 2
ST2329A
Waveforms
Figure 6.
Waveform - output enable and disable time (f = 1 MHz; 50% duty cycle)
Doc ID 14907 Rev 2
15/21
Package mechanical data
7
ST2329A
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 7.
Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
7936408 Rev.D
16/21
Doc ID 14907 Rev 2
ST2329A
Package mechanical data
Table 15.
Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Millimeters
Symbol
Figure 8.
Typ
Min
Max
A
0.50
0.45
0.55
A1
0.02
0
0.05
A3
0.127
b
0.20
0.15
0.25
D
1.80
1.75
1.85
E
1.40
1.35
1.45
e
0.40
L
0.40
0.35
0.45
Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm
pitch
Doc ID 14907 Rev 2
17/21
Package mechanical data
Figure 9.
ST2329A
Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Figure 10. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Back view
18/21
Doc ID 14907 Rev 2
ST2329A
Package mechanical data
Figure 11. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch
Doc ID 14907 Rev 2
19/21
Revision history
8
ST2329A
Revision history
Table 16.
Document revision history
Date
Revision
16-Jul-2008
1
Initial release.
2
Document status promoted from Preliminary data to datasheet.
Updated: Features section and Chapter 5: Electrical
characteristics.
Modified: Section 7.
22-Jun-2009
20/21
Changes
Doc ID 14907 Rev 2
ST2329A
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