ST2329IQTR

ST2329I 2-bit dual-supply level translator with auto-direction feature and integrated pull-up Target specification Features ■ 18 Mbps (max.) data rate when driven by a totem pole driver ■ 6.8 Mbps (max.) data rate when driven by an open drain pole driver ■ Bidirectional level translation, without direction pin ■ Wide VL voltage range of 1.65 V to 3.6 V ■ Wide VCC voltage range of 1.80 V to 5.5 V ■ Integrated 10 kΩ pull-up on both VCC and VL sides ■ Power-down mode feature; when either supply is off, all I/Os are in high impedance ■ Low quiescent current (max. 4 µA) ■ Able to be driven by totem pole and open drain drivers ■ 5.5 V tolerant enable pin ■ ESD performance on all pins: ±2 kV HBM ■ Small package and footprint - QFN10 (1.8 x 1.4 mm) package QFN10 (1.8 x 1.4 mm) Table 1. Device summary Order code Package Packing ST2329IQTR QFN10 (1.8 x 1.4 mm) Tape and reel (3000 parts per reel) Applications ■ Low voltage system level translation ■ Mobile phones and other mobile devices ■ I2C level translation ■ UART level translation March 2011 Doc ID 018508 Rev 1 This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice. 1/22 www.st.com 1 Contents ST2329I Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Supplementary notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Driver requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.2 Load driving capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.3 Power-off feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 AC characteristics (device driven by open drain driver) . . . . . . . . . . . . . . 11 2.3 AC characteristics (device driven by totem pole driver) . . . . . . . . . . . . . . 13 3 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 2/22 Doc ID 018508 Rev 1 ST2329I List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 DC characteristics (over recommended operating conditions unless otherwise noted. All typical values are at TA = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 11 For test conditions: VL = 2.5 to 2.7 V (load C L = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 11 For test conditions: VL = 2.7 to 3.6 V (load C L = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 12 For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 13 For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 13 For test conditions: VL = 2.7 to 3.6 V (load C L = 15 pF; Rup = 10 kΩ; driver tr = tf ≤2 ns) overtemperature range –40 °C to 85 °C . . . . . . . . . . . . . . . . . . . . . . . . 14 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Waveform symbol value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 17 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Doc ID 018508 Rev 1 3/22 List of figures ST2329I List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. 4/22 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Waveform - propagation delay (f = 1 MHz, 50% duty cycle). . . . . . . . . . . . . . . . . . . . . . . . 15 Waveform - output enable/disable (f = 1 MHz, 50% duty cycle) . . . . . . . . . . . . . . . . . . . . . 15 Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . 16 Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . 17 Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch . . . . . . . . . . . . . . . . . . . . . . 18 Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - back view . . . . . . . . . 19 Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - front view. . . . . . . . . . 20 Doc ID 018508 Rev 1 ST2329I 1 Description Description ST2329I is a 2-bit dual-supply level translator which provides the level shifting capability to allow data transfer in a multi-voltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of the device. It utilizes a transmission gate based design that allows bidirectional level translation without a control pin. The ST2329I accepts VL from 1.65 V to 3.6 V and VCC from 1.80 V to 5.5 V, making it ideal for data transfer between low-voltage ASICs/PLD and higher voltage systems. This device has a tri-state output mode which can be used to disable all the I/Os. The ST2329I supports power-down mode when VCC is grounded/floating and the device is disabled via the OE pin. The device has integrated 10 kΩ pull-ups on both sides. Doc ID 018508 Rev 1 5/22 Pin configuration 2 ST2329I Pin configuration Figure 1. Pin configuration           1&.,TOPTHROUGHVIEW Table 2. !- Pin description QFN10 pin no Symbol Name and function 1, 2 I/OVL1 to I/OVL2 Data inputs/outputs 8, 7 I/OVCC1 to I/OVCC2 Data inputs/outputs 3 OE Output enable input 6 GND Ground 10 VL Supply voltage 9 VCC Supply voltage 4, 5 NC No connect Figure 2. Device block diagram 6## 1. ST2329I has 2 channels. For simplicity, the diagram above shows only 1 channel. 2. When OE is LOW, all I/Os are in high impedance mode. 6/22 Doc ID 018508 Rev 1 ST2329I Figure 3. Pin configuration Typical application diagram 6, 6## 6, SYSTEM CONTROLLER 6 , 6 , 6, 6## )/ 6, )/ 6## )/ 6, /% )/ 6## 6## 6## 6## SYSTEM CONTROLLER !- 1. External pull-up resistors are optional. Only needed if a pull-up value lower than 10 kΩ is desired. 2.1 Supplementary notes 2.1.1 Driver requirements The ST2329I may be driven by an open drain or totem pole driver and the nature of the device output is “open drain”. It must not be used to drive a pull-down resistor as the impedance of the output at HIGH state depends on the pull-up resistor placed at the I/Os. As the device has pull-up resistors on both I/OVCC and I/OVL ports, the user needs to ensure that the driver is able to sink the required amount of current. For example, if the settings are VCC = 5.5 V, VL = 4.3 V, and the pull-up resistor is 10 kΩ, then the driver must be able to sink at least (5.5 V / 10 kΩ) + (4.3 V / 10 kΩ) ≈ 1 mA and still meet VIL requirements of ST2329I. 2.1.2 Load driving capability To support the open drain system, the one-shot transistor is turned on only during high transition at the output side. When it drives a high state, after the one-shot transistor turned off, only the pull-up resistor is able to maintain the state. In this case, the resistive load is not recommended. 2.1.3 Power-off feature In some applications where it might be required to turn off one of the power supplies powering up the level translator, the user may turn OFF the VCC only when the OE pin is low (device is disabled). There is no current consumption in VL due to floating gates or other causes, and the I/Os are in a high impedance state in this mode. Doc ID 018508 Rev 1 7/22 Pin configuration ST2329I Table 3. Truth table Enable Bidirectional input/output OE H I/OVL I/OVCC (1) H (2) H(1) H(1) L L L Z(3) Z 1. High level VL power supply referred. 2. High level VCC power supply referred. 3. Z = high impedance. Table 4. Absolute maximum ratings Symbol Parameter Value Unit VL Supply voltage –0.3 to 4.6 V VCC Supply voltage –0.3 to 6.5 V VOE DC control input voltage –0.3 to 6.5 V VI/OVL DC I/OVL input voltage (OE = GND or VL) –0.3 to VL + 0.3 V VI/OVCC DC I/OVCC input voltage (OE = GND or VL) –0.3 to VCC + 0.3 V IIK DC input diode current –20 mA II/OVL DC output current ±25 mA II/OVCC DC output current ±258 mA ISCTOUT Short-circuit duration, continuous 40 mA 500 mW PD Power dissipation(1) TSTG Storage temperature –65 to 150 °C TL Lead temperature (10 seconds) 300 °C ESD Electrostatic discharge protection (HBM) ±2 KV 1. 500 mW: 65 °C derated to 300 mW by 10 mW/°C: 65 °C to 85 °C. Table 5. Recommended operating conditions Symbol Parameter Min. VL Max. Unit Supply voltage 1.65 3.6 V Supply voltage 1.8 5.5 V VOE Input voltage (OE output enable pin, VL power supply referred) 0 3.6 V VI/OVL I/OVL voltage 0 VL V VI/OVCC I/OVCC voltage 0 VCC V TOP Operating temperature –40 85 °C dt/dV Input rise and fall time 0 1 ns/V VCC (1) 1. VCC must be greater than VL. 8/22 Doc ID 018508 Rev 1 Typ. ST2329I Pin configuration Table 6. DC characteristics (over recommended operating conditions unless otherwise noted. All typical values are at TA = 25 °C) Test conditions Symbol Value Parameter TA = 25 °C VL Min. VIHL VILL VIHC VILC VIH-OE High level input voltage on VL side (I/OVL) Low level input voltage on VL side (I/OVL) High level input voltage on VCC side (I/OVCC) Low level input voltage on VCC side (I/OVCC) High level input voltage (OE) –40 to 85 °C Typ. Max. Min. 1.65 1.4 1.4 2.0 1.6 1.6 2.0 2.0 3.0 2.4 2.4 3.6 2.8 2.8 2.5 VL to 5.5 — Max. V 1.65 0.3 0.3 2.0 0.4 0.4 0.5 0.5 3.0 0.6 0.6 3.6 0.8 0.8 2.5 1.65 to VCC 1.65 to VCC VL to 5.5 — 1.65 1.4 1.6 2.0 1.6 2.3 2.3 2.7 3.0 2.7 3.3 3.6 3.3 3.5 5.5 4.2 4.2 2.5 — 1.65 0.3 2.0 0.3 2.5 0.3 — V 3.0 0.5 3.6 0.5 5.5 0.5 1.0 1.0 2.0 1.2 1.2 1.4 1.4 3.0 1.6 1.6 3.6 2.0 2.0 VL to 5.5 V V 1.65 2.5 Unit VCC — Doc ID 018508 Rev 1 V 9/22 Pin configuration Table 6. ST2329I DC characteristics (over recommended operating conditions unless otherwise noted. All typical values are at TA = 25 °C) (continued) Test conditions Symbol Value Parameter TA = 25 °C VL Min. VIL-OE Low level input voltage (OE) –40 to 85 °C Typ. Max. Min. Max. 1.65 0.33 0.33 2.0 0.40 0.40 0.50 0.50 3.0 0.60 0.60 3.6 0.75 0.75 2.5 Unit VCC VL to 5.5 — V VOLL Low level output voltage (I/OVL) 1.65 to 3.6 VL to 5.5 IO=1.0 mA I/OVCC ≤ 0.15 V 0.40 0.40 V VOLC Low level output voltage (I/OVCC) 1.65 to 3.6 VL to 5.5 IO=1.0 mA I/OVL ≤ 0.15 V 0.40 0.40 V IOE Control input leakage current (OE) 1.65 to 3.6 VL to 5.5 VOE = GND or VL ±0.1 ±0.1 µA IIO_LKG High impedance leakage current (I/OVL, I/OVCC) 1.65 to 3.6 VL to 5.5 OE = GND ±0.1 ±0.1 µA IQVCC Quiescent supply current VCC 1.65 to 3.6 VL to 5.5 Only pull-up resistor connected to I/O 3 3.5 6 µA IQVL Quiescent supply current VL 1.65 to 3.6 VL to 5.5 Only pull-up resistor connected to I/O 0.01 0.1 1 µA IZ-VCC High impedance quiescent supply current VCC 1.65 to 3.6 VL to 5.5 OE = GND; only pull-up resistor connected to I/O 3 3.5 6 µA IZ-VL High impedance quiescent supply current VL 1.65 to 3.6 VL to 5.5 OE = GND; only pull-up resistor connected to I/O 0.01 0.1 1 µA 10/22 Doc ID 018508 Rev 1 ST2329I Pin configuration 2.2 AC characteristics (device driven by open drain driver) Table 7. For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C Symbol VCC = 1.8 - 2.5 V VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V Parameter Min. Max. Min. Max. Min. Unit Max. tRVCC Rise time I/OVCC 80 60 45 ns tFVCC Fall time I/OVCC 23.2 33.9 53.3 ns tRVL Rise time I/OVL 60 45 35 ns tFVL Fall time I/OVL 16.4 17.6 16.9 ns tPLH 3.4 2 tPLH 13.9 19.1 30.2 ns tPLH 2 2 2.6 ns tPLH 8.6 9 9.5 ns En 10 10 10 ns Dis 40 40 40 ns 1.8 2.2 3.4 MHz tI/OVL-VCC Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPZL tPZH tPLZ tPHZ Output enable and disable time DR Data rate(1) ns 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%. Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor. Table 8. Symbol For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; R up = 4.7 kΩ; driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V Min. Min. Unit Parameter Max. Max. tRVCC Rise time I/OVCC 70 50 ns tFVCC Fall time I/OVVCC 14.8 19.1 ns tRVL Rise time I/OVL 50 35 ns tFVL Fall time I/OVL 9.8 10 ns Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tPLH 2 2 ns tI/OVL-VCC tPLH 8.2 11.6 ns Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPLH 2 2 ns tI/OVCC-VL tPLH 5.3 5.9 ns tPZL tPZH tPLZ tPHZ Output enable and disable time DR Data rate(1) En 6 6 ns Dis 40 40 ns 2.2 3.0 MHz 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%. Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor. Doc ID 018508 Rev 1 11/22 Pin configuration ST2329I Table 9. For test conditions: VL = 2.7 to 3.6 V (load CL = 15 pF; Rup = 4.7 kΩ; driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C VCC = 4.3 - 5.5 V Symbol Parameter Unit Min. Max. tRVCC Rise time I/OVCC 55 ns tFVCC Fall time I/OVCC 17.2 ns tRVL Rise time I/OVL 40 ns tFVL Fall time I/OVL 9.7 ns Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tPLH 2 ns tI/OVL-VCC tPLH 10.6 ns Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPLH 2 ns tI/OVCC-VL tPLH 4.8 ns En 6 ns Dis 40 ns 3.0 MHz tPZL tPZH tPLZ tPHZ Output enable and disable time DR Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%. Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor. 12/22 Doc ID 018508 Rev 1 ST2329I Pin configuration 2.3 AC characteristics (device driven by totem pole driver) Table 10. For test conditions: VL = 1.65 to 1.8 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C Symbol VCC = 1.8 - 2.5 V VCC = 2.7 - 3.6 V VCC = 4.3 - 5.5 V Parameter Min. Max. Min. Max. Min. Unit Max. tRVCC Rise time I/OVCC 7.2 4.6 1.4 ns tFVCC Fall time I/OVCC 23.2 33.9 53.3 ns tRVL Rise time I/OVL 5.9 5.7 5.5 ns tFVL Fall time I/OVL 16.4 17.6 16.9 ns tPLH 5.5 4.1 3.6 ns tPLH 13.9 19.1 30.2 ns tPLH 4.5 3.9 3.6 ns tPLH 8.6 9.0 9.5 ns En 10 10 10 ns Dis 40 40 40 ns 6.4 4.5 3.0 MHz tI/OVL-VCC Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPZL tPZH tPLZ tPHZ Output enable and disable time DR Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%. Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor. Table 11. Symbol For test conditions: VL = 2.5 to 2.7 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C VCC = 2.7 - 3.6 V Parameter Min. Max. VCC= 4.3 - 5.5 V Min. Unit Max. tRVCC Rise time I/OVCC 3.8 2.8 ns tFVCC Fall time I/OVCC 14.8 19.1 ns tRVL Rise time I/OVL 3.3 3.2 ns tFVL Fall time I/OVL 9.8 10.0 ns tPLH 3.2 2.8 ns tPLH 8.2 11.6 ns tPLH 2.6 2.0 ns tPLH 5.3 5.9 ns En 6 6 ns Dis 40 40 ns 9 6.8 MHz tI/OVL-VCC Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tI/OVCC-VL Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPZL tPZH tPLZ tPHZ Output enable and disable time DR Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%. Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor. Doc ID 018508 Rev 1 13/22 Pin configuration ST2329I Table 12. For test conditions: VL = 2.7 to 3.6 V (load CL = 15 pF; Rup = 10 kΩ; driver tr = tf ≤ 2 ns) overtemperature range –40 °C to 85 °C VCC = 4.3 - 5.5 V Symbol Parameter Unit Min. Max. tRVCC Rise time I/OVCC 2.9 ns tFVCC Fall time I/OVCC 17.2 ns tRVL Rise time I/OVL 3.0 ns tFVL Fall time I/OVL 9.7 ns Propagation delay time I/OVL-LH to I/OVCC-LH I/OVL-HL to I/OVCC-HL tPHL 2.7 ns tI/OVL-VCC tPHL 10.6 ns Propagation delay time I/OVCC-LH to I/OVL-LH I/OVCC-HL to I/OVL-HL tPHL 1.9 ns tI/OVCC-VL tPHL 4.8 ns tPZL tPZH tPLZ tPHZ En 6 ns Output enable and disable time Dis 40 ns 7.2 MHz DR Data rate(1) 1. The data rate is guaranteed based on the condition that the output I/O signal rise/fall time is less than 15% of the input I/O signal period; the input I/O signal is at 50% duty cycle and the output I/O signal duty cycle deviation is not less than 30%. Note that the Rup of 4.7 kΩ is an effective R pull-up value. Since the device has an integrated 10 kΩ pull-up resistor, an effective value of 4.7 kΩ is obtained by adding an external 8.9 kΩ pull-up resistor. Figure 4. Test circuit 6, 6, 6## 2UP 0ULSE GENERATOR 6## 2UP $54 6, 6## /PEN '.$ #, !- Table 13. Test circuit Switch Test tPLH, tPHL Note: 14/22 Driving I/OVL Driving I/OVCC Open drain driving Open Open Open The pull-up resistors shown in the above test circuit are optional and are only needed if total pull-up on either end of the level translator needs to be lower than 10 kΩ . In applications where 10 kΩ is sufficient, the external pull-up resistor is not required. Doc ID 018508 Rev 1 ST2329I Pin configuration Table 14. Waveform symbol value Driving I/OVCC Driving I/OVL Symbol 1.8 V ≤ VL ≤ VCC ≤ 2.5 V 3.3 V ≤ VL ≤ VCC ≤ 5.0 V 1.8 V ≤ VL ≤ VCC ≤ 2.5 V 3.3 V ≤ VL ≤ VCC ≤ 5.0 V VIH VL VL VCC VCC VIM 50% VL 50% VL 50% VCC 50% VCC VOM 50% VCC 50% VCC 50% VCC 50% VCC VX VOL +15 V VOL +0.3 V VOL +0.15 V VOL +0.3 V VY VOH –15 V VOH –0.3 V VOH –0.15 V VOH –0.3 V Figure 5. Waveform - propagation delay (f = 1 MHz, 50% duty cycle) NS )/6, )/6## NS 6)(  6)- 6)- T0,( '.$ )/6## T0,( 6/( )/6## )/6, 6/- 6/-  Figure 6. 6/, !- Waveform - output enable/disable (f = 1 MHz, 50% duty cycle) NS /% NS  6) 6)(  6) T0:( '.$ T0(: 6/( 69 )NPUTHIGH 6)T0:, T0,: '.$ 6,OR6 ## )NPUTLOW 6)- 68 6/, !- Doc ID 018508 Rev 1 15/22 Package information 3 ST2329I Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at www.st.com. ECOPACK is an ST trademark. Figure 7. Package outline for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch Bottom view 9 10 0.15 Pin 1 ID 1 7 2 6 3 L (10x) e 0.10 8 3 7 2 8 1 E/2 10 D/2 E Pin 1 ID D b (10x) e/2 6 9 4 5 4 5 Top view e A3 Z8_ME 16/22 Doc ID 018508 Rev 1 ST2329I Package information Table 15. Mechanical data for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch millimeters inches Note Symbol Figure 8. Typ. Min. Max. Typ. Min. Max. A 0.5 0.45 0.55 0.02 0.018 0.022 A1 0.02 0 0.05 0.001 0 0.002 A3 0.13 b 0.2 0.15 0.25 0.008 0.006 0.01 D 1.8 1.75 1.85 0.071 0.069 0.073 E 1.4 1.35 1.45 0.055 0.053 0.057 e 0.4 L 0.4 0.014 0.018 0.005 0.016 0.35 0.45 0.016 Footprint recommendation for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch !- Doc ID 018508 Rev 1 17/22 Package information Figure 9. ST2329I Carrier tape for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch + 2REF !   "      #/6%2 ! › " › + › !- 18/22 Doc ID 018508 Rev 1 ST2329I Package information Figure 10. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - back view   2   2 #,   %-"/33%$2)"3 2!)3%$MM 7)$4(MM "!#+ 6)%7  -!8  n "!#+ 6)%7 !- Doc ID 018508 Rev 1 19/22 Package information ST2329I Figure 11. Reel information for QFN10 (1.8 x 1.4 x 0.5 mm) - 0.40 mm pitch - front view 888 2%02%3%.433500,)%2g3 ,/'//2.!-%/04)/. 4%84(%)'(4MM()'(8 MM7)$%%-"/33%$,%44%23 3%%$%4!)," 888 #,  03 3,/4  !0!24 0,!#%3 &2/.43)$% 3%%$%4!),#  -!8  n › -). 2%& 2%&    n  03 2%&4%84(%)'(4 $%4!),# $%4!)," !- 20/22 Doc ID 018508 Rev 1 ST2329I 4 Revision history Revision history Table 16. Document revision history Date Revision 02-Mar-2011 1 Changes Initial release. Doc ID 018508 Rev 1 21/22 ST2329I Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2011 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 22/22 Doc ID 018508 Rev 1