STMPE1208S

STMPE1208S Xpander Logic™ with 12-channel touchkey Features ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 12 touchkey capacitive sensor inputs 12-bit general purpose input/output (GPIO) Operating voltage 2.5 − 5.5 V 98 μA in active mode, 60 μA in idle mode Dual interrupt output pin I2C interface (up to 400 kHz) 7 kV HBM ESD protection Idle and sleep mode for low power operation Advanced data filtering (AFS) Environment tracking calibration (ETC) Individually adjustable touch variance (TVR) setting for all channels Adjustable environmental variance (EVR) for optimal calibration QFN40 Description The STMPE1208S is a 12-channel GPIO capacitive touchkey sensor able to interface a main digital ASIC via the two-line bidirectional bus (I2C). It senses changes in capacitance using a fully digital architecture, giving fast and accurate results at very low power consumption. Automatic impedance calibration ensures that changes in environment will never affect the correct operation of the capacitive touchkeys. Applications ■ ■ ■ ■ ■ ■ ■ ■ Notebook computers Monitors Set-top boxes Televisions Portable media players and game consoles Mobile and smart phones Home entertainment systems Domestic appliances Table 1. Device summary Order code STMPE1208SQTR Package QFN40 Packing Tape and reel July 2008 Rev 3 1/51 www.st.com 51 Contents STMPE1208S Contents 1 Pin configuration and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 3 4 5 Clock setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 I2C interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Power schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Capacitive sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 5.2 5.3 Capacitive sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Setting of TVR and EVR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.3.1 5.3.2 5.3.3 5.3.4 3-stage data filtering system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Noise filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 BEEP output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6 7 8 Register map and function description . . . . . . . . . . . . . . . . . . . . . . . . . 19 Command registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 8.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 9 10 11 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 2/51 STMPE1208S List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin assignments and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Clocking system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 I2C addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Operation modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Calibration action under different scenarios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Register summary map table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Command registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 DC electrical characteristics (-40 - 85 °C unless otherwise stated)) . . . . . . . . . . . . . . . . . . 44 QFN40 (5 x 5 mm) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 3/51 List of figures STMPE1208S List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. STMPE1208S pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 STMPE1208S block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 STMPE1208S operating states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Read and write modes (random and sequential) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power using the internal regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Power bypassing the internal regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Capacitive sensors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitive sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3-stage data filtering system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Interrupt system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Software interface (G_INT based) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Software interface (T_INT based). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 QFN40 (5 x 5 mm) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 QFN40 recommended footprint without ground pad VIA . . . . . . . . . . . . . . . . . . . . . . . . . . 47 QFN40 recommended footprint with ground pad VIA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 QFN40 tape information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 Reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 4/51 STMPE1208S Pin configuration and function 1 Pin configuration and function Figure 1. STMPE1208S pin configuration VREG GND S_IN_ 8 S_IN_ 4 S_IN_ 5 S_IN_ 6 S_IN_ 7 S_IN_3 VPH S_IN_2 S_IN_1 S_IN_0 RESET_N ID_1 STMPE1208S ID_0 GPIO_ 5 GPIO_ 4 GPIO_ 3 GPIO_ 2 1 GPIO_1 V25 S_IN_ 9 S_IN_ 10 S_IN_ 11 S_ RE F GND VPH GPIO_6 GPIO _7 GPIO _8 GPIO _9 2 3 SDATA 4 5 6 GPIO_11 BEEP GPIO_10 GPIO_0 G_INT S CLK T_INT TCLK CS00037 Table 2. Pin assignments and description Pin name GPIO_1 GPIO_0 SDATA SCLK T_INT G_INT BEEP TCLK GPIO_11 GPIO_10 GPIO_9 General purpose I/O General purpose I/O I2C data I2C clock Touch interrupt General interrupt Beep output Test pin (to be grounded) General purpose I/O General purpose I/O General purpose I/O Description Pin number 1 2 3 4 5 6 7 8 9 10 11 5/51 Pin configuration and function Table 2. Pin assignments and description (continued) Pin name GPIO_8 GPIO_7 GPIO_6 VPH GND S_REF S_IN_11 S_IN_10 S_IN_9 S_IN_8 S_IN_7 S_IN_6 GND V25 VREG VPH S_IN_5 S_IN_4 S_IN_3 S_IN_2 S_IN_1 S_IN_0 RESET_IN ID_1 ID_0 GPIO_5 GPIO_4 GPIO_3 GPIO_2 General purpose I/O General purpose I/O General purpose I/O Description STMPE1208S Pin number 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 3 − 5.5 V power supply (regulator input) Supply to this pin is also used for powering the GPIO Ground Touch sensing reference. Capacitance sensing input 11 Capacitance sensing input 10 Capacitance sensing input 9 Capacitance sensing input 8 Capacitance sensing input 7 Capacitance sensing input 6 Ground 2.5 V supply Internal regulator output 3 − 5.5 V power supply (regulator input) Capacitance sensing input 5 Capacitance sensing input 4 Capacitance sensing input 3 Capacitance sensing input 2 Capacitance sensing input 1 Capacitance sensing input 0 Active low reset pin. This pin should be held ‘low’ for 10 mS from power stable state. Recommended: 47 K resistor with 0.47 μF capacitor I2C address I2C address General purpose I/O General purpose I/O General purpose I/O General purpose I/O 6/51 STMPE1208S Figure 2. STMPE1208S block diagram Pin configuration and function Data filtering unit Automatic calibration unit 12-input capacitive sensor S _Ref ID_0 ID_1 RESET G_INT T_INT SDAT SCLK Host interface unit S_In 0 - 11 BEEP BEEP generator 12-bit GPIO Regulator & power control GPIO 0 - 11 Clock control unit TCLK VPH V REG V25 CS00038 Figure 3. Application diagram System host RESET G_INT T_INT SDAT SCLK Up to 12 touch pads STMPE1208S GPIO 0-11 Up to 12 GPIO for system usage 7/51 Pin configuration and function STMPE1208S 1.1 Power management The STMPE1208S operates in 3 states. Figure 4. STMPE1208S operating states RESET ACTIVE Host command Touch or host command Host command SLEEP IDLE Time out CS00039 On RESET, the STMPE1208S enters the ACTIVE state immediately. Upon a fixed period of inactivity, the device enters into the SLEEP state. Any touch activity in SLEEP state would cause the device to go back to ACTIVE state. In SLEEP mode: -Calibration continues if F2A bit is set in CONTROL register -Calibration stops if F2A bit is NOT set in CONTROL register If no touch activity is expected, the host may set the device into HIBERNATE state to save power. 8/51 STMPE1208S Clock setting 2 Clock setting The STMPE1208S uses a flexible clocking system that allows the user to adjust the clock speed for optimization of power consumption. Table 3. OSC Clocking system Active PDIV Clock 0 00 1.6 MHz 1 0 01 800 KHz 1 5 KHz 5 KHz 2.5 KHz 2.5 KHz 1.25 KHz 25 Hz 25 Hz 12.5 Hz 12.5 Hz 6.25 Hz 0 10 400 KHz 1 0 11 200 KHz 1 10 KHz 10 KHz 50 Hz 50 Hz NDIV Sensor clock 20 KHz 100 Hz Idle 1.6 MHz The clock frequency must be set to value higher than the expected I2C frequency. 9/51 I2C interface STMPE1208S 3 I2C interface The features that are supported by the I2C interface are the following ones: ● ● ● ● ● ● I2C slave device Compliant to Philips I2C specification version 2.1 Supports standard (up to 100 kbps) and fast (up to 400 kbps) modes. 7-bit and 10-bit device addressing modes General call Start/Restart/Stop The address is selected by the state of 2 pins. The state of the pins is read upon reset and then the pins can be configured for normal operation. The pins have a pull-up or down to set the address. The I2C interface module allows the connected host system to access the registers in the STMPE1208S. Table 4. ID_1 0 0 1 1 I2C addresses 7-bit address ID_0 0 1 0 1 7-bit address Write 0x58 0x59 0x5A 0x5B 0xB0 0xB2 0xB4 0xB6 Read 0xB1 0xB3 0xB5 0xB7 Start condition A Start condition is identified by a falling edge of SDATA while SCLK is stable at high state. A Start condition must precede any data/command transfer. The device continuously monitors for a Start condition and will not respond to any transaction unless one is encountered. Stop condition A Stop condition is identified by a rising edge of SDATA while SCLK is stable at high state. A Stop condition terminates communication between the slave device and bus master. A read command that is followed by NoAck can be followed by a Stop condition to force the slave device into idle mode. When the slave device is in idle mode, it is ready to receive the next I2C transaction. A Stop condition at the end of a write command stops the write operation to registers. Acknowledge bit (ACK) The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter releases the SDATA after sending eight bits of data. During the ninth bit, the receiver pulls the SDATA low to acknowledge the receipt of the eight bits of data. The receiver may leave the SDATA in high state if it would to not acknowledge the receipt of the data. 10/51 STMPE1208S Data Input I2C interface The device samples the data input on SDATA on the rising edge of the SCLK. The SDATA signal must be stable during the rising edge of SCLK and the SDATA signal must change only when SCLK is driven low. Slave device address The slave device address is a 7 or 10-bit address, where the least significant 3-bit are programmable. These 3-bit values will be loaded in once upon reset and after that these 3 pins no longer be needed with the exception during General Call. Up to 4 STMPE1208S devices can be connected on a single I2C bus. Memory addressing For the bus master to communicate to the slave device, the bus master must initiate a Start condition and followed by the slave device address. Accompanying the slave device address, there is a Read/ bit (R/ ). The bit is set to 1 for read and 0 for write operation. If a match occurs on the slave device address, the corresponding device gives an acknowledgement on the SDA during the 9th bit time. If there is no match, it deselects itself from the bus by not responding to the transaction. Table 5. Mode Operation modes Byte Programming sequence Start, Device address, R/W = 0, Register address to be read Restart, Device address, R/W = 1, Data Read, STOP If no Stop is issued, the Data Read can be continuously performed. If the register address falls within the range that allows an address autoincrement, then the register address auto-increments internally after every byte of data being read. For those register addresses that fall within a non-incremental address range, the address will be kept static throughout the entire write operations. Refer to the memory map table for the address ranges that are auto and non-increment. An example of such a non-increment address is FIFO Start, Device address, R/W = 0, Register address to be written, Data Write, Stop If no Stop is issued, the Data Write can be continuously performed. If the register address falls within the range that allows address autoincrement, then the register address auto-increments internally after every byte of data being written in. For those register addresses that fall within a non-incremental address range, the address will be kept static throughout the entire write operations. Refer to the memory map table for the address ranges that are auto and non-increment. Read ≥1 Write ≥1 11/51 I2C interface Figure 5. One byte Read STMPE1208S Read and write modes (random and sequential) Ack Restart R/W=0 R/W=1 Device Address Reg Address Device Address Data Read No Ack Start Stop Ack Ack Ack Restart More than one byte Read Device Address Reg Address Device Address Data Read Data Read + 1 No Ack R/W=0 R/W=1 Data Read + 2 Start Ack One byte Write Device Address Reg Address Data to be written R/W=0 Start R/W=0 Data to Write + 1 Start Data to Write + 2 Master Slave 12/51 Ack Stop Ack Ack Ack Ack More than one byte Read Device Address Reg Address Data to Write Ack Stop Ack Ack Ack Ack Stop Ack STMPE1208S Power schemes 4 Power schemes The STMPE1208S can be powered by a 2.5 V supply directly, or 3.0 - 5.5 V supply through the internal voltage regulator. Figure 6. Power using the internal regulator VPH 3 - 5.5V VREG STMPE1208S V25 2.2uF GND CS00041 1. REG_DISABLE bit in CTRL_2 register = 0 Figure 7. Power bypassing the internal regulator VPH 3 - 5.5V NC VREG STMPE1208S V25 2.25 - 2.75V GND CS00042 1. REG_DISABLE bit in CTRL_2 register = 1 13/51 Capacitive sensors STMPE1208S 5 Capacitive sensors The STMPE1208S capacitive sensor is based on fully digital, impedance change detection engine that is capable of detecting very small change in capacitance. Figure 8. Capacitive sensors Touchkey 7-bit impedance value of each channel Calibrated impedance Touched keys Impedance sensor Automatic calibration Unit Data filtering Calibration control parameters Data filtering control Parameters 5.1 Capacitive sensing The STMPE1208S senses a human touch by the additional capacitance introduced to the pad (with respect to ground). This capacitance causes a delay in a clock signal on the sensing pad, and the delay in the sensing pad is compared with a reference clock and the difference is a direct representation of the additional capacitance introduced by the proximity/touch of finger. Figure 9. Capacitive sensing 14/51 STMPE1208S Capacitive sensors 5.2 Capacitance compensation The STMPE1208S is capable to measuring up to 7.2 pF in capacitance difference between the reference point (Zref) and the individual channels. In the case where the PCB connection between the sensor pads and the device is too long, the "REFERENCE DELAY" register is able to shift the reference by up to 6.0 pF, allowing the TOUCH channels to measure added capacitance 7.2 pF with offset of 6.0 pF, as shown in following diagram. In case this is still not enough to compensate for the capacitance on sensor lines (due to very long sensor trace), an external capacitor of up to 30 pF can be connected at the A_Ref pin. This allows to further shift up the dynamic range of the capacitance measurement. Figure 10. Capacitance compensation 7.2 pF Reference delay register = 0 Dynamic range = 0 - 7.2 pF 6.0 pF 7.2 pF Reference delay register = 6.0 pF Dynamic range = 6.0 - 13.2 pF 6.0 pF 30.0pF 7.2 pF Reference delay = 6.0 pF S_REF external capacitance = 30 pF Dynamic range = 36 - 43.2 pF Increasing capacitance CS00043 The sensed capacitance is accessible to host through the "IMPEDANCE" registers. 5.3 Setting of TVR and EVR The STMPE1208S uses 2 main parameters to control the sensitivity and calibration of the capacitive sensing system. TVR (touch variance) is a channel-specific value, that specifies the number of steps the sensed capacitance must be above the internal reference, to be considered a touch. Generally, this should be set as 4 −10, but it must be bigger than EVR. The EVR (environment variance) is a shared value that is applied to all the channels. This specifies the maximum change in capacitance that can be considered due to the shifting of the environmental factor. Generally, this should be set to 1 −5, but it must be less than TVR. Environment tracking calibration On power up, a calibration is executed. The initial calibration takes about 150 clock cycles of sensor clock for completion. Using 5 kHz sensor clock, this would be 30 mS. However, if any of the sensors are touched during powering up, calibration is delayed, until all sensors are untouched. In this case, the time taken for calibration, from the time when all sensors are untouched is: 2 * calibration interval + 150 * sensor clock period 15/51 Capacitive sensors STMPE1208S The STMPE1208S maintains 2 parameters for each TOUCH channels: TVR and CALIBRATED IMPEDANCE. CALIBRATED IMPEDANCE is an internal reference of which, if the currently measured IMPEDANCE exceeds the CALIBRATED IMPEDANCE by a magnitude of TVR, it is considered a TOUCH. If the IMPEDANCE is more than the CALIBRATED IMPEDANCE, but the magnitude does not exceed CALIBRATED IMPEDANCE by TVR, it is not considered a TOUCH. In this case, 2 scenarios are possible: 1. Environmental changes has caused the IMPEDANCE to increase 2. Finger is near the sensing pad, but not near enough In case 1, the change in IMPEDANCE is expected to be small, as environmental changes are normally gradual. A value "EVR" is maintained to specify the maximum IMPEDANCE change that is still considered an environmental change. Table 6. Calibration action under different scenarios Scenario IMP>CALIBRATED IMP + TVR IMP>CALIBRATED IMP + EVR IMP Calibrated Impedance + TVR), the corresponding bit in this register will read '1'. Reading TOUCH_BYTE_L and TOUCH_BYTE_H will clear the TINT assertion. 36/51 STMPE1208S Register map and function description TOUCH_BYTE_H 7 6 RESERVED 5 Touch byte H 4 3 CH11 2 CH10 1 CH9 0 CH8 Address: Type: Reset: Description: 0x76 R 0x00 CH n: Reads the touch status of channel n (n=8-11). If the key is touched (Impedance > Calibrated Impedance + TVR), the corresponding bit in this register will read '1'. Reading TOUCH_BYTE_L and TOUCH_BYTE_H will clear the TINT assertion. [7:4] RESERVED [3] CH11: [2] CH10: [1] CH9: [0] CH8: 37/51 Register map and function description STMPE1208S INT_PENDING 7 6 RESERVED 5 Interrupt pending 4 3 EOC 2 I2A 1 A21 0 TOUCH Address: Type: Reset: Description: 0x77 R 0x00 This register reflects the status of various possible interrupt sources. Upon the occurrence of an event, the corresponding bit in this register will be set to '1' by the hardware. [7:4] RESERVED [3] EOC: End of calibration [2] I2A: SLEEP to active transition [1] A21: Active to SLEEP transition [0] TOUCH: Touch detect GPIO_IN_L Address: Type: Reset: Description: 0x79 R 0x0 GPIO input state (lower) register Reads the current logical level of corresponding DIO if it is set as GPIO input. 38/51 STMPE1208S Register map and function description GPIO_IN_H Address: Type: Reset: Description: 0x7A R 0x00 GPIO input state (higher) register Reads the current logical level of corresponding DIO if it is set as GPIO input. 39/51 Command registers STMPE1208S 7 Command registers The command registers do not have a data field. The device carries out a predetermined operation upon receiving a write access to these address offset. However, a dummy dataphase is used to complete the I2C transaction. Table 8. Command registers Command 0xF8 CLK_SRC_INTERNAL 0xF9 CLK_SRC_EXTERNAL Operation Use internal OSC as clock source Use TCLK pin as clock source Turns OFF biasing for internal LDO When external supply is used for V25, turning OFF the biasing for internal LDO reduces current consumption Turns ON biasing for internal LDO Exits from sleep and enters Active mode Enter sleep mode Resets all states and registers Resets internal state machines, register values remain the same NOTE: I2C WRITE TO THIS REGISTER WILL NOT BE ACKNOWLEDGED. However as long as I2C timing is followed, the writing to this register will work correctly 0xFA BIAS_OFF 0xFB BIAS_ON 0xFC Wake Up 0xFD Enter Sleep 0xFE Cold Reset 0xFF Warm Reset 40/51 STMPE1208S Figure 13. Software interface (G_INT based) Command registers Initialization GPIO configuration, direction and output Calibration interval ETC wait Feature select EVR setting EVR setting Integration time TVR setting Integration treshold setting Control 1, control 2 Wait for interrupt Interrupt service routine Read interrupt pending register Write interrupt mask (to mask all) Write interrupt clear register Read “touch” byte register Read calibrated impedance registers Write interrupt mask (To unmask all) Post processing (optional) 41/51 Command registers Figure 14. Software interface (T_INT based) STMPE1208S Initialization GPIO configuration, direction and output Calibration interval ETC wait Feature select EVR setting EVR setting Integration time TVR setting Integration treshold setting Control 1, control 2 Wait for interrupt Interrupt service routine Read touch byte register Post processing (optional) 42/51 STMPE1208S Maximum rating 8 Maximum rating Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 9. Symbol Vph V25 VIN TJ TS ESD Power supply Power supply Digital input Operating temperature Storage temperature HBM on capacitive sensor pins Absolute maximum ratings Value Parameter Min 2.5 2.25 -0.3 -40 -55 7 Typ Max 5.5 2.75 VPH +0.3 85 95 V V V Unit °C °C kV 8.1 Recommended operating conditions Table 10. Symbol Vph V33 TJ Power supply Power supply Operating temperature Recommended operating conditions Value Parameter Min 3.0 2.25 -40 2.5 25 Typ Max 5.5 2.75 85 V V Unit °C 43/51 Electrical specifications STMPE1208S 9 Electrical specifications Table 11. Symbol Iout Iactive Iidle Isleep VIL VIH VOL VOH Iout Iin Ileakage DC electrical characteristics (-40 −85 ° C unless otherwise stated)) Value Parameter GPIO driving current Active current Idle current Sleep current Digital input low Digital input high Digital output low Digital output high GPIO drive current GPIO sink current Input leakage Total sink current on all GPIOs 〈 80 mA VIN = 5.5 V VPH = 5.5 V 0.2 Vph-0.5 2 10 2 0.7Vph 1.0 Test condition Min Vout = 0.75*VPH Touch present No-touch Sleep mode 98 60 0.1 Typ Max 2 160 80 1 1.0 mA μA μA μA V V V V mA mA μA Unit 44/51 STMPE1208S Package mechanical data 10 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 12. QFN40 (5 x 5 mm) mechanical data millimeters Symbol Min A A1 A3 b D E D2 E2 e L L1 P aaa ccc 45° BSC 0.15 0.10 0.30 3.70 3.70 0.15 0.80 0.00 0.203 ref 0.20 5.00 BSC 5.00 BSC 3.80 3.80 0.40 BSC 0.35 0.40 0.10 3.90 3.90 0.25 Typ 0.85 Max 0.90 0.05 45/51 Package mechanical data Figure 15. QFN40 (5 x 5 mm) package outline STMPE1208S 8072802_A 46/51 STMPE1208S Package mechanical data Figure 16. QFN40 recommended footprint without ground pad VIA Figure 17. QFN40 recommended footprint with ground pad VIA 0.68 0.30 1.27 0.68 1.27 Via 47/51 Package mechanical data Figure 18. QFN40 tape information STMPE1208S 48/51 STMPE1208S Figure 19. Reel information Package mechanical data 49/51 Revision history STMPE1208S 11 Revision history Table 13. Date 14-Feb-2008 Document revision history Revision 1 Initial release. Modified title in cover page and ETC_WAIT register description. Updated: Table 5: Operation modes on page 11 Added Figure 16: QFN40 recommended footprint without ground pad VIA on page 47. Document status promoted from preliminary data to datasheet. Modified: BEEP_PERIOD and BEEP_FREQUENCY registers description, HBM ESD protection value, Table 2: Pin assignments and description on page 5 and Chapter 10: Package mechanical data on page 45. Updated: Section 8: Maximum rating on page 43 and Section 9: Electrical specifications on page 44. Changes 04-Jun-2008 2 18-Jul-2008 3 50/51 STMPE1208S Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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