STN2NE10L

® STN2NE10L N-CHANNEL 100V - 0.33Ω - 2A SOT-223 STripFET™ POWER MOSFET TYPE STN2NE10L s s s s s V DSS 100 V R DS(on) < 0.4 Ω ID 1.8 A TYPICAL RDS(on) = 0.33 Ω EXCEPTIONAL dv/dt CAPABILITY AVALANCHE RUGGED TECHNOLOGY 100 % AVALANCHE TESTED LOW THRESHOLD DRIVE 2 3 DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique ”Single Feature Size™” stip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s DC MOTOR CONTROL (DISK DRIVES,etc.) s DC-DC & DC-AC CONVERTERS s SYNCHRONOUS RECTIFICATION 1 SOT-223 2 I NTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR VGS ID ID I DM ( • ) P tot dv/dt( 1 ) T st g Tj Parameter Drain-source Voltage (VGS = 0) Drain- gate Voltage (R GS = 20 k Ω ) Gate-source Voltage Drain Current (continuous) at Tc = 25 o C Drain Current (continuous) at Tc = 100 oC Drain Current (pulsed) Total Dissipation at T c = 25 C Derating F actor Peak Diode Recovery voltage slope Storage T emperature Max. Operating Junction Temperature o Value 100 100 ± 20 1.8 1.3 7.2 2.5 0.02 6 -65 to 150 150 ( 1) ISD ≤ 7.2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX Unit V V V A A A W W /o C V/ns o o C C (•) Pulse width limited by safe operating area March 2000 1/8 STN2NE10L THERMAL DATA R th j-pc b R thj -amb Tl Thermal Resistance Junction-PC Board Max Thermal Resistance Junction-ambient Max (Surf ace Mounted) Maximum Lead Temperature F or Soldering Purpose 50 60 260 o o C/W C/W o C AVALANCHE CHARACTERISTICS Symbo l IAR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 25 V) Max Value 1.8 20 Unit A mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS I DSS IGSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µ A V GS = 0 Min. 100 1 10 ± 100 Typ. Max. Unit V µA µA nA V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating Gate-body Leakage Current (VDS = 0) V GS = ± 20 V T c = 125 oC ON (∗) Symbo l V GS(th) R DS(on) I D(o n) Parameter Gate Threshold Voltage V DS = V GS Static Drain-source On Resistance On State Drain Current V GS = 10 V V GS = 5 V Test Con ditions ID = 250 µ A ID = 1 A ID = 1 A 1.8 Min. 1 Typ. 1.7 0.33 0.38 Max. 2.5 0.4 0.45 Unit V Ω Ω A V DS > ID(o n) x R DS(on )ma x V GS = 10 V DYNAMIC Symbo l g f s (∗ ) C iss C os s C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Con ditions V DS > ID(o n) x R DS(on )ma x V DS = 25 V f = 1 MHz ID = 1 A V GS = 0 V Min. 1 Typ. 3 345 45 20 Max. Unit S pF pF pF 2/8 STN2NE10L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l t d(on) tr Qg Q gs Q gd Parameter Turn-on Delay T ime Rise Time Total G ate Charge Gate-Source Charge Gate-Drain Charge Test Con ditions V DD = 50 V I D = 3.5 A R G = 4.7 Ω V GS = 5 V (Resistive Load, see fig. 3) V DD = 80 V ID = 7 A V GS = 5 V Min. Typ. 7 17 10 5 4 14 Max. Unit ns ns nC nC nC SWITCHING OFF Symbo l t d(of f) tf tr (Voff) tf tc Parameter Turn-off Delay T ime Fall T ime Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 80 V I D = 3.5 A V GS = 5 V R G =4.7 Ω (Resistive Load, see fig. 3) V DD = 80 V ID = 7 A V GS = 5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) Min. Typ. 22 8 8 9 19 Max. Unit ns ns ns ns ns SOURCE DRAIN DIODE Symbo l ISD I SDM (• ) V SD ( ∗ ) t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 2 A V GS = 0 75 190 5 I SD = 7 A di/dt = 100 A/ µ s T J = 150 o C V DD = 30 V (see test circuit, fig. 5) Test Con ditions Min. Typ. Max. 2 8 1.5 Unit A A V ns µC A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STN2NE10L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STN2NE10L Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STN2NE10L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STN2NE10L SOT-223 MECHANICAL DATA mm MIN. a b c d e1 e4 f g l1 l2 L 2.9 0.67 6.7 3.5 6.3 3 0.7 7 3.5 6.5 2.27 4.57 0.2 0.63 1.5 TYP. 2.3 4.6 0.4 0.65 1.6 MAX. 2.33 4.63 0.6 0.67 1.7 0.32 3.1 0.73 7.3 3.7 6.7 114.2 26.4 263.8 137.8 248 118.1 27.6 275.6 137.8 255.9 MIN. 89.4 179.9 7.9 24.8 59.1 mils TYP. 90.6 181.1 15.7 25.6 63 MAX. 91.7 182.3 23.6 26.4 66.9 12.6 122.1 28.7 287.4 145.7 263.8 DIM. L l2 e1 a b f d c e4 C l1 B C E g P008B 7/8 STN2NE10L Information furnished is believed to be accurate and reliable. However, STMicroelect onics assumes no responsibil ity for the consequences r of use of such information nor for any infringement of patents or other rights of third partes which may result from its use. No license is i granted by implication or otherwise under any patent or patent rights of STMicroelectro nics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all informaton previously supplied. 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