STN2NF10

STN2NF10 N-channel 100V - 0.23Ω - 2.4A - SOT-223 STripFET™ II Power MOSFET Features Type VDSS RDS(on) ID STN2NF10 100V < 0.26Ω 2.4A 2 Description 1 This Power MOSFET is the latest development of STMicroelectronics unique “single feature size” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Application ■ 2 3 SOT-223 Internal schematic diagram Switching application – DC-DC converters Order code Part number Marking Package Packaging STN2NF10 N2NF10 SOT-223 Tape & reel April 2007 Rev 6 1/13 www.st.com 13 Contents STN2NF10 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 ................................................ 9 STN2NF10 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS=0) 100 V VGS Gate-source voltage ± 20 V ID Drain current (continuous) at TC = 25°C 2.4 A ID Drain current (continuous) at TC = 100°C 1.5 A Drain current (pulsed) 17 A 0.026 W/°C IDM (1) Derating factor PTOT (2) Total dissipation at TC = 25°C 3.3 W EAS (3) Single pulse avalanche energy 200 mJ dv/dt (4) Peak diode recovery voltage slope 30 V/ns -55 to 150 °C Value Unit Rthj-amb (1) Thermal resistance junction-amb 38 °C/W Rthj-amb (2) Thermal resistance junction-amb 62.5 °C/W Tj Tstg Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area 2. This value is rated according to Rthj-amb, t < 10sec 3. IAS = 2.4A, VDD = 30V, Rg=4.7Ω, starting Tj = 25°C 4. ISD < 6A, di/dt < 500A/µs, VDD= 80% V(BR)DSS Table 2. Symbol Thermal data Parameter 1. When mounted on 1inch² FR-4 board, 2 oz. Cu, (t < 10sec) 2. When mounted on 1inch² FR-4 board, 2 oz. Cu, (t >10sec) 3/13 Electrical characteristics 2 STN2NF10 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 3. Symbol V(BR)DSS IDSS Parameter Drain-source breakdown voltage Zero gate voltage drain current (VGS = 0) Test conditions ID = 250µA, VGS= 0 Gate threshold voltage VDS= VGS, ID = 250µA RDS(on) Static drain-source on resistance VGS= 10V, ID= 1.2A Parameter Forward transconductance Ciss Input capacitance Output capacitance Reverse transfer capacitance Crss Qg Qgs Qgd Unit V 1 10 1 µA µA µA ±100 nA 4 V 0.23 0.26 Ω Typ. Max. Unit 2 Dynamic gfs Coss Max. 100 VDS = 30V, Tc=125°C VGS(th) Symbol Typ. VDS = Max rating,Tc=125°C VGS = ±20V Table 4. Min. VDS = Max rating, Gate body leakage current (VDS = 0) IGSS 4/13 On/off states Total gate charge Gate-source charge Gate-drain charge Test conditions Min. VDS =15V, ID=1.2A 2.5 S VDS =25V, f=1MHz, VGS=0 280 45 20 pF pF pF VDD=80V, ID = 6A VGS =10V (see Figure 15) 10 2.5 4 14 nC nC nC STN2NF10 Electrical characteristics Table 5. Symbol td(on) tr td(off) tf Table 6. Symbol ISD Switching times Parameter Test conditions Unit 6 10 ns ns Turn-off delay time Fall time VDD=50V, ID = 2.4A VGS =10V, RG=4.7Ω (see Figure 14) 20 3 ns ns Source drain diode Parameter Test conditions VSD(2) Forward on voltage ISD= 2.4A, VGS=0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD= 6A, VDD=10V IRRM Max. VDD=50V, ID = 2.4A VGS =10V, RG=4.7Ω (see Figure 14) Source-drain current Source-drain current (pulsed) Qrr Typ. Turn-on delay time Rise time ISDM (1) trr Min. di/dt=100A/µs,Tj=150°C (see Figure 19) Min. Typ. 70 175 5 Max Unit 2.4 17 A A 1.2 V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300µs, duty cycle 1.5% 5/13 Electrical characteristics STN2NF10 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characteristics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/13 STN2NF10 Electrical characteristics Figure 7. Gate charge vs. gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs. temperature Figure 10. Normalized on resistance vs. temperature Figure 11. Source-drain diode forward characteristics Capacitance variations Figure 12. Normalized BVDSS vs. temperature 7/13 Electrical characteristics Figure 13. Max drain current vs. temperature 8/13 STN2NF10 STN2NF10 3 Test circuit Test circuit Figure 14. Switching times test circuit for resistive load Figure 15. Gate charge test circuit Figure 16. Test circuit for inductive load Figure 17. Unclamped inductive load test switching and diode recovery times circuit Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform 9/13 Package mechanical data 4 STN2NF10 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/13 STN2NF10 Package mechanical data SOT-223 MECHANICAL DATA mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 1.80 MAX. 0.071 B 0.60 0.70 0.80 0.024 0.027 0.031 B1 2.90 3.00 3.10 0.114 0.118 0.122 c 0.24 0.26 0.32 0.009 0.010 0.013 D 6.30 6.50 6.70 0.248 0.256 0.264 e 2.30 0.090 e1 4.60 0.181 E 3.30 3.50 3.70 0.130 0.138 0.146 H 6.70 7.00 7.30 0.264 0.276 0.287 V A1 10 o 10o 0.02 P008B 11/13 Revision history 5 STN2NF10 Revision history Table 7. 12/13 Revision history Date Revision Changes 14-Sep-2006 4 The document has been reformatted 29-Mar-2007 5 Figure 1 has been updated 04-Apr-2007 6 New test condition for IDSS on Table 3 STN2NF10 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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