STV9211

® STV9211 150 MHz PIXEL VIDEO CONTROLLER FOR MONITORS IN DC-COUPLING MODE FEATURES q 150 q 2.7 qI MHz Pixel Rate ns Rise and Fall Time Bus Controlled q Support DC Coupling Application only q Brightness Selection (after or before Drive) q Grey Scale Tracking Versus Brightness q InfraBlack Range Selection 1.3 or 1.8V (i.e: 26 or 36V in kit with STV95xx amplifier) q InfraBlack Offset Selection 0.4 to 2.2V (i.e: 115 to 80V in kit with STV95xx amplifiers) q OSD Mixing q Beam Current Attenuation (ABL) q Pedestral Clamping on Output Stage q Possibility of Light or Dark Grey OSD Background q OSD Contrast Control q Input Black Level Clamping with Built-in Clamping Pulse q 5 V to 8 V Power Supply q Perfectly matched with the STV95xx ST Amplifier Family q Preamplifier Control (bandwidth and stand-by) q Amplifier Control (bandwidth and stand-by), only applicable to amplifiers with CTL pin or STDBY pins. 2C DIP20 (Plastic Package) ORDER CODE: STV9211 The RGB incoming signals are amplified and shaped to drive in DC coupling the video amplifier without intermediate follower stages. One of the main advantages of ST devices is their ability to sink and source currents. These driving capabilities combined with an original output stage structure suppress any static current on the output pins and therefore reduce dramatically the power dissipation of the device. Extensive integration combined with high performance and advanced features make the STV9211 one of the best choice for any CRT monitor. Perfectly matched with the ST video amplifiers STV95xx, they offer a complete solution for high performance and cost-optimized Video Board Application. DESCRIPTION The STV9211 is an I2C Bus controlled RGB preamplifier designed for Monitor applications, able to mix the RGB signals coming from any OSD device. The usual Contrast, Brightness, Drive and Cut-Off (InfraBlack) Controls are provided. In addition, it includes the following features: - High resolution cut-off (InfraBlack) adjustment, - OSD contrast, - Bandwidth and stand-by control, - Brightness before/after Drive Selection. September 2003 Version 4.1 1/37 STV9211 Table of contents Chapter 1 1.1 1.2 Pin connection, pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Pin connection ...................................................................................................................... 5 Pin description ...................................................................................................................... 5 Chapter 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 2.16 2.17 2.18 2.19 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 RGB input, clamping function ...............................................................................................7 Fast blanking input ............................................................................................................... 8 Blanking input ....................................................................................................................... 8 Contrast adjustment (8 bits) ................................................................................................. 9 Brightness/Drive selection (1 bit) .........................................................................................9 Drive adjustment (3 x 8 bits) .............................................................................................. 10 Brightness adjustment (8 bits) ............................................................................................ 11 Cut-off adjustment, Infra-black level (Vib) (3x8 bits) .......................................................... 12 ABL Control ........................................................................................................................ 14 OSD ................................................................................................................................... 14 Output stage ....................................................................................................................... 16 Preamplifier bandwidth adjustment (4 bits) ........................................................................ 17 Amplifier bandwidth adjustment (7 bits) ............................................................................. 17 CRT cathode, DC-coupling mode (Figure 12) .................................................................... 18 Preamplifier stand-by mode ............................................................................................... 18 Amplifier stand-by mode .................................................................................................... 18 Serial interface ................................................................................................................... 19 Power-on reset ................................................................................................................... 19 Specific application conditions ........................................................................................... 20 Chapter 3 Chapter 4 Chapter 5 Chapter 6 Chapter 7 2/37 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 AC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 I2C electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 ADCS 7244743 STMicroelectronics Confidential STV9211 Chapter 8 Chapter 9 Chapter 10 10.1 10.2 10.3 10.4 I2C interface timing requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 I2C register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 STV9211 + STV9556/55/53 applications hints . . . . . . . . . . . . . . . . . . . . . . . . . .29 InfraBlack adjustment procedure (Cut-off) ......................................................................... 29 Preamplifier bandwidth register .......................................................................................... 31 Preamplifier output network ............................................................................................... 31 White balance adjustment ..................................................................................................31 Chapter 11 Chapter 12 Chapter 13 Internal schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Demonstration boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 ADCS 7244743 STMicroelectronics Confidential 3/37 STV9211 Revision follow-up Target specification December 2000 January 2001 January 2001 version 1.0 version 1.1 version 1.2 document created reformatted with ST new corporate template General update - replacement of some figures , - correction and addition of registers First ADCS release April 2001 version 1.3 General update - replacement of some figures , - correction of text, - addition of sections June 2001 version 1.4 General update and addition of: - chapter 10: Application hints, - chapter 11: Internal, schematics, - chapter 12: application boards Product preview October 2001 version 2.0 General update: - replacement of some figures, - addition of sections : cut-off adjustment..., - addition of figures (I2C, Cut-off adjustment) - TDA95xx salestype replaced with STV95xx Preliminary data December 2001 version 3.0 General update - figures replaced - Cut-off replaced with Infra-Black Datasheet January 2002 version 4.0 section 1.2: pin description modified for IN1, IN2, IN3, OSD1, OSD2, OSD3 and OUT1, OUT2, OUT3: replaced with video input, OSD input, Video output (channel 1, red), (channel 2, green), (channel 3, blue) respectively Block diagram replaced section 2.3 Blanking input added Section 2.8 - Cut-off adjustment: Tables 1 and 2 gathered into table 1 Section 2.12 - preamplifier bandwidth adjustment (4 bits) instead of 3 bits previously Chapter 10 - Application hints tables 9 and 10 replaced with table 1 Cross reference to AN1445 replaced with AN1510 February 2003 version 4.1 Text changed in section 2.2. Text changed and figure removed in section 2.3. 4/37 STV9211 Pin connection, pin description 1 1.1 PIN CONNECTION, PIN DESCRIPTION Pin connection Figure 1: STV9211 pin connection IN1 ABL IN2 AMPCTL IN3 GNDA VCCA OSD1 OSD2 OSD3 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 BLK HS OUT1 VCCP OUT2 GNDP OUT3 SDA SCL FBLK 1.2 1 2 3 4 Pin description Pin number symbol IN1 ABL IN2 AMPCTL description Video input (channel 1, red) ABL input Video input (channel 2, green) Amplifier control (bandwidth and stand-by). Only applicable with amplifiers with the CTL or STDBY pins. To be connected to ground if not used. Video input (channel 3, blue) Analog ground Analog supply (5V) OSD input (channel 1, red) OSD input (channel 2, green) OSD input (channel 3, blue) Fast blanking SCL SDA Video output (channel 3, blue) Power ground Video output (channel 2, green) Output stage supply (5 V to 8 V) Video output (channel 1, red) Horizontal synchro or BPCP pulse Blanking input 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 IN3 GNDA VCCA OSD1 OSD2 OSD3 FBLK SCL SDA OUT3 GNDP OUT2 VCCP OUT1 HS BLK 5/37 6/37 FBLK VCCA 7 3V (DC) PreAmplifier Stand-by R13-bit7 (I²C) Amplifier I²C OUT1 Drive 8-bit + Stage GND R13-bit6 15 GNDP BLK * Range: 1.3 & 1.8V * Offset (3-bit) * Adjustment (8-bit) InfraBlack Adjustment (**) (Cut-off) CTL or STDBY 18 Output HS VCCP 17 HS OCL Generator (*) BLK 11 BLK 19 20 BPCP (*) I²C Red Channel TDA95xx + + IN1 1 Contrast 8-bit EHT Pin connection, pin description Vref Brightness 8-bit IN2 3 Green Channel Blue Channel 16 OUT2 Figure 2: Block diagram IN3 5 14 OUT3 ABL 2 I²C Bus Decoder Amplifier control * Stand-by: On/Off * Bandwidth (3-bit) I²C 4 OSD Contrast 4-bit OSD Contrast 4-bit 9 OSD2 10 OSD3 OSD Contrast 4-bit AMPCTL TDA9211 12 SCL OSD1 8 13 6 GND SDA (*) See RGB input section for complete BPCP and OCL description (**) See Cut-off adjustment section for complete Cut-off register description STV9211 STV9211 Functional description 2 2.1 FUNCTIONAL DESCRIPTION RGB input, clamping function The three RGB inputs have to be supplied with a video signal (maximum peak-to-peak value = 1V) through coupling capacitors (100 nF typ.). The RGB inputs include a clamping function using the input serial capacitor as “memory capacitor”. To avoid the discharge of this capacitor during the line (due to leakage current), the input voltage is referenced to the ground. This clamping function is gated by the BPCP pulse (Black Porch Clamping Pulse) which is internally generated (see Figure 4). The Register 8 allows to choose the way to generate this BPCP (see Figure 3 and Figure 4). - Synchronization: - Polarity: HS or BLK signal (Register 8, bit0) Positive or negative (Automatic detection) when synchronized by HS Positive or negative ( programmed via Register 9, bit 0) when synchronized by BLK - see Note 1 - Edge: - Width: - Direct BPCP: Trailing or Leading (Register 8, bit1) From 0.33µs to 1.33µs (Register 8, bit2 and bit3) If the application provides the BPCP, one can program the direct connection between Pin 19 and the internal BPCP (Register 8, bit4) Note 1: When BPCP is synchronized by BLK, the leading edge of the BLK must be selected to get a proper synchronization. Figure 3: BPCP selection of synchronization edge Synchronization source Edge selection BPCP generation Trailing (R8, bit 1=0) HS (R8, bit 0=0) Leading (R8, bit 1=1) HS (Pin 19) Internal BPCP HS (Pin 19) Internal BPCP BLK (Pin 20) Internal BPCP BLK (R8, bit 0=1) Leading (R8, bit 1=0) HS (R8, bit 4=1) HS (Pin 19) _ Internal BPCP =HS 7/37 Functional description Figure 4: BPCP and OCL generation STV9211 BPCP Source Selection HS Edge Selection R8-bit1 R8-bit4 Source Selection Width Selection R8-bit0 R8-bit2 & bit3 BPCP Internal HS 1 External Automatic Polarity Edge Pulse Selection Generation BLK 20 External Polarity Selection Pulse Generation OCL Internal BLK Polarity Selection: R9-bit0 OCL source Selection: R8-bit7 2.2 Fast blanking input The fast blanking pin (FBLK) is TTL compatible. When it is at high level, the input signal is blanked and replaced by OSD insets defined by binary levels on three OSD inputs and a dedicated OSD contrast adjustment stage. 2.3 Blanking input The blanking input BLK is TTL compatible. The active level is either high (positive pulse polarity) or low (negative pulse polarity). When the level is active, the RGB outputs are at infra-black level, regardless of the input level. The pulse on the BLK input defines the timing of the internal OCL signal and it can also define the timing of the internal BPCP pulse. See Figure 4, Figure 11 and Chapter 9: I2C register description . 8/37 STV9211 Functional description 2.4 Contrast adjustment (8 bits) The contrast is adjusted simultaneously on, the 3 RGB channels via three internal amplifiers delivering a 48dB attenuation range (see Register 1, I2C table 1 and Figure 5). . Figure 5: Contrast adjustment BLK T Typ CR T= CR = ax m Output CRT = min Black level InfraBlack level Channel 3 channels Simultaneously Register min / max Adjustment name / address attenuation Contrast CRT / 01 0 / - 48 dB Number step / resolution 256 (8 bit) / 0,19 dB 2.5 Brightness/Drive selection (1 bit) The brightness position is selectable by I2C (Register 13, bit6. See I2C table 4). There are 2 cases: bit6=0 The brightness is located before the Drive (as for the TDA9210). The advantage is to keep the “White balance” tracking when changing the brightness level. bit6=1 The brightness is located after the Drive. The advantage is to perform the “White balance” tracking faster (typically one adjustment less than in the previous case) 9/37 Functional description STV9211 2.6 Drive adjustment (3 x 8 bits) In order to perform the “White balance” adjustment, the gain of the three RGB signals are adjustable separately via the three Drive amplifiers (Registers 3, 4 and 5, I2C table 1). The very large range of the Drives (48 dB) allows different standards or custom color temperatures. It can also be used to adjust the output voltages at the optimum amplitude to drive the CRT drivers, keeping the whole contrast control for the end-user only. Figure 6: Drive adjustment BLK Case #1: Brightness before Drive Register 13, b6=0 Output V DR ax =m V= DR Typ DRV = min Black levels InfraBlack level Case #2: Brightness after Drive Register 13, b6=1 V DR yp =T RV D ax =m Output DRV = min Black level InfraBlack level Channel each channel Independantly Register Adjustment name / address Drive DRV / 03, 04, 05 min / max Number step / resolution Attenuation 0 / - 48 dB 256 (8 bit) / 0,19 dB 10/37 STV9211 Functional description 2.7 Brightness adjustment (8 bits) Brightness adjustment is controlled by Register 2 (I2C table 1). It consists of adding the same DC voltage (BRT) to the three RGB signals. This DC voltage can be adjusted between 0 and 2V, outside the blanking pulse with 8mV adjustment steps (see Figure 7). Inside the blanking pulse the DC output level is forced to the “Infra Black” level (Vib). Figure 7: Brightness adjustment BLK BRT max 2V BRT min Insertion pulse: VIP (*) 0.4V Vib GND Black levels InfraBlack level (*) The Insertion pulse VIP is present only in “Brightness before Drive” mode Register name / address min / max Value 0/2V Adjustment Number step / resolution Channel 3 channels simultaneously Brightness BRT / 02 256 (8 bit) / 8mV 11/37 Functional description STV9211 2.8 Cut-off adjustment, Infra-black level (Vib) (3x8 bits) The Infra-black level (Vib) is the output voltage during the blanking time (BLK). This level is sampled after each line (sample - and - hold block) during an internal pulse (OCL) which is generated during the blanking pulse (see Figure 4). The STV9211 allows to adjust independantly the cut-off levels of the 3 video outputs with a high resolution. This is done via 3 registers (IBR, IBO and IBL) programming respectively: q q q the range: 1.3 or 1.8V (i.e: 26 or 36V in kit with the STV95xx amplifiers) the offset (to keep the video signal inside thelinear area) the level. Infra-black range register (IBR: Register 14, bit 0. See I²C table 6) This register must be selected first, either to 1.3V to get a 26V Cut-off adjustment range with the STV95xx amplifier or to 1.8V to get a 36V range (see Figure 8 ) Infra-black offset register (IBO: Register 14, bit 1, 2 & 3. See I²C table 6) This register select the Vib offset. It allows to keep the video signal inside the linearity area of the amplifier. The value of this register depends on the amplifier high voltage supply (Vdd). In kit with the STV95xx amplifier family, we recommend the following programming: Table 1: Setting of the infra-black offset register (IBO) Case 1: Vdd (±5%) Brightness before Drive Binary 112 to 115V 107 to 111V 102 to 106V 97 to 101V 92 to 96V 88 to 91 87 and below 001 010 011 100 101 110 111 Decimal 1 2 3 4 5 6 7 Case 2: Brightness after Drive Binary 011 100 101 110 111 111 111 Decimal 3 4 5 6 7 7 7 Example: For Vdd=101V +/-5% and Brightness before Drive, IBO must be set to 100. Infra-black level register (IBL: Register 10, 11, 12. See I²C table 1) These three 8 bit- registers adjust independantly the infra-black level of the 3 outputs with a high resolution (typically 100mV at 26V range or 140mV at 36V range). 12/37 STV9211 Functional description Figure 8: Infra-black level adjustment BLK IBL max Black level Infra-black level Vibmax IBL min Vibmin GND Case #1: IBR=1 Case #2: IBR=0 1 11 0= IB Vib 2,20 111 IB0= Vib 2,20 0.92 0.66 0.40 0 010 IB0= 1 =00 IB0 0 =00 IB0 1.3V 0.92 0.66 0.40 IBL 0 10 =0 B0 001 I 0= IB =000 0 IB 1.8V 255 255 IBL Adjustment InfraBlack Range InfraBlack Offset Register name & address IBR / 14 IBO / 14 Selection min / max value 1.3 or 1.8 V 0.4 to 2.2 V (@ IBL=0) 0.40 to 1.70V Number step / resolution 2 selections 16 (3 bit) / 0.26V Channel 3 channels Simultaneously 3 channels Simultaneously Examples #1 IBR=1 IB0=000 256 (8 bit) / 5 mV each channel Independantly InfraBlack Level IBL / 10, 11, 12 Examples #2 IBR=0 IB0=010 0.92 to 2.72 V 256 (8 bit) / 7mV 13/37 Functional description STV9211 2.9 ABL Control The STV9211 includes an ABL (automatic beam limitation) input to attenuate the RGB Video signals depending on the beam intensity. The operating range is 2 V (from 3 V to 1 V). A typical 15 dB maximum attenuation is applied to the output signal whatever the contrast adjustment is. (See Figure 9). When not used, the ABL input (Pin 2) must be connected to a 5 V supply voltage. Figure 9: ABL attenuation range Attenuation (dB) 0 -2 -4 -6 -8 -10 -12 -14 -16 2 0 1 VABL (V) 3 4 5 2.10 OSD Principle The STV9211 allows to mix the OSD signals into the RGB main picture. The four pins dedicated to this function are the following: q Three TTL RGB inputs (Pins 8, 9, 10) connected to the three outputs of the corresponding OSD processor. One TTL fast blanking input (Pin 11) also connected to the FBLK output of the OSD processor. q When a high level is present on the FBLK, the IC acts as follows: q The three main picture RGB input signals (IN1, IN2, IN3) are internally switched to an internal clamp reference voltage. The three output signals (OUT1, OUT2, OUT3) are set to the voltage corresponding to the three OSD input logic states (0 or 1). (See Figure 2: Block diagram). q Output level If the OSD input is set to 0, the output is set to the black level (see Figure 10). If the OSD input is at high level, the output voltage is set to: black-level + VOSD, where VOSD is the I2C bus-controlled voltage, adjustable between 0 V to 4.9 V by 306 mV steps via Register 7 (4 bits). The same variation is applied simultaneously to the three channels providing the OSD contrast. 14/37 STV9211 Grey OSD Functional description The STV9211 allows the display of grey OSD by programming the following conditions: q q OSD1 = 1, OSD2 = 0 and OSD3 = 1, Register 9, bit 5 or 6 = 1. If Register 9, bit 5 =1: a light grey OSD is displayed. If Register 9, bit 6 = 1: a dark grey OSD is displayed. If Register 9, bit 5=0 and bit 6=0: a standard OSD is displayed. Figure 10: OSD Video IN BLK OSD signals FBLK OSD In 4.9V OSD max OSD typ VOSD Video OUT OSD min black level infra-black level GND Adjustment Register name / address min / max Value 0 / 4.9 V (*) Number step / resolution Channel 3 channels simultaneously OSD Contrast OSD / 09 16 (4 bit) / 306mV (*) 4.9V is the max OSD level at Drive max (DRV=254) 15/37 Functional description STV9211 2.11 Output stage The overall waveforms of the output signal are shown in Figure 11. The three output stages are large bandwidth output amplifiers able to deliver up to 4.4 V PP for 0.7 VPP video signal. When a high level is applied on the BLK input (Pin 20), the three outputs are forced to “Infra Black” level (Vib) thanks to a sample and hold circuit (described below). The black level is the output voltage outside the blanking pulse when no video input signal is available (see Figure 11 ). Figure 11: Signal waveforms Typical Input signals Typical Internal signals OSD signals BLK HS (Pin 19) BPCP OCL Video IN FBLK OSD IN Video OUT black-level Infra-black level 16/37 STV9211 Functional description 2.12 Preamplifier bandwidth adjustment (4 bits) An advanced feature: preamplifier bandwidth adjustment (BW: Register 13, see I 2C table 5), is implemented on the STV9211. The programming of this BW register is very important to get good video performances. It must not be set its maximum value. With the following values, the optimum performances are obtained. Preamplifier bandwidth register: BW tR/tF Binary 5.5 ± 1 ns 7.5 ± 1ns 9.5 ± 1ns 10 ns and below 1000 0101 0010 0000 Decimal 8 5 2 0 For applications where rise/fall time