STW12N170K5

STW12N170K5 Datasheet N-channel 1700 V, 2.3 Ω typ., 5 A, MDmesh™ K5 Power MOSFET in a TO‑247 package Features 2 1 3 TO-247 D(2, TAB) Order code VDS RDS(on) max. ID PTOT STW12N170K5 1700 V 2.9 Ω 5A 250 W • Industry’s lowest RDS(on) x area • • • • Industry’s best FoM (figure of merit) Ultra-low gate charge 100% avalanche tested Zener-protected Applications • Switching applications G(1) Description S(3) AM01475V1 This very high voltage N-channel Power MOSFET is designed using MDmesh™ K5 technology based on an innovative proprietary vertical structure. The result is a dramatic reduction in on-resistance and ultra-low gate charge for applications requiring superior power density and high efficiency. Product status link STW12N170K5 Product summary Order code STW12N170K5 Marking 12N170K5 Package TO-247 Packing Tube DS12847 - Rev 1 - November 2018 For further information contact your local STMicroelectronics sales office. www.st.com STW12N170K5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Symbol Value Unit ±30 V Drain current at TC = 25 °C 5 A Drain current at TC = 100 °C 3 A IDM(1) Drain current (pulsed) 10 A PTOT Total power dissipation at TC = 25 °C 250 W dv/dt(2) Peak diode recovery voltage slope 4.5 V/ns dv/dt(3) MOSFET dv/dt ruggedness 50 V/ns -55 to 150 °C Value Unit VGS ID TJ Tstg Parameter Gate-source voltage Operating junction temperature range Storage temperature range 1. Pulse width limited by safe operating area 2. ISD ≤ 5 A, di/dt ≤ 100 A/µs, VDS(peak) ≤ V(BR)DSS 3. VDS ≤ 1360 V Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case 0.5 °C/W Rthj-amb Thermal resistance junction-amb 50 °C/W Value Unit 1.7 A 1000 mJ Table 3. Avalanche characteristics Symbol IAR(1) (2) EAS Parameter Maximum current during repetitive or single pulse avalanche Single pulse avalanche energy 1. Pulse width limited by TJmax 2. Starting TJ = 25 °C, ID = IAR, VDD = 50 V DS12847 - Rev 1 page 2/14 STW12N170K5 Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage VGS = 0 V, ID = 1 mA Min. Typ. 1700 Zero gate voltage drain current 1 µA 50 µA ±10 µA 4 5 V 2.3 2.9 Ω Min. Typ. Max. Unit - 1380 - pF - 73 - pF - 2.7 - pF - 65 - pF - 26 - pF VGS = 0 V, VDS = 1700 V, TC = 125 °C(1) IGSS Gate body leakage current VDS = 0, VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 2.5 A Unit V VGS = 0 V, VDS = 1700 V IDSS Max. 3 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr)(1) Co(er)(2) Time-related equivalent capacitance Energy-related equivalent capacitance Test conditions VGS = 0 V, VDS = 100 V, f = 1 MHz VDS = 0 V to 1360 V, VGS = 0 V RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 3.8 - Ω Qg Total gate charge VDD = 1360 V, ID = 5 A - 37 - nC Qgs Gate-source charge VGS = 0 to 10 V - 10 - nC Gate-drain charge (see Figure 15. Test circuit for gate charge behavior) - 19 - nC Qgd 1. This parameter is defined as a constant equivalent capacitance giving the same charging time as COSS when VDS increases from 0 to 80% VDSS. 2. This parameter is defined as a constant equivalent capacitance giving the same stored energy as COSS when VDS increases from 0 to 80% VDSS. Table 6. Switching times Symbol td(on) tr td(off) tf DS12847 - Rev 1 Parameter Min. Typ. Max. Unit VDD = 850 V, ID = 2.5 A, - 22 - ns Rise time RG = 4.7 Ω, VGS = 10 V - 7 - ns Turn-off delay time (see Figure 14. Test circuit for resistive load switching times and Figure 19. Switching time waveform) - 74 - ns - 51 - ns Turn-on delay time Fall time Test conditions page 3/14 STW12N170K5 Electrical characteristics Table 7. Source drain diode Symbol ISD ISDM (1) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 5 A Source-drain current (pulsed) - 10 A 1.5 V Forward on voltage ISD = 5 A, VGS = 0 V - trr Reverse recovery time ISD = 5 A, VDD = 60 V, - 350 ns Qrr Reverse recovery charge di/dt = 100 A/µs - 3.91 µC Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 22.3 A Reverse recovery time ISD = 5 A,VDD = 60 V, - 481 ns Reverse recovery charge di/dt = 100 A/µs, TJ = 150 °C - 5.07 µC Reverse recovery current (see Figure 16. Test circuit for inductive load switching and diode recovery times) - 21.0 A Min. Typ. VSD IRRM trr Qrr IRRM 1. Pulsed: pulse duration = 300µs, duty cycle 1.5% Table 8. Gate-source Zener diode Symbol V(BR)GSO Parameter Gate-source breakdown voltage Test conditions IGS = ±1 mA, ID = 0 A 30 Max. - Unit V The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device. The Zener voltage facilitates efficient and cost-effective device integrity protection, thus eliminating the need for additional external componentry. DS12847 - Rev 1 page 4/14 STW12N170K5 Electrical characteristics (curves) Operation in this area 2.1is limited by R Electrical characteristics (curves) DS(on) Figure 1. Safe operating area ID (A) Figure 2. Thermal impedance GADG191120181151SOA 10 1 tp =10 µs Operation in this area is limited by RDS(on) tp =100 µs tp =1 ms 10 0 tp =10 ms Single pulse, TC = 25 °C, TJ ≤ 150 °C, VGS = 10 V 10 -1 10 -1 10 0 10 1 10 2 VDS (V) 10 3 Figure 3. Output characteristics ID (A) 8 Figure 4. Transfer characteristics ID (A) 8 GADG191120181130OCH VGS = 9, 10 V VGS = 8 V 7 6 7 5 4 4 3 3 2 2 VGS = 6 V 1 0 0 6 12 18 24 1 30 VDS (V) Figure 5. Gate charge vs gate-source voltage VDS (V) GADG191120181138QVG VGS VDD = 1360 V, ID = 5 A VDS 1200 (V) 12 Qg 1000 Qgd 8 600 6 400 4 200 2 DS12847 - Rev 1 0 2 3 4 5 6 7 8 9 VGS (V) Figure 6. Static drain-source on-resistance RDS(on) (Ω) GADG191120181132RID VGS = 10 V 2.40 10 800 0 0 VDS = 20 V 6 VGS = 7 V 5 GADG211120180929TCH 6 12 18 24 30 36 0 Qg (nC) 2.35 2.30 2.25 2.20 0 1 2 3 4 5 ID (A) page 5/14 STW12N170K5 Electrical characteristics (curves) Figure 7. Normalized gate threshold voltage vs temperature VGS(th) (norm.) RDS(on) (norm.) GADG191120181133VTH GADG191120181133RON VGS = 10 V 2.2 ID = 100 µA 1.1 Figure 8. Normalized on-resistance vs temperature 1.8 1.0 1.4 0.9 1.0 0.8 0.6 0.7 0.6 -75 -25 25 75 125 Tj (°C) Figure 9. Normalized V(BR)DSS vs temperature V(BR)DSS (norm.) -25 25 75 ID = 1 mA 125 Tj (°C) Figure 10. Source-drain diode forward characteristics VSD (V) GADG191120181133BDV 1.08 0.2 -75 GADG191120181131SDF 1.0 TJ = -50 °C 1.04 0.9 1.00 0.8 0.96 0.7 0.92 0.6 0.88 -75 -25 25 75 125 Tj (°C) TJ = 150 °C 0.5 1 2 3 4 ISD (A) Figure 12. Maximum avalanche energy vs TJ Figure 11. Capacitance variations C (pF) TJ = 25 °C EAS (mJ) GADG201120181046CVR GADG201120181049EAS 1000 10 4 CISS 10 3 800 600 10 2 400 f = 1 MHz COSS 10 1 CRSS 10 0 10 -1 DS12847 - Rev 1 10 0 10 1 10 2 10 3 VDS (V) 200 Single pulse, ID = 1.7 A, VDD = 50 V 0 -50 0 50 100 TJ (°C) page 6/14 STW12N170K5 Electrical characteristics (curves) Figure 13. Output capacitance stored energy EOSS (µJ) GADG201120181049EOS 30 20 10 0 0 DS12847 - Rev 1 400 800 1200 1600 VDS (V) page 7/14 STW12N170K5 Test circuits 3 Test circuits Figure 14. Test circuit for resistive load switching times Figure 15. Test circuit for gate charge behavior VDD RL RL 2200 + μF 3.3 μF VDD VD RG VGS IG= CONST VGS + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v10 AM01468v1 Figure 16. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A L A VD 100 µH fast diode B B B 3.3 µF D G + Figure 17. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 19. Switching time waveform Figure 18. Unclamped inductive waveform ton V(BR)DSS td(on) toff td(off) tr tf VD 90% 90% IDM VDD 10% 0 ID VDD AM01472v1 VGS 0 VDS 10% 90% 10% AM01473v1 DS12847 - Rev 1 page 8/14 STW12N170K5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DS12847 - Rev 1 page 9/14 STW12N170K5 TO-247 package information 4.1 TO-247 package information Figure 20. TO-247 package outline 0075325_9 DS12847 - Rev 1 page 10/14 STW12N170K5 TO-247 package information Table 9. TO-247 package mechanical data Dim. mm Min. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 DS12847 - Rev 1 Typ. 5.45 5.60 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 page 11/14 STW12N170K5 Revision history Table 10. Document revision history DS12847 - Rev 1 Date Version 20-Nov-2018 1 Changes First release. page 12/14 STW12N170K5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 4.1 TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 DS12847 - Rev 1 page 13/14 STW12N170K5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS12847 - Rev 1 page 14/14