TM8050H-8W
Datasheet
80 A 800 V high temperature thyristor (SCR) in TO-247 package
Features
A
G
K
TAB = A
K
A
G
TO-247 uninsulated
•
High junction temperature: Tj = 150 °C
•
Blocking voltage: VDRM = VRRM = 800 V
•
Nominal current: IT(RMS) = 80 A
•
Gate triggering current: IGT max. = 50 mA
•
•
•
High noise immunity: dV/dt > 1 kV/µs
Through hole package TO-247
Increase of thermal margin due to extended Tj up to 150 °C
•
Low ID and IR in blocking state
•
Ecopack2 (includes halogen free & RoHS compliance)
Applications
•
•
•
•
•
•
•
Product status link
TM8050H-8W
Product summary
IT(RMS)
80 A
VDRM/VRRM
800 V
IGT
50 mA
Tj
150 °C
AC-DC rectifier controlled bridge
Variable speed motor drive
Battery charging system
AC solid state relay
By pass switch of UPS
Industrial welding systems
Motor soft starter systems
Description
Available in through hole package TO-247, the TM8050H-8W is an 800 V SCR
thyristor suitable for applications where high power switching (IT(RMS) = 80 A) and low
power dissipation (VTM = 1.55 V at 160 A) are key features. These features make it
ideal for motorbike voltage regulator, by-pass AC switch, controlled rectifier bridge,
solid state relay, battery charger, welding equipment and motor driver applications.
DS11583 - Rev 2 - August 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
TM8050H-8W
Characteristics
1
Characteristics
Table 1. Absolute ratings (limiting values)
Symbol
IT(RMS)
Parameter
RMS on-state current (180 ° conduction angle)
IT(AV)
Average on-state current (180 ° conduction angle)
ITSM
Non repetitive surge peak on-state current, VR = 0 V
I2t
VRRM / VDRM
TC = 126 °C
tp = 8.3 ms
tp = 10 ms
Unit
80
A
50
A
731
Tj initial = 25 °C
670
Tj = 25 °C
I2t value for fusing
Value
Maximum repetitive symmetric blocking voltage
A
2245
A2s
800
V
dl/dt
Critical rate of rise of on-state current
IG = 2 x IGT , tr ≤ 100 ns
f = 50 Hz
Tj = 25 °C
200
A/µs
IGM
Peak gate current
tp = 20 µs
Tj = 150 °C
8
A
Tj = 150 °C
1
W
PG(AV)
Average gate power dissipation
VRGM
Maximum peak reverse gate voltage
5
V
Tstg
Storage junction temperature range
-40 to +150
°C
Maximum operating junction temperature
-40 to +150
°C
Tj
Table 2. Electrical characteristics (Tj = 25 °C unless otherwise specified)
Symbol
Test Conditions
Value
Unit
Min.
2.5
Max.
50
Max.
1.5
V
Min.
0.2
V
IT = 500 mA, gate open
Max.
100
mA
IL
IG = 1.2 x IGT
Max.
125
mA
tgt
IT = 80 A, VD = VDRM, IG = 200 mA, dIG/dt = 0.2 A/µs
Typ.
3
µs
IGT
VD = 12 V, RL = 33 Ω
VGT
VD = 12 V, RL = 33 Ω
VGD
VD = VDRM, RL = 3.3 kΩ
IH
dV/dt
tq
Tj = 150 °C
mA
VD = 67 % VDRM, gate open
Tj = 150 °C
Min.
1000
V/µs
IT = 33 A, dIT/dt = 10 A/µs, VR = 75 V, VD = 400 V, dVD/dt =
20 V/µs, tP = 100 µs
Tj = 150 °C
Max.
150
µs
Table 3. Static characteristics
Symbol
Value
Unit
VTM
ITM = 160 A, tp = 380 µs
Tj = 25 °C
Max.
1.55
VTO
On state threshold voltage
Tj = 150 °C
Max.
0.85
RD
On state dynamic resistance
Tj = 150 °C
Max.
5.5
mΩ
Tj = 25 °C
Max.
20
µA
Tj = 150 °C
Max.
2.5
mA
IDRM
IRRM
DS11583 - Rev 2
Test conditions
VD = VDRM = VR = VRRM = 800 V
V
page 2/10
TM8050H-8W
Characteristics
Table 4. Thermal parameters
Symbol
DS11583 - Rev 2
Parameter
Rth(j-c)
Junction to case (DC,max.)
Rth(j-a)
Junction to ambient DC (typ.)
Value
0.30
50
Unit
°C/W
page 3/10
TM8050H-8W
Characteristics (curves)
1.1
Characteristics curves
Figure 1. Maximum average power dissipation versus
average on-state current
Figure 2. Average and DC on-state current versus case
temperature
P(W)
90
IT(AV) (A)
D.C
α = 180 °
80
80
α = 120 °
α = 90°
70
70
α = 60 °
α = 60°
60
60
α = 30 °
50
50
40
40
30
30
D.C
α = 180 °
α = 120 °
α = 30 °
20
20
10
10
IT(AV) (A)
Tc (°C)
0
0
0
5
10
15
20
25
30
35
40
45
50
55
60
0
65
Figure 3. Average and D.C. on state current versus
ambient temperature
4.5
α = 90 °
IT(AV) (A)
25
50
75
100
125
150
Figure 4. On-state characteristics (maximum values)
ITM(A)
1000
4.0
3.5
D.C
100
3.0
2.5
α = 180 °
2.0
1.5
10
1.0
0.5
VTM (V)
0.0
0
25
50
75
100
125
1
150
Figure 5. Relative variation of thermal impedance junction
to case and junction to ambient versus pulse duration
1.0E+00
Tj max :
VTO = 0.85 V
Rd = 5.5m Ω
Tj = 25 °C
Tj = 150 °C
TA (°C)
0.0
1.0
2.0
3.0
4.0
Figure 6. Relative variation of gate trigger current and
gate voltage versus junction temperature
K = [Zth/Rth]
2.0
IGT, VGT[Tj] / IGT, VGT[Tj = 25 °C]
Zth(j -c)
Zth(j -a)
IGT
1.5
1.0E-01
1.0
VGT
0.5
Tj(°C)
tp(s)
1.0E-02
1.0E-03
DS11583 - Rev 2
0.0
1.0E-02
1.0E-01
1.0E+00
1.0E+01
1.0E+02
1.0E+03
-50
-25
0
25
50
75
100
125
150
page 4/10
TM8050H-8W
Characteristics (curves)
Figure 7. Relative variation of holding current and
latching current versus junction temperature (typical
values)
2.0
Figure 8. Surge peak on state current versus number of
cycles
IH, IL[Tj]/ IH, IL[Tj = 25 °C]
750
ITSM(A)
700
650
1.8
600
550
IH
1.5
VR = 0 V
Non repetitive
Tj initial = 25 °C
500
450
1.3
400
IL
1.0
350
300
Repetitive
Tc = 126 °C
250
0.8
200
150
0.5
100
0.3
Number of cycles
50
Tj(°C)
0.0
0
1
-50
-25
0
25
50
75
100
125
Figure 9. Non repetitive surge peak on state current for a
half cycle sine pulse versus pulse width tp < 10 ms
dI/dt limitation: 200 A/µs
100
1000
Figure 10. Relative variation of leakage current versus
junction temperature for different values of blocking
voltage
ITSM(A)
10000
10
150
1.0E+00
Tj initial = 25 °C
VR = 0 V
IDRM, IRRM[Tj; VDRM, VRRM]/ IDRM, IRRM[150°C; 800 V]
VDRM = VRRM = 800 V
(maximum values)
ITSM
1.0E-01
1000
1.0E-02
VDRM = VRRM = 800 V
1.0E-03
100
(typical values)
VDRM = VRRM = 600 V
1.0E-04
(typical values)
tP(ms)
Tj(°C)
10
0.01
0.10
1.00
1.0E-05
10.00
25
50
75
100
125
150
Figure 11. Relative variation of static dV/dt immunity versus junction temperature (typical values)
5
dV/dt[Tj]/dV/dt[Tj = 150 °C]
VD = 0.67 x VDRM
4
3
2
1
Tj(°C)
0
10
DS11583 - Rev 2
30
50
70
90
110
130
150
page 5/10
TM8050H-8W
Package information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
2.1
TO-247 package information
•
•
•
Epoxy meets UL 94,V0
Recommended torque value: 0.8 N·m
Maximum torque value: 1 N·m
Figure 12. TO-247 package outline
0075325_9
DS11583 - Rev 2
page 6/10
TM8050H-8W
TO-247 package information
Table 5. TO-247 package mechanical data
Dimensions
Dim.
Inches(1)
Millimeters
Min.
Typ.
Max.
Min.
Typ.
Max.
A
4.85
5.15
0.1909
0.2028
A1
2.20
2.60
0.0866
0.1024
b
1.0
1.40
0.0394
0.0551
b1
2.0
2.40
0.0787
0.0945
b2
3.0
3.40
0.1181
0.1339
c
0.40
0.80
0.0157
0.0315
D(2)
19.85
20.15
0.7815
0.7933
E
15.45
15.75
0.6083
0.6201
e
5.30
5.60
0.2087
L
14.20
14.80
0.5591
0.5827
L1
3.70
4.30
0.1457
0.1693
L2
5.45
18.50
ØP(3)
3.55
ØR
4.50
S
5.30
5.50
0.2146
0.2205
0.7283
3.65
0.1398
5.50
0.1772
5.70
0.2087
0.1437
0.2165
0.2165
0.2244
1. Inch dimensions given only for reference
2. Dimension D plus gate protrusion does not exceed 20.5 mm
3. Resin thickness around the mounting hole is not less than 0.9 mm
DS11583 - Rev 2
page 7/10
TM8050H-8W
Ordering information
3
Ordering information
Figure 13. Ordering information scheme
TM
80
50
H - 8
W
Series
Thyristor
RMS current
80 = 80 A
IGT current
50 = 50 mA
Maximum junction temperature
H = 150 °C
Voltage
8 = 800 V
Package
W = TO-247
Table 6. Ordering information
DS11583 - Rev 2
Order code
Marking
Package
Weight
Base qty.
Delivery mode
TM8050H-8W
TM8050H8
TO-247
4.43 g
30
Tube
page 8/10
TM8050H-8W
Revision history
Table 7. Document revision history
DS11583 - Rev 2
Date
Revision
Changes
03-May-2016
1
Initial release.
08-Aug-2019
2
Updated Table 1, Figure 8 and Figure 9. Minor text change.
page 9/10
TM8050H-8W
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© 2019 STMicroelectronics – All rights reserved
DS11583 - Rev 2
page 10/10
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