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TSM1012AID

TSM1012AID

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOIC8

  • 描述:

    IC VREF SERIES 0.5% 8SO

  • 数据手册
  • 价格&库存
TSM1012AID 数据手册
TSM1012 Low consumption voltage and current controller for battery chargers and adapters Datasheet - production data Description The TSM1012 is a highly integrated solution for SMPS applications requiring the CV (constant voltage) and CC (constant current) mode. % 40 QMBTUJD QBDLBHF TheTSM1012 device integrates one voltage reference and two operational amplifiers (with ORed outputs - common collectors). Features  Constant voltage and constant current control  Low consumption  Low voltage operation  Low external component count  Current sink output stage The voltage reference combined with one operational amplifier makes it an ideal voltage controller. The other operational amplifier, combined with few external resistors and the voltage reference, can be used as a current limiter. Figure 1. Pin connections (top view)  Easy compensation  High ac mains voltage rejection   Voltage reference – Fixed output voltage reference 1.25 V – 0.5% and 1% voltage precision 7SFG 7$$   7 7   Applications $$ 0VU $$ $$ (/%   $7 $7  Adapters 7  Battery chargers ". Table 1. Order codes Part number Temperature range TSM1012I -40 to 105 °C TSM1012AI -40 to 105 °C Package D(1) • • Vref (%) Marking 1 M1012 0.5 M1012A 1. D = “Small Outline” package (SO) - also available in tape and reel (DT). April 2016 This is information on a product in full production. DocID10124 Rev 2 1/14 www.st.com Contents TSM1012 Contents 1 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5 Internal schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 Principle of operation and application hints . . . . . . . . . . . . . . . . . . . . . 7 6.1 7 2/14 6.1.1 Voltage control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.1.2 Current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.2 Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6.3 Start-up and short-circuit conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 6.4 Voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7.1 8 Voltage and current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DocID10124 Rev 2 TSM1012 1 Pin descriptions Pin descriptions Table 2. SO-8 pinout 2 Name Pin no. Type Function VRef 1 Analog output Voltage reference CC- 2 Analog input Input pin of the operational amplifier CC+ 3 Analog input Input pin of the operational amplifier CV- 4 Analog input Input pin of the operational amplifier CV+ 5 Analog input Input pin of the operational amplifier GND 6 Power supply Ground line. 0 V reference for all voltages. OUT 7 Analog output Output of the two operational amplifiers VCC 8 Power supply Power supply line Absolute maximum ratings Table 3. Absolute maximum ratings Symbol VCC Vi 3 DC supply voltage Value Unit DC supply voltage (50 mA =< ICC) -0.3 V to Vz V Input voltage -0.3 to VCC V Tstg Storage temperature -55 to 150 °C Tj Junction temperature 150 °C Iref Voltage reference output current 2.5 mA ESD Electrostatic discharge 2 kV Rthja Thermal resistance junction to ambient SO-8 package 175 °C/W Operating conditions Table 4. Operating conditions Symbol Parameter Value Unit VCC DC supply conditions 4.5 to Vz V Toper Operational temperature -40 to 105 °C DocID10124 Rev 2 3/14 14 Electrical characteristics 4 TSM1012 Electrical characteristics Tamb = 25 °C and VCC = +18 V (unless otherwise specified). Table 5. Electrical characteristics Symbol Parameter Test condition Min. Typ. Max. Unit 180 µA Total current consumption ICC Total supply current, excluding current in voltage reference(1). VCC = 18 V, no load Tmin. < Tamb < Tmax. 100 Vz VCC clamp voltage ICC = 50 mA 28 V Operators Vio Input offset voltage TSM1012 Tamb = 25 °C Tmin.  Tamb  Tmax. Tamb = 25 °C Tmin.  Tamb Tmax. TSM1012A DVio 1 0.5 Input offset voltage drift 4 5 2 3 mV V/°C 7 Iio Input offset current Tamb = 25 °C Tmin.  Tamb  Tmax. 2 30 50 nA Iib Input bias current Tamb = 25 °C Tmin.  Tamb  Tmax. 20 50 150 200 nA SVR Supply voltage rejection ration VCC = 4.5 V to 28 V Vicm Input common mode voltage range CMR Common mode rejection ratio 65 100 0 Tamb = 25 °C Tmin.  Tamb  Tmax. 70 60 0.5 dB VCC -1.5 85 V dB Output stage Gm Transconduction gain. sink current only(2) Tamb = 25 °C Tmin.  Tamb  Tmax. Vol Low output voltage at 5 mA sinking current Tmin.  Tamb  Tmax. Ios Output short-circuit current. Output to (VCC - 0.6 V). Sink current only. Tamb = 25 °C Tmin.  Tamb  Tmax. 1 1 250 6 5 mA/mV 400 10 mV mA Voltage reference Vref Reference input voltage TSM1012 1% precision Tamb = 25 °C Tmin.  Tamb  Tmax. Tamb = 25 °C Tmin.  Tamb  Tmax. TSM1012A 0.5% precision Vref 4/14 Reference input voltage deviation over the temperature range Tmin.  Tamb  Tmax. DocID10124 Rev 2 1.238 1.25 1.225 1.244 1.25 1.237 20 1.262 1.273 1.256 1.261 V 30 mV TSM1012 Electrical characteristics Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit RegLine Reference input voltage deviation over the VCC Iload = 1 mA range. 20 mV RegLoad Reference input voltage deviation over the output current. 10 mV VCC = 18 V, 0 < Iload < 2.5 mA 1. Test conditions: pin 2 and 6 connected to GND, pin 4 and 5 connected to 1.25 V, pin 3 connected to 200 mV. 2. The current depends on the difference voltage between the negative and the positive inputs of the amplifier. If the voltage on the minus input is 1 mV higher than the positive amplifier, the sinking current at the output OUT will be increased by Gm x 1 mA. DocID10124 Rev 2 5/14 14 Internal schematics 5 TSM1012 Internal schematics Figure 2. Internal schematic 7$$   7SFG 7  7 $7 $7  0VU  $$ $$  $$  (/%  $7  ". Figure 3. Typical adapter or battery charger application using TSM1012 3MJNJU 0QUPDPVQMFS TFDPOEBSZTJEF % 065 54.  $ O' 7$$  3 7SFG 7 7 $7 $7  0VU 3 3WD $WD O'  $ 3 $ 18. DPOUSPMMFS $$ $ $$  3 0QUPDPVQMFS QSJNBSZTJEF $$  (/% 3JD % 3TFOTF  $7 $JD O'  3 3JD  065 ". In the application schematic shown in Figure 3, the TSM1012 device is used on the secondary side of a flyback adapter (or battery charger) to provide accurate control of the voltage and current. The above feedback loop is made with an optocoupler. 6/14 DocID10124 Rev 2 TSM1012 Principle of operation and application hints 6 Principle of operation and application hints 6.1 Voltage and current control 6.1.1 Voltage control The voltage loop is controlled via a first transconductance operational amplifier, the resistor bridge R1, R2, and the optocoupler which is directly connected to the output. The relation between the values of the R1 and R2 should be chosen as written in Equation 1. Equation 1 R1 = R2 x Vref / (Vout - Vref) Where Vout is the desired output voltage. To avoid the discharge of the load, the resistor bridge R1, R2 should be highly resistive. For this type of application, a total value of 100 K (or more) would be appropriate for the resistors R1 and R2. As an example, with R2 = 100 K, Vout = 4.10 V, Vref = 1.210 V, then R1 = 41.9 K. Note: If the low drop diode should be inserted between the load and the voltage regulation resistor bridge to avoid current flowing from the load through the resistor bridge, this drop should be taken into account in Equation 1 by replacing Vout by (Vout + Vdrop). 6.1.2 Current control The current loop is controlled via the second transconductance operational amplifier, the sense resistor Rsense, and the optocoupler. The Vsense threshold is achieved externally by a resistor bridge tied to the Vref voltage reference. Its middle point is tied to the positive input of the current control operational amplifier, and its foot is to be connected to the lower potential point of the sense resistor as shown in Figure 4. The resistors of this bridge are matched to provide the best precision possible. The control equation verifies: Equation 2 Rsense x Ilim = Vsense Vsense = R5 x Vref / (R4 + R5) Equation 3 Ilim = R5 x Vref / (R4 + R5) x Rsense where Ilim is the desired limited current, and Vsense is the threshold voltage for the current control loop. Note that the Rsense resistor should be chosen taking into account the maximum dissipation (Plim) through it during the full load operation. DocID10124 Rev 2 7/14 14 Principle of operation and application hints TSM1012 Equation 4 Plim = Vsense x Ilim Therefore, for most adapter and battery charger applications, a quarter-watt, or half-watt resistor to make the current sensing function is sufficient. The current sinking outputs of the two transconductance operational amplifiers are common (to the output of the IC). This makes an ORing function which ensures that whenever the current or the voltage reaches too high values, the optocoupler is activated. The relation between the controlled current and the controlled output voltage can be described with a square characteristic as shown in the following V/I output-power graph. Figure 4. Output voltage versus output current 7PMUBHFSFHVMBUJPO $VSSFOUSFHVMBUJPO 7PVU  54.7$$JOEFQFOEFOUQPXFSTVQQMZ 4FDPOEBSZDVSSFOUSFHVMBUJPO *PVU 54.7$$ PO QPXFS  PVUQVU  1SJNBSZDVSSFOUSFHVMBUJPO ".W 6.2 Compensation The voltage control transconductance operational amplifier can be fully compensated. Both of its output and negative input are directly accessible for external compensation components. An example of a suitable compensation network is shown in Figure 6. It consists of a capacitor Cvc1 = 2.2 nF and a resistor Rcv1 = 22 K in series. The current control trans conductance operational amplifier can be fully compensated. Both of its output and negative input are directly accessible for external compensation components. An example of a suitable compensation network is shown in Figure 6. It consists of a capacitor Cic1 = 2.2 nF and a resistor Ric1 = 22 K in series. 8/14 DocID10124 Rev 2 TSM1012 6.3 Principle of operation and application hints Start-up and short-circuit conditions Under start-up or short-circuit conditions the TSM1012 device is not provided with a high enough supply voltage. This is due to the fact that the chip has its power supply line in common with the power supply line of the system. Therefore, the current limitation can only be ensured by the primary PWM module, which should be chosen accordingly. If the primary current limitation is considered not to be precise enough for the application, then a sufficient supply for the TSM1012 device has to be ensured under any condition. It would then be necessary to add some circuitry to supply the chip with a separate power line. This can be achieved in numerous ways, including an additional winding on the transformer. 6.4 Voltage clamp Figure 6 shows how to realize a low-cost power supply for the TSM1012 device (with no additional windings). Please pay attention to the fact that in the particular case presented here, this low-cost power supply can reach voltages as high as twice the voltage of the regulated line. Since the absolute maximum rating of the TSM1012 supply voltage is 28 V. In the aim to protect he TSM1012 device against such high voltage values an internal Zener clamp is integrated. Equation 5 Rlimit = (VCC - Vz) x Ivz Figure 5. Clamp voltage 7$$ 3MJNJU *W[ 7$$ 7[ 54. 7 ".W DocID10124 Rev 2 9/14 14 Principle of operation and application hints TSM1012 Figure 6. Typical application schematic 3MJNJU 0QUPDPVQMFS TFDPOEBSZTJEF % 065 54.  $ O' 7DD 3 7SFG 7 $7 7 $7   0VU 3 3WD $WD  O'  $ 3 $ 18. DPOUSPMMFS $$ $ 3 0QUPDPVQMFS QSJNBSZTJEF $$ (/%  3JD %  $$  3TFOTF $7 $JD O'  3 3JD  065 ". 10/14 DocID10124 Rev 2 TSM1012 7 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 7.1 SO-8 package information Figure 7. SO-8 package outline DocID10124 Rev 2 11/14 14 Package information TSM1012 Table 6. SO-8 package mechanical data Dimensions (mm) Symbol Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.28 0.48 c 0.17 0.23 (1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 D e 0.25 1.27 h 0.25 0.50 L 0.40 1.27 L1 k 1.04 0° ccc 8° 0.10 1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both sides). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. 12/14 DocID10124 Rev 2 TSM1012 8 Revision history Revision history Table 7. Document revision history Date Revision 01-Feb-2004 1 Initial release. 2 Removed Mini SO-8 package from the whole document. Updated Section 7: Package information on page 11 (replaced Figure 7 on page 11 by new figure, updated Table 6 on page 12). Minor modifications throughout document. 15-Apr-2016 Changes DocID10124 Rev 2 13/14 14 TSM1012 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 14/14 DocID10124 Rev 2
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