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TSX3704IDT

TSX3704IDT

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SOIC14

  • 描述:

    IC COMP VOLT CMOS QUAD 14SO

  • 数据手册
  • 价格&库存
TSX3704IDT 数据手册
TSX3704 Micropower quad CMOS voltage comparators Datasheet - production data Related products Pin-to-pin and functionally compatible with the dual CMOS TS3704 comparators See TSX339 for open drain output Applications Automotive Industrial Description Features Low supply current: 5 µA typ. per comparator Wide single supply range 2.7 V to 16 V or dual supplies (±1.35 V to ±8 V) Extremely low input bias current: 1 pA typ. Input common-mode voltage range includes ground Push-pull output 12 High input impedance: 10 Ω typ Fast response time: 2.7 µs typ. for 5 mV overdrive ESD tolerance: 4 kV HBM, 200 V MM February 2016 The TSX3704 is a micropower CMOS quad voltage comparator which exhibits a very low current consumption of 5 µA typical per comparator. This device was designed as the improvement of the TS3704: it shows a lower current consumption, a better input offset voltage, and an enhanced ESD tolerance. The TSX3704 is fully specified over a wide temperature range and is proposed in automotive grade for the TSSOP14 package. It is fully compatible with the TS3704 CMOS comparator and is available with similar packages. The new tiny package, QFN16 3x3, is also proposed for the TSX3704 thus allowing even more integration on applications. DocID028620 Rev 2 This is information on a product in full production. 1/22 www.st.com Contents TSX3704 Contents 1 Schematic diagram.......................................................................... 3 2 Package pin connections................................................................ 4 3 4 Absolute maximum ratings and operating conditions ................. 5 Electrical characteristics ................................................................ 6 5 Electrical characteristic curves .................................................... 10 6 Application information ................................................................ 13 7 8 9 2/22 6.1 Input voltages .................................................................................. 13 6.2 For unused channel ........................................................................ 14 6.3 Bypass capacitor ............................................................................. 14 Package information ..................................................................... 15 7.1 SO14 package information .............................................................. 16 7.2 TSSOP14 package information ....................................................... 17 7.3 QFN16 3x3 package information..................................................... 18 Ordering information..................................................................... 20 Revision history ............................................................................ 21 DocID028620 Rev 2 TSX3704 1 Schematic diagram Schematic diagram Figure 1: Schematic diagram (one operator) VCC+ ESD CLAM P IN+ IN- OUT VCC- DocID028620 Rev 2 3/22 Package pin connections 2 TSX3704 Package pin connections Figure 2: Pin connections (top view) 1. 2. 4/22 NC = not connected The exposed pad of the QFN16 3x3 can be connected to VCC- or left floating. DocID028620 Rev 2 TSX3704 3 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 1: Absolute maximum ratings (AMR) Symbol + VCC Parameter Supply voltage Value (1) 18 Vid Differential input voltage Vin Input voltage Vo Output voltage Io Output current (2) ±18 -0.3 to18 20 Forward current in ESD protection diodes on inputs Tj Maximum junction temperature (3) 50 150 Storage temperature range -65 to 150 Thermal resistance junction to ambient Rthja HBM: human body model MM: machine model ESD V 18 IF Tstg Unit (4) SO14 105 TSSOP14 100 QFN16 3x3 39 (5) °C °C/W 4000 (6) CDM: charged device model mA 200 (7) V 1500 Latch-up immunity 200 mA Notes: (1) (2) (3) (4) (5) (6) (7) All voltage values, except the differential voltage, are with respect to network ground terminal Differential voltages are the non-inverting input terminal with respect to the inverting input terminal Guaranteed by design Short-circuits can cause excessive heating and destructive dissipation. Values are typical According to JEDEC standard JESD22-A114F According to JEDEC standard JESD22-A115A According to ANSI/ESD STM5.3.1 Table 2: Operating conditions Symbol + VCC Vicm (1) Toper Parameter Supply voltage Value Unit 2.7 to 16 Common mode input voltage range Tmin ≤ Tamb ≤ Tmax Operating free-air temperature range + 0 to (VCC ) - 1.5 0 to + (VCC ) V -2 -40 to 125 °C Notes: (1) The output state is guaranteed as long as one input remains with this common mode input voltage range, and the other input remains between -0.3 V and 16 V (meaning that one input can be driven above VCC+). DocID028620 Rev 2 5/22 Electrical characteristics 4 TSX3704 Electrical characteristics Table 3: VCC+ = 3 V, VCC- = 0 V, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Condition Vio Input offset voltage (1) Iio Input offset current (2) Iib CMR Input bias current (2) Common-mode rejection ratio SVR Supply voltage rejection ratio VOH High-level output voltage drop VOL Low-level output voltage Min. Typ. Max. Vicm = 0 V -5 0.1 5 Tmin ≤ Tamb ≤ Tmax -6 6 Vicm = VCC/2 1 Tmin ≤ Tamb ≤ Tmax 1 Tmin ≤ Tamb ≤ Tmax 58 Tmin ≤ Tamb ≤ Tmax 55 + VCC 69 Tmin ≤ Tamb ≤ Tmax Vid = 1 V, IOH = 4 mA Supply current per comparator 69 300 tPLH 300 Tmin ≤ Tamb ≤ Tmax Response time high to low 5 Tmin ≤ Tamb ≤ Tmax 8 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.4 Overdrive = 100 mV 0.5 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 0.45 f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 39 tf Fall time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 39 The specified offset voltage is the maximum value required to drive the output up to 2.5 V or down to 0.3 V. DocID028620 Rev 2 0.6 0.65 Rise time 6/22 µs 2 tr Guaranteed by design. µA 0.6 0.77 Notes: (2) 9 11 Tmin ≤ Tamb ≤ Tmax (1) mV 6 7 No load - outputs high Overdrive = 100 mV 400 600 Tmin ≤ Tamb ≤ Tmax tPHL 400 600 Tmin ≤ Tamb ≤ Tmax Response time low to high dB 88 No load - outputs low ICC pA 73 Tmin ≤ Tamb ≤ Tmax Vid = -1 V, IOL = 4 mA 10 1200 Vicm = 0 to max Vicm = 3 V to 5 V, Vicm = VCC/2 mV 10 600 Vicm = VCC/2 Unit ns TSX3704 Electrical characteristics Table 4: VCC+ = 5 V, VCC- = 0 V, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Condition Vio Input offset voltage (1) Iio Input offset current (2) Iib Input bias current CMR (2) Common-mode rejection ratio SVR Supply voltage rejection ratio VOH High-level output voltage drop VOL Low-level output voltage Min. Typ. Max. Vicm = VCC/2 -5 0.1 5 Tmin ≤ Tamb ≤ Tmax -6 Vicm = VCC/2 Supply current per comparator 1 Tmin ≤ Tamb ≤ Tmax 1 Tmin ≤ Tamb ≤ Tmax 66 Tmin ≤ Tamb ≤ Tmax 65 + VCC 71 Tmin ≤ Tamb ≤ Tmax Vid = 1 V, IOH = 4 mA 70 180 tPLH 180 5 9 2.4 Overdrive = 10 mV 1.5 Overdrive = 20 mV 0.9 Overdrive = 40 mV 0.6 Overdrive = 100 mV 0.35 0.45 2.8 Overdrive = 10 mV 1.8 Overdrive = 20 mV 1 Overdrive = 40 mV 0.7 Overdrive = 100 mV 0.46 Tmin ≤ Tamb ≤ Tmax TTL input 0.6 µs 0.6 0.7 0.3 Tmin ≤ Tamb ≤ Tmax 0.4 0.5 tr Rise time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 30 tf Fall time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 30 DocID028620 Rev 2 0.55 0.65 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV (3) µA 0.6 Tmin ≤ Tamb ≤ Tmax tPHL 10 11 Tmin ≤ Tamb ≤ Tmax Response time high to low mV 8 9 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV TTL input 250 400 Tmin ≤ Tamb ≤ Tmax (3) 250 400 Tmin ≤ Tamb ≤ Tmax Response time low to high dB 89 Tmin ≤ Tamb ≤ Tmax No load - outputs high pA 85 Tmin ≤ Tamb ≤ Tmax Vid = -1 V, IOL = 4 mA 10 1200 Vicm = 0 to max Vicm = 5 V to 10 V, Vicm = VCC/2 mV 10 600 Vicm = VCC/2 No load - outputs low ICC 6 Unit ns 7/22 Electrical characteristics TSX3704 Notes: (1) (2) The specified offset voltage is the maximum value required to drive the output up to 2.5 V or down to 0.3 V. Guaranteed by design. (3) A step from 0 V to 3 V is applied on one input while the other is fixed at 1.4 V. The response time is the time interval between the application of the input voltage step and the moment the output voltage reaches 50 % of its final value. 8/22 DocID028620 Rev 2 TSX3704 Electrical characteristics Table 5: VCC+ = 16 V, VCC- = 0 V, Tamb = 25 °C (unless otherwise specified) Symbol Parameter Condition Vio Input offset voltage (1) Iio Input offset current (2) Iib Input bias current CMR (2) Common-mode rejection ratio SVR Supply voltage rejection ratio VOH High level output voltage drop VOL Low level output voltage Min. Typ. Max. Vicm = VCC/2 -5 0.1 5 Tmin ≤ Tamb ≤ Tmax -6 6 Vicm = VCC/2 1 Tmin ≤ Tamb ≤ Tmax 1 Tmin ≤ Tamb ≤ Tmax 72 Tmin ≤ Tamb ≤ Tmax 70 + VCC 73 Tmin ≤ Tamb ≤ Tmax Supply current per comparator tPLH 72 Vid = 1 V, IOH = 4 mA 90 Tmin ≤ Tamb ≤ Tmax tPHL Vid = -1 V, IOL = 4 mA 90 Tmin ≤ Tamb ≤ Tmax tf 150 mV 250 7 Tmin ≤ Tamb ≤ Tmax 9 10 No load - outputs high 11 13 µA 14 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.2 Overdrive = 10 mV 1.4 Overdrive = 20 mV 0.9 Overdrive = 40 mV 0.6 Overdrive = 100 mV 0.34 0.55 0.6 Vicm = 0 V, f = 10 kHz, RL = 5.1 kΩ, CL = 50 pF, overdrive = 5 mV 2.4 Overdrive = 10 mV 1.6 Overdrive = 20 mV 1 Overdrive = 40 mV 0.7 Overdrive = 100 mV 0.55 Tmin ≤ Tamb ≤ Tmax tr 150 250 Tmin ≤ Tamb ≤ Tmax Response time high to low dB 90 Tmin ≤ Tamb ≤ Tmax Response time low to high pA 90 No load - outputs low ICC 10 1200 Vicm = 0 to max Vicm = 5 V to 16 V, Vicm = VCC/2 mV 10 600 Vicm = VCC/2 Unit µs 0.7 0.75 Rise time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 11 Fall time f = 10 kHz, CL = 50 pF, RL = 5.1 kΩ, overdrive 50 mV 11 ns Notes: (1) (2) The specified offset voltage is the maximum value required to drive the output up to 2.5 V or down to 0.3 V. Guaranteed by design. DocID028620 Rev 2 9/22 Electrical characteristic curves 5 TSX3704 Electrical characteristic curves Figure 3: Current consumption vs. supply voltage, output high Figure 4: Current consumption vs. supply voltage, output low Figure 5: Current consumption vs. input common-mode voltage, output high Figure 6: Current consumption vs. common-mode voltage, output low Figure 7: Output voltage drop vs. output source current, VCC = 5 V Figure 8: Output voltage drop vs. output source current, VCC = 12 V 10/22 DocID028620 Rev 2 TSX3704 Electrical characteristic curves Figure 9: Output voltage drop vs. output sink current, VCC = 5 V Figure 10: Output voltage drop vs. output sink current, VCC = 12 V Figure 11: Input offset voltage distribution, VCC = 5 V Figure 12: Input current vs input voltage, VCC = 5 V 1E-3 1E-4 1E-5 1E-6 I ib (A) 1E-7 VCC= 5V o T = 125 C o T = 85 C 1E-8 1E-9 1E-10 1E-11 1E-12 o T = 25 C 1E-13 1E-14 0 2 4 6 8 10 12 14 16 V (V) in Figure 13: Propagation delay tPLH vs. input signal overdrive, VCC = 5 V Figure 14: Propagation delay tPHL vs. input signal overdrive, VCC = 5 V DocID028620 Rev 2 11/22 Electrical characteristic curves TSX3704 Figure 15: Propagation delay tPLH vs. supply voltage 12/22 Figure 16: Propagation delay tPHL vs. supply voltage DocID028620 Rev 2 TSX3704 Application information 6 Application information 6.1 Input voltages The output state is guaranteed as long as one input remains within the common mode input voltage range (defined in the operating conditions table), and the other input remains between -0.3 V and 16 V (meaning that one input can be driven above VCC+). If one input voltage is beyond the range 0 V to 16 V, this input of the comparator should be protected according to Figure 17. If the input is lower than Vcc-, a significant current may go through the ESD diode. To protect the circuit, this current must be limited to 10 mA by using the Rg+ or Rg- resistors. If the input is bigger than 16 V, it has to be voltage limited. This is achieved using the D- or D+ additional, external diodes. To protect these diodes, the current is limited using the Rg resistor. D- and D+ diodes can be connected to another power supply with a maximum value of 16 V. The device is designed to prevent phase reversal. Figure 17: Additional, external, protection schematic DocID028620 Rev 2 13/22 Application information 6.2 TSX3704 For unused channel An unused comparator has to be configured to avoid unexpected additional consumption. A simple solution is to connect the input to the power supply pins as shown in Figure 18. This keeps the circuit in a stable state. Figure 18: Input configuration for unused channel 6.3 Bypass capacitor To maintain proper coupling of the power supply, it is strongly recommended to place a 0.1 μF capacitor as close as possible to the supply pins. 14/22 DocID028620 Rev 2 TSX3704 7 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK is an ST trademark. DocID028620 Rev 2 15/22 Package information 7.1 TSX3704 SO14 package information Figure 19: SO14 package outline Table 6: SO14 mechanical data Dimensions Ref. Millimeters Min. Typ. Inches Max. Min. Max. A 1.35 1.75 0.05 0.068 A1 0.10 0.25 0.004 0.009 A2 1.10 1.65 0.04 0.06 B 0.33 0.51 0.01 0.02 C 0.19 0.25 0.007 0.009 D 8.55 8.75 0.33 0.34 E 3.80 4.0 0.15 0.15 e 1.27 0.05 H 5.80 6.20 0.22 0.24 h 0.25 0.50 0.009 0.02 L 0.40 1.27 0.015 0.05 k ddd 16/22 Typ. 8° (max) 0.10 DocID028620 Rev 2 0.004 TSX3704 7.2 Package information TSSOP14 package information Figure 20: TSSOP14 package outline aaa Table 7: TSSOP14 mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.20 A1 0.05 A2 0.80 b Max. 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.90 5.00 5.10 0.193 0.197 0.201 E 6.20 6.40 6.60 0.244 0.252 0.260 E1 4.30 4.40 4.50 0.169 0.173 0.176 e L 0.65 0.45 L1 k aaa 1.00 0.60 0.0256 0.75 0.018 1.00 0° 0.024 0.030 0.039 8° 0.10 DocID028620 Rev 2 0° 8° 0.004 17/22 Package information 7.3 TSX3704 QFN16 3x3 package information Figure 21: QFN16 3x3 package outline The exposed pad is not internally connected and can be set to ground or left floating. 18/22 DocID028620 Rev 2 TSX3704 Package information Table 8: QFN16 3x3 mechanical data Dimensios Ref. Millimeters Inches Min. Typ. Max. Min. Typ. Max. A 0.80 0.90 1.00 0.031 0.035 0.039 A1 0 0.05 0 A3 0.20 b 0.18 D 2.90 D2 1.50 E 2.90 E2 1.50 e L 3.00 3.00 0.008 0.30 0.007 3.10 0.114 1.80 0.059 3.10 0.114 1.80 0.059 0.50 0.30 0.002 0.012 0.118 0.122 0.071 0.118 0.122 0.071 0.020 0.50 0.012 0.020 Figure 22: QFN16 3x3 recommended footprint DocID028620 Rev 2 19/22 Ordering information 8 TSX3704 Ordering information Table 9: Order codes Order code Temperature range Package TSX3704IDT SO14 TSX3704IPT TSSOP14 -40 °C to 125 °C TSX3704IQ4T TSX3704IYPT (1) QFN16 3x3 TSSOP14 (automotive grade) Packing Marking TSX3704ID Tape and reel TSX3704I K533 TSX3704IY Notes: (1) Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going. 20/22 DocID028620 Rev 2 TSX3704 9 Revision history Revision history Table 10: Document revision history Date Revision Changes 16-Dec-2015 1 Initial release 29-Feb-2016 2 Table 3, Table 4, and Table 5: updated VOH and VOL condition IOH/IOL = 4 mA (not 6mA). DocID028620 Rev 2 21/22 TSX3704 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 22/22 DocID028620 Rev 2
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