VNL5160S5-E

VNL5160N3-E VNL5160S5-E OMNIFET III fully protected low-side driver Datasheet - production data Description 2 1 2 3 SO-8 SOT-223 Features Type Vclamp RDS(on) ID 41 V 160 mΩ 3.5 A VNL5160N3-E VNL5160S5-E The VNL5160N3-E and VNL5160S5-E are monolithic devices, made using STMicroelectronics® VIPower® Technology, intended for driving resistive or inductive loads with one side connected to the battery. Built-in thermal shutdown protects the chip from overtemperature and short circuit. Output current limitation protects the devices in an overload condition. In the case of a long duration overload, the device limits the dissipated power to a safe level up to thermal shutdown intervention. Thermal shutdown, with automatic restart, allows the device to recover normal operation as soon as a fault condition disappears. Fast demagnetization of inductive loads is achieved at turn-off. • Automotive qualified • Drain current: 3.5A • ESD protection • Overvoltage clamp • Thermal shutdown • Current and power limitation • Very low standby current • Very low electromagnetic susceptibility • In compliance with the 2002/95/EC European directive • Open drain status output (VNL5160S5-E only) • Specially intended for R10W or 2x R5W automotive signal lamps Table 1. Device summary Order codes Package Tube Tape and reel SOT-223 VNL5160N3-E VNL5160N3TR-E SO-8 VNL5160S5-E VNL5160S5TR-E September 2013 This is information on a product in full production. DocID16364 Rev 3 1/27 www.st.com Contents VNL5160N3-E, VNL5160S5--E Contents 1 Block diagrams and pins configurations . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 5 6 7 2/27 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.1 SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.2 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.2 SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 6.3 SO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6.4 SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6.5 SO8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 PowerMOS section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Supply section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Switching characteristics (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 SOT-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 DocID16364 Rev 3 3/27 3 List of figures VNL5160N3-E, VNL5160S5--E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. 4/27 VNL5160N3-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 VNL5160S5-E block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 VNL5160N3-E current and voltage conventions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 VNL5160S5-E current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Configuration diagrams (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 VNL5160N3-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 VNL5160S5-E application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 SOT-223 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . 17 SOT-223 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . 18 SOT-223 thermal fitting model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 20 SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SO-8 thermal fitting model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 SOT-223 mechanical data & package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO8 mechanical data & package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E 1 Block diagrams and pins configurations Block diagrams and pins configurations Figure 1. VNL5160N3-E block diagram $2!). /2*,& &RQWURO 'LDJQRVWLF &XUUHQW /LPLWDWLRQ ,1387 3RZHU &ODPS '5,9(5 29(57(03(5$785( 3527(&7,21 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 *1' ("1($'5 Figure 2. VNL5160S5-E block diagram $2!). 6833/< 92/7$*( 6833/< /2*,& &RQWURO 'LDJQRVWLF 2))6WDWH 2SHQORDG &XUUHQW /LPLWDWLRQ ,1387 67$786 3RZHU &ODPS '5,9(5 29(57(03(5$785( 3527(&7,21 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 *1' ("1($'5 DocID16364 Rev 3 5/27 26 Block diagrams and pins configurations VNL5160N3-E, VNL5160S5--E Table 2. Pin function Name Function INPUT Voltage controlled input pin with hysteresis, CMOS compatible. Controls output switch state(1) DRAIN PowerMOS drain SOURCE PowerMOS source and ground reference for the control section SUPPLY VOLTAGE Supply voltage connected to the signal part (5V) Open drain digital diagnostic pin(2) STATUS 1. Internally connected to Vsupply in the VNL5160N3-E. 2. Valid for VNL5160S5-E only. Figure 3. VNL5160N3-E current and voltage conventions ID VDS DRAIN IIN INPUT SOURCE VIN Figure 4. VNL5160S5-E current and voltage conventions ID IIN INPUT ISTAT DRAIN STATUS VDS VIN IS VSTAT SUPPLY VOLTAGE VSUPPLY 6/27 DocID16364 Rev 3 SOURCE VNL5160N3-E, VNL5160S5--E Block diagrams and pins configurations Figure 5. Configuration diagrams (top view) SOT-223 SO-8 Table 3. Suggested connections for unused and not connected pins Connection/pin Status N.C. Input Floating X X X To ground Not allowed X Through 10kΩ resistor DocID16364 Rev 3 7/27 26 Absolute maximum rating 2 VNL5160N3-E, VNL5160S5--E Absolute maximum rating Stressing the device above the rating listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.1 Absolute maximum ratings Table 4. Absolute maximum ratings Value Symbol Parameter Unit SOT-223 VDS ID DC drain current -ID Reverse DC drain current IS DC supply current IIN DC input current ISTAT DC status current VESD1 Electrostatic discharge (R=1.5kΩ; C=100pF) – INPUT – STATUS – SUPPLY – DRAIN VESD2 Electrostatic discharge on output pin only (R=330Ω, C=150pF) Internally clamped V Internally limited A 4 A - -1 to 10 -1 to 10 - mA -1 to 10 4000 4000 4000 5000 mA mA V 2000 V Junction operating temperature -40 to 150 °C Tstg Storage temperature -55 to 150 °C Eas Single pulse avalanche energy L = 8.5 mH, Tj = 150 °C, RL = 0 Ω, Vbatt = 13.5 V, Iout = IlimL 37 mJ Tj 8/27 Drain-source voltage (VIN=0V) SO-8 DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E 2.2 Absolute maximum rating Thermal data Table 5. Thermal data Maximum value Symbol Rthj-amb Parameter Thermal resistance junction-ambient Unit SOT-223 SO-8 146.8(1) 103.1 °C/W 1. When mounted on a standard single-sided FR4 board with 0.5cm2 of Cu (at least 35 µm thick) connected to all DRAIN pins DocID16364 Rev 3 9/27 26 Electrical characteristics 3 VNL5160N3-E, VNL5160S5--E Electrical characteristics Values specified in this section are for VIN = Vsupply = 4.5 V to 5.5 V, -40 °C < Tj < 150 °C, unless otherwise stated. Table 6. PowerMOS section Symbol Vsupply RON Parameter Test conditions Min. Typ. Max. Unit 3.5 5 5.5 V 160 170 mΩ 320 mΩ 52 V Operating supply voltage VIN = Vsupply = 5V; ID = 1 A; Tj = 25 °C On-state resistance VIN = Vsupply = 5V; ID = 1 A; Tj = 150 °C VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 1 A 41 VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 VIN = 0 V; VDS = 13 V; Tj = 25 °C 0 3 µA VIN = 0 V; VDS = 13 V; Tj = 125 °C 0 5 µA IDSS Off-state output current 46 V Table 7. Source drain diode Symbol VSD Parameter Test conditions Forward on voltage Min. Typ. Max. Unit — 0.8 — V Min. Typ. Max. Unit 30 65 µA 7 V ID = 1 A; VIN = 0 V Table 8. Input section(1) Symbol Parameter IISS Supply current from input pin VICL Input clamp voltage VINTH Test conditions On-state VIN = Vsupply = 5 V; VDS = 0 V IS = 1 mA 5.5 IS = -1 mA Input threshold voltage -0.7 VDS = VIN; ID = 1 mA 1 V 3.5 V 1. Valid for VNL5160N3-E option (input & supply pins connected together). Table 9. Status pin(1) Symbol 10/27 Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT = 1 mA 0.5 V ILSTAT Status leakage current Normal operation, VSTAT = 5 V 10 µA DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E Electrical characteristics Table 9. Status pin(1) (continued) Symbol Parameter Test conditions CSTAT Status pin input capacitance VSTCL Status clamp voltage Min. Typ. Max. Unit 100 pF 7 V Normal operation; VSTAT = 5 V ISTAT = 1 mA 5.5 ISTAT = -1 mA -0.7 V 1. Valid for VNL5160S5-E option. Table 10. Logic input(1) Symbol Parameter Test conditions VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Min. VIN = 0.9 V Max. Unit 0.9 V 1 µA 2.1 V VIN = 2.1 V 10 0.13 IIN = 1 mA Input clamp voltage Typ. V 5.5 IIN = -1 mA µA 7 -0.7 V V 1. Valid for VNL5160S5-E option. Table 11. Open-load detection(1) Symbol VOl td(oloff) Parameter Test conditions Min. Typ. Max. Unit Open-load off-state voltage detection threshold VIN = 0 V 0.6 1.2 1.7 V Delay between INPUT falling edge and STATUS falling edge in open-load condition IOUT = 0 A 45 425 1100 µs 1. Valid for VNL5160S5-E option. Table 12. Supply section(1) Symbol Parameter IS Supply current VSCL Supply clamp voltage Test conditions Min. Typ. Max. Unit Off-state Tj = 25 °C; VIN = VDRAIN = 0 V 10 25 µA On-state Tj = 25 °C; VIN = 5 V; VDS = 0 V 25 65 µA 7 V ISCL = 1 mA ISCL = -1 mA 5.5 -0.7 V 1. Valid for VNL5160S5-E option. DocID16364 Rev 3 11/27 26 Electrical characteristics VNL5160N3-E, VNL5160S5--E Table 13. Switching characteristics (VCC = 13 V(1)) SOT-223(2) Symbol Parameter SO-8 Unit Test conditions Min. Typ. Max Min. Typ. Max. td(ON) Turn-on delay time RL = 13Ω, VCC = 13V(3) 8.9 8.9 µs td(OFF) Turn-off delay time RL = 13Ω, VCC = 13V 13.2 13.2 µs tr Rise time RL = 13Ω, VCC = 13V 14.1 14.1 µs tf Fall time RL = 13Ω, VCC = 13V 11.5 11.5 µs WON Switching energy losses at turn-on RL = 13Ω, VCC = 13V 34.3 34.3 µJ WOFF Switching energy losses at turn-off RL = 13Ω, VCC = 13V 34.3 34.3 µJ 1. See Figure 7: VNL5160N3-E application schematic and Figure 8: VNL5160S5-E application schematic. 2. 3.5 V < Vsupply = Vin < 5.5 V. 3. See Figure 6: Switching characteristics. Table 14. Protection and diagnostics Test conditions(1) Symbol Parameter IlimH DC short circuit current VDS = 13V; VIN = Vsupply = 5V IlimL Short circuit current during thermal cycling VDS = 13V; TR < Tj < TTSD; VIN = Vsupply = 5V 2.5 Α tdlim Step response current limit VDS = 13V; Vinput = 5V 20 µs TTSD Shutdown temperature TR Reset temperature TRS(2) Thermal reset of STATUS THYST Thermal hysteresis (TTSD - TR) Typ. Max. Unit 3.5 5 7.5 A 150 175 TRS+1 TRS+5 135 2. Valid for VNL5160S5-E option. DocID16364 Rev 3 200 °C °C °C 7 1. Vsupply=Vinput in VNL5160N3-E version. 12/27 Min. °C VNL5160N3-E, VNL5160S5--E Electrical characteristics Table 15. Truth table (1) Conditions INPUT DRAIN STATUS Normal operation L H H L H H Current limitation L H H X H H Overtemperature L H H H H L Undervoltage L H H H X X Output voltage < VOL L H L L L H 1. Valid for VNL5160S5-E option Figure 6. Switching characteristics ID 90% tr tf 10% t Vgen td(on) td(off) t DocID16364 Rev 3 13/27 26 Application information 4 VNL5160N3-E, VNL5160S5--E Application information Figure 7. VNL5160N3-E application schematic 9FF 9 5/ 0LFUR&RQWUROOHU ,1387 '5$,1 5SURW 6285&( ("1($'5 Figure 8. VNL5160S5-E application schematic 9FF 9 5/ 9 0LFUR&RQWUROOHU 5VXSSO\ 96833/< '5$,1 N ,1387 5SURW 67$786 5SURW 6285&( '!0'#&4 14/27 DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E 4.1 Application information MCU I/O protection ST suggests to insert a resistor (Rprot) in line to prevent the µC I/O pins from latching up(a). The value of these resistors is a compromise between the leakage current of µC and the current required by the LSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os: 0.7/Ilatchup ≤ Rprot ≤ (VOHµC-VIH) / IIHmax Calculation example: For the following conditions: Ilatchup ≥ 20mA VOHµC ≥ 4.5V 35Ω ≤ Rprot ≤100kΩ. Recommended value is Rprot = 1 kΩ a. In case of negative transient on the drain pin. DocID16364 Rev 3 15/27 26 Application information VNL5160N3-E, VNL5160S5--E Figure 9. Maximum demagnetization energy 91/[ 0D[LPXPWXUQRIIFXUUHQWYHUVXVLQGXFWDQFH ,$   91/[6LQJOH3XOVH 5HSHWLWLYHSXOVH7MVWDUW ƒ& 5HSHWLWLYHSXOVH7MVWDUW ƒ&    /P+  91/[ 0D[LPXPWXUQRII(QHUJ\YHUVXV7GHPDJ (>P-@  91/[6LQJOH3XOVH  5HSHWLWLYHSXOVH7MVWDUW ƒ& 5HSHWLWLYHSXOVH7MVWDUW ƒ&   16/27  7GHPDJ>PV@ DocID16364 Rev 3  ("1($'5 VNL5160N3-E, VNL5160S5--E Package and PC board thermal data 5 Package and PC board thermal data 5.1 SOT-223 thermal data Figure 10. SOT-223 PC board GAPGCFT00530 Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 30 mm x 30 mm,PCB thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to 0.8 cm2). Figure 11. SOT-223 Rthj-amb vs PCB copper area in open box free air condition RTHjamb 160 footprint 150 RTHj_amb(°C/W) 140 130 120 110 100 90 80 70 60 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) - (refer to PCB layout) DocID16364 Rev 3 17/27 26 Package and PC board thermal data VNL5160N3-E, VNL5160S5--E Figure 12. SOT-223 thermal impedance junction ambient single pulse ZTH (°C/W) 1000 Footprint 2 cm2 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) 10 100 1000 Equation 1: pulse calculation formula Z TH δ = R TH ⋅δ+Z THtp (1 – δ) where δ = tP/T Figure 13. SOT-223 thermal fitting model 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 18/27 DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E Package and PC board thermal data Table 16. SOT-223 thermal parameter 5.2 Area/island (cm2) FP R1 (°C/W) 1.4 R2 (°C/W) 1.8 R3 (°C/W) 4.5 R4 (°C/W) 24 R5 (°C/W) 0.1 R6 (°C/W) 115 C1 (W·s/°C) 0.0003 C2 (W·s/°C) 0.002 C3 (W·s/°C) 0.03 C4 (W·s/°C) 0.16 C5 (W·s/°C) 1000 C6 (W·s/°C) 0.4 2 45 2 SO-8 thermal data Figure 14. SO-8 PC board GAPGCFT00534 Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm, Cu thickness=35 µm, Copper areas: from minimum pad layout to 2 cm2). DocID16364 Rev 3 19/27 26 Package and PC board thermal data VNL5160N3-E, VNL5160S5--E Figure 15. SO-8 Rthj-amb vs PCB copper area in open box free air condition RTHjamb 115 RTHj_amb(°C/W) 105 footprint 95 85 75 65 0 0.5 1 1.5 2 2.5 PCB Cu heatsink area (cm^2) - (refer to PCB layout) Figure 16. SO-8 thermal impedance junction ambient single pulse ZTH (°C/W) 1000 Footprint 100 2 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 Time (s) Equation 2: pulse calculation formula Z TH δ = R TH ⋅δ+Z THtp (1 – δ) where δ = tP/T 20/27 DocID16364 Rev 3 10 100 1000 VNL5160N3-E, VNL5160S5--E Package and PC board thermal data Figure 17. SO-8 thermal fitting model 1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Table 17. SO-8 thermal parameter 2 Area/island (cm ) 0.07 R1 (°C/W) 1.4 R2 (°C/W) 3.2 R3 (°C/W) 3.5 R4 (°C/W) 21 R5 (°C/W) 16 R6 (°C/W) 58 C1 (W·s/°C) 0.0008 C2 (W·s/°C) 0.0032 C3 (W·s/°C) 0.0075 C4 (W·s/°C) 0.045 C5 (W·s/°C) 0.35 C6 (W·s/°C) 1.05 DocID16364 Rev 3 2 28 2 21/27 26 Package and packing information VNL5160N3-E, VNL5160S5--E 6 Package and packing information 6.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 6.2 SOT-223 mechanical data Figure 18. SOT-223 mechanical data & package outline 0046067 22/27 DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E 6.3 Package and packing information SO8 mechanical data Figure 19. SO8 mechanical data & package outline mm inch DIM. MIN. TYP. A MAX. MIN. TYP. MAX. 1.750 0.0689 A1 0.100 0.250 0.0039 0.0098 A2 1.250 0.0492 b 0.280 0.480 0.0110 0.0189 c 0.170 0.230 0.0067 0.0091 D (1) 4.800 4.900 5.000 0.1890 0.1929 0.1969 E 5.800 6.000 6.200 0.2283 0.2362 0.2441 E1(2) 3.800 3.900 4.000 0.1496 0.1535 0.1575 e 1.270 0.0500 h 0.250 0.500 0.0098 L 0.400 1.270 0.0157 L1 k ccc 1.040 0˚ OUTLINE AND MECHANICAL DATA 0.0197 0.0500 0.0409 8˚ 0.100 0˚ 8˚ 0.0039 Notes: 1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs shall not exceed 0.15mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25mm per side. SO-8 0016023 D DocID16364 Rev 3 23/27 26 Package and packing information 6.4 VNL5160N3-E, VNL5160S5--E SOT-223 packing information The devices can be packed in tube or tape and reel shipments (see the Table 1: Device summary). Figure 20. SOT-223 tape and reel shipment (suffix “TR”) Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 12.4 60 18.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (+ 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components Empty components pockets saled with cover tape. User direction of feed 24/27 DocID16364 Rev 3 No components 500mm min 500mm min VNL5160N3-E, VNL5160S5--E 6.5 Package and packing information SO8 packing information Figure 21. SO-8 tube shipment (no suffix) B C Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) A 100 2000 532 3.2 6 0.6 Figure 22. SO-8 tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (+ 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) 12 4 8 1.5 1.5 5.5 4.5 2 All dimensions are in mm. End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed DocID16364 Rev 3 25/27 26 Revision history 7 VNL5160N3-E, VNL5160S5--E Revision history Table 18. Document revision history Date Revision 17-Nov-2009 1 Initial release. 20-Feb-2012 2 Update the entire document in ST template. Update Section : Features in cover page. 3 Table 9: Status pin: – -ID: updated value Table 9: Status pin: – IISS: updated max value Table 13: Switching characteristics (VCC = 13 V): – IS: updated max value Updated Figure 8: VNL5160S5-E application schematic Updated Section 4.1: MCU I/O protection Updated Figure 9: Maximum demagnetization energy 20-Sep-2013 26/27 Changes DocID16364 Rev 3 VNL5160N3-E, VNL5160S5--E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2013 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com DocID16364 Rev 3 27/27 27