SIP42104DX-T1-E3

Product is End of Life 12/2014 SiP42104 Vishay Siliconix H-Bridge Driver and Pulse Width Controller for Digital Camera Micro Modules DESCRIPTION FEATURES The SiP42104 is a 250 mA integrated H-bridge driver and programmable output-pulse-width controller. It offers a complete and cost-effective solution for micro camera focus module applications such as shutter, iris, lens cover and Infrared filter drivers. The output voltage direction of the H-bridge is set by the presence of the rising or falling edge at the digital interface pin IN and the corresponding on-duration is set by the RC pin time constant. During time-out, the input deglitcher-latch is transparent to input noise durations of less than 300 ns. Internal breakbefore-make prevents output shoot-through. When the H-bridge turns off after time-out, the lower N-channel MOSFETs are turned on for a short interval to prevent turning on their body diodes. The low IN threshold logic and the sub micro-amp steady state quiescent current is ideal for low battery applications. The SiP42104 is offered in the ultra-small lead (Pb)-free SC-89 package (SOT666) and it is rated over the industrial ambient range of - 40 °C to + 85 °C. • • • • • • • • • Low supply range: 2.3 to 4.2 V Low RH: 0.85 Ω at 2.8 V and 150 mA Output current up to 250 mA RoHS COMPLIANT Output voltage direction depends on input Rising or falling edges Break before make cross-over protection 300 ns de-glitch circuit Programmable RC timer to set output pulse width Sub micro-amp quiescent current SC89-6L package (1.6 x 1.6 x 0.6 mm) APPLICATIONS • • • • Digital camera Cell phones Small DC motor control Dual-stage latchable relay driver TYPICAL APPLICATION CIRCUIT VDD INPUT BUFFER AND DEGLITCHER IN OUT2 SW2 1.75 µA SW1 RC H-BRIDGE DRIVER AND BBM TIMER AND PULSE WIDTH CONTROLLER M1 M3 M2 M4 LLOAD RLOAD R C OUT1 GND Figure 1. Document Number: 74633 S-80224-Rev. C, 04-Feb-08 www.vishay.com 1 SiP42104 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter Limit Supply Input Voltage (VDD) - 0.3 to 4.5 Input Voltage (VIN ) - 0.3 to 4.5 Output DC Voltage (VOUT1, VOUT2) - 0.3 to 4.5 Maximum Pulsed Current (IOUT1, IOUT1) ESD Rating (HBM) 250 Unit V mA 5.5 kV Thermal Resistance (θJA) 465 °C/W Power Dissipationb (PD) 172 mW Maximum Junction Temperature (TJM) 150 a Lead Temperaturec (TL) Storage Temperature (TS) 260 °C - 65 to 150 Notes: a. Soldered down to PCB 1 inch2 1 oz copper. b. Derate - 2.15 mW/°C above 70 °C. c. Soldering 5 s. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Parameter VDD IOUT Limit Unit 2.3 to 4.2 V ± 150 mA 10 K to 500 K Ω Timing Capacitor 10 to 220 nF Output Inductive Load L 10 to 550 µH DCR Of Output Inductive Load 15 to 30 Ω Timing Resistor www.vishay.com 2 Document Number: 74633 S-80224-Rev. C, 04-Feb-08 SiP42104 Vishay Siliconix SPECIFICATIONS Parameter Symbol Test Conditions VDD = 2.8 V, TA = - 40 to 85 °C unless otherwise noted. Typical values are at TA = 25 °C Temp. Min.a Full 2.3 Typ.b Max.a Unit 4.2 V H-Bridge Section Supply Voltage Range VDD Operating Current IDDQ IN = RC = 0 V Full H-Bridge Resistancec RH IOUT = 150 mA Full RC Time-out Voltage V1 Falling edge set by RC Room Fast Discharge Voltage V2 Falling edge set by R1C Room RC Pulse Width TRC R = 500 K, C = 100 nF Room IN Logic High VTHI Rising, M1/M4 on Full IN Logic Low VTLO Falling, M1/M4 off Full 0.82 Hysteresis VHYS VTHI - VTLO Full 0.28 IPD VIN = VDD Room 1.75 µA ns IN Pull- Down current 5 µA 0.85 1.6 Ω 670 756 840 480 644 730 65 mV ms 1.6 Break-Before-Make TBBM Room 50 Trigger Edges TEDGE Input rise and fall Room < 0.1 Trigger Pulse Duration TIN Input minimum pulse width Room ≥2 Trigger Response Time TRT Delay from IN to output Room 0.6 0.5 V µs Notes: a. The algebraic convention whereby the most negative value is a minimum and most positive is a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. RH is the RDS (ON) of M1 + M4 or M2 + M3. PIN CONFIGURATION OUT1 VDD IN OUT2 OUT2 6 1 OUT1 GND GND 5 2 VDD RC 4 3 IN RC BOTTOM VIEW TOP VIEW SC89 PACKAGE Figure 2. PIN DESCRIPTION Pin Number Name 1 2 OUT1 VDD 3 IN Function H-Bridge Output 1 Supply Voltage Input Edge Trigger Direction Control. Positive Edge Sets OUT1 High and OUT2 Low. Negative Edge Sets OUT2 High and OUT1 Low. Pulse Width Timing Setting 4 RC 5 GND Ground Connection 6 OUT2 H-Bridge Output 2 Document Number: 74633 S-80224-Rev. C, 04-Feb-08 www.vishay.com 3 SiP42104 Vishay Siliconix ORDERING INFORMATION Part Number Marking Temperature Range Package SiP42104DX-T1-E3b HLa - 40 °C to 85 °C SC89-6L (SOT666) Notes: a. “H“ is part identifier and “L” is lot and date code identifier. b. T1 Tape and Reel orientation with pin1 bottom left hand corner of cavity. FUNCTIONAL BLOCK DIAGRAM VDD INPUT BUFFER IN AND OUT2 SW2 DEGLITCHER 1.75 µA SW1 RC H-BRIDGE DRIVER + BBM TIMER AND PULSE WIDTH CONTROLLER M1 M2 M3 M4 OUT1 GND Figure 3. www.vishay.com 4 Document Number: 74633 S-80224-Rev. C, 04-Feb-08 SiP42104 Vishay Siliconix TIMING DIAGRAM TEDGE < 100 ns TEDGE < 100 ns T > 2 µs SS Input Control Logic Input Control Logic Output Current VOUT2 VOUT1 TRC = 1.3 x RC TRC = 1.3 x RC Figure 4. DETAILED OPERATIONAL DESCRIPTION SiP42104 is an easy to use integrated H-bridge driver and programmable output pulse width controller IC intended for digital camera micro module focus mode applications. The IC is designed to drive a solenoid of several hundred micro-Henrys and operates over the supply range of 2.3 to 4.2 V. Both H-bridge output can source and sink up to 250 mA. The break-before-make delays prevents shoot-through via M1 to M2 or M3 to M4 in the H-bridge and is guaranteed by design. In the absence of any edge transitions at the input pin, the IC is in the power-down mode with the H-bridge outputs at high impedance drawing only sub micro-amp of leakage current from the supply. The input pin is CMOS logic level and has typical 1.75 µA pull-down current, the input pin is buffered by a Schmitt trigger with the threshold level of 1.1 V and typical hysteresis of 280 mV. A logic transition closes SW2 and initiates the H-Bridge output turn-on for duration set by the external RC time constant. The logic level transition is latched in the device and this logic level transition determines which of the H-Bridge output MOSFETs turns on. If the logic transition is rising from ground to VDD, with the high condition being present for at least 2 µs, then M1 and M4 will turn on, M2 and M3 will turn off. This means that OUT1 will go high and OUT2 will go low. Conversely, a falling logic transition is from VDD to ground, with the low level being present for 2 µs, will turn on M2 and M3, M1 and M4 will turn off. Once the input transition is latched, SiP42104 will ignore any input spurious transition until the RC pin time out is completed. An internal deglitch filter following the input buffer prevents SiP42104 from being accidentally triggered by the input pulse less than 300 ns duration. Document Number: 74633 S-80224-Rev. C, 04-Feb-08 A positive edge transition on the input pin also initiates SiP42104 to charge the RC pin to VDD via SW1. This pre-charge period lasts for approximately 30 µs. When the pre-charge period is completed, SW1 will turn off and the external capacitor begins to discharge via the external resistor. The timer and pulse width controller sense the voltage on RC pin. When the voltage on the RC pin falls to V1 (0.27 x VDD). The timer and pulse width controller terminate the timeout and turn off the relevant H-bridge outputs. This yields and output pulse width given by: TOUTPUT = 1.3 x RC SiP42104 H-bridge output typically drives an inductive load. When output are turned off after the RC timeout, the current will still be flowing in the inductive load. To prevent the load current from forward biasing the body diodes of the output MOSFETs, both H-bridge low-side MOSFETs M2 and M4 will turn on briefly to allow the inductive load current to discharge to zero. When the voltage on the RC pin has fallen to V2 (0.23 x VDD). This yields a discharge time: TDISCHARGE = 0.13 x C x R1 Where R1 is the built-in resistor of 1.1 kΩ. Following this discharge time period, SW2 and all H-bridge output MOSFETs are turned off. SiP42104 powers down to its low quiescent current state. SiP42104 will remain in this state until the next input transition logic applied to the input pin to wake up. www.vishay.com 5 SiP42104 Vishay Siliconix TYPICAL CHARACTERISTICS 1.3 1.15 TA = 25 °C 1.10 1.2 1.1 1.00 VDD = 2.8 V I O = 150 mA RH (%) RH (%) 1.05 0.95 1.0 0.90 0.9 0.85 0.80 2.3 2.8 3.3 3.8 0.8 - 40 4.3 - 15 10 VDD (V) 35 60 85 110 135 Temperature (°C) Normalized RH vs. Temperature Normalized RH vs. VDD 1.2 1.4 VTHI TA = 25 °C Rising VDD = 2.8 V 1.3 1.1 1.2 Rising VTHI VTLO 1.0 1.0 V V 1.1 Falling 0.9 0.9 Falling 0.8 0.8 VTLO 0.7 0.6 2.3 2.8 3.3 3.8 0.7 - 40 4.3 - 15 10 VDD (V) 35 60 85 110 135 Temperature (°C) IN Threshold Voltage vs. VDD IN Threshold Voltage vs. Temperature 6 4.5 TA = 25 °C 4.0 5 3.5 4 VDD = 4.2 V IPD (µA) IPD (µA) 3.0 2.5 2.0 3 2 VDD = 2.8 V 1.5 1 1.0 0.5 2.3 VDD = 2.3 V 2.8 3.3 VDD (V) IPD Current vs. VDD www.vishay.com 6 3.8 4.3 0 - 40 - 15 10 35 60 85 110 135 Temperature (°C) IPD Current vs. Temperature Document Number: 74633 S-80224-Rev. C, 04-Feb-08 SiP42104 Vishay Siliconix TYPICAL CHARACTERISTICS 1.040 1.07 1.035 1.06 1.030 1.05 TA = 25 °C VDD = 2.8 V 1.020 RH (%) RH (%) 1.025 1.015 TA = 25 °C VDD = 2.3 V 1.04 1.03 1.010 1.02 1.005 1.01 1.000 0.995 100 125 150 175 200 225 1.00 100 250 125 150 175 200 225 250 IH (mA) IH (mA) Normalized RH vs. IH Normalized RH vs. IH 1.2 1.4 1.1 1.2 0.9 RH (Ω) RH (Ω) 1.0 0.8 1.0 0.8 0.7 0.6 0.6 0.5 2.0 2.5 3.0 3.5 VDD (V) RH vs. VDD Document Number: 74633 S-80224-Rev. C, 04-Feb-08 4.0 4.5 0.4 - 40 - 15 10 35 60 85 110 135 Temperature (°C) RH vs. Temperature www.vishay.com 7 SiP42104 Vishay Siliconix TYPICAL WAVEFORMS VRC (500 mV/div) VRC (500 mV/div) VOUT (1 V/div) VIN (1 V/div) 0.27 x VDD VOUT (1 V/div) IOUT (50 mA/div) 10 ms/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Steady State Operation 0.23 x VDD 5 ms/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH RC Threshold Voltage VIN (500 mV/div) VIN (500 mV/div) VOUT (1 V/div) VOUT (1 V/div) 200 ns/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Input Rising Edge Trigger Response Time VOUT (1 V/div) 200 ns/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Input Falling Edge Trigger Response Time VIN (500 mV/div) VRC (500 mV/div) IOUT (50 mA/div) VOUT (1 V/div) IOUT (50 mA/div) VIN (500 mV/div) VRC (500 mV/div) 2 µs/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Input Rising Edge Triggering Operation www.vishay.com 8 2 µs/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Input Falling Edge Triggering Operation Document Number: 74633 S-80224-Rev. C, 04-Feb-08 SiP42104 Vishay Siliconix TYPICAL WAVEFORMS VIN (500 mV/div) VOUT (1 V/div) IOUT (50 mA/div) IOUT (50 mA/div) VOUT (1 V/div) VRC (500 mV/div) VRC (500 mV/div) 5 µs/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Inductive Discharge OUT1 to OUT2 VOUT (1 V/div) 50 ns/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Rising Edge TBBM VIN (500 mV/div) 5 µs/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Inductive Discharge OUT2 to OUT1 VOUT (1 V/div) 50 ns/div VIN = 2.8 V, RLOAD = 18 Ω, LLOAD = 80 µH Falling Edge TBBM Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?74633. Document Number: 74633 S-80224-Rev. C, 04-Feb-08 www.vishay.com 9 Package Information Vishay Siliconix L3 SCĆ89: 6ĆLEAD (SOTĆ666) D A b L1 e L2 E E1 B Pin 1 0.10 M C A B b1 e1 q (4 ) A3 A NOTES: 1. All dimensions are in millimeters. 2. Package outline exclusive of mold flash and metal burr. 3. Package outline inclusive of plating. 4. Maximum webbing flash remain 0.075 mm. C MILLIMETERS* Dim A A3 b b1 D E E1 e e1 L1 L2 L3 q INCHES Min Nom Max Min Nom Max 0.56 – 0.60 0.022 – 0.024 0.13 0.17 0.18 0.005 0.006 0.007 0.17 – 0.25 0.006 – 0.010 – 0.27 0.34 – 0.011 0.013 1.50 1.66 1.70 0.059 0.065 0.067 1.50 1.65 1.70 0.059 0.065 0.067 1.10 1.20 1.30 0.043 0.047 0.051 0.50 BSC 0.020 BSC 0.20 – – 0.008 – – 0.11 0.19 0.26 0.004 0.007 0.010 0.10 0.23 0.30 0.004 0.009 0.012 0.05 0.10 – 0.002 0.004 – 8_ 10_ 12_ 8_ 10_ 12_ ECN: S-52444—Rev. D, 28-Nov-05 DWG: 5891 *Use millimeters as the primary measurement Document Number: 72067 28-Nov-05 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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