GSOT05CL-V-G-08

GSOT05CL-V Vishay Semiconductors Two-Line ESD-Protection in SOT-23 FEATURES • Two-line ESD-protection device 2 1 • ESD-protection acc. IEC 61000-4-2 ± 30 kV contact discharge ± 30 kV air discharge • Space saving SOT-23 package 20456 3 20512 1 • AEC-Q101 qualified • e3 - Sn • Compliant to RoHS directive 2002/95/EC and in accordance to WEEE 2002/96/EC MARKING (example only) XX XX 20357 YYY YYY = type code (see table below) XX = date code ORDERING INFORMATION DEVICE NAME GSOT05CL-V ENVIRONMENTAL STATUS Standard Green ORDERING CODE GSOT05CL-V-GS08 GSOT05CL-V-G-08 TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) 3000 MINIMUM ORDER QUANTITY 15 000 PACKAGE DATA DEVICE NAME PACKAGE TYPE ENVIRONMENTAL NAME CODE STATUS 5CL CLG Standard Green WEIGHT 8.8 mg 8.1 mg MOLDING COMPOUND FLAMMABILITY RATING UL 94 V-0 MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS GSOT05CL-V SOT-23 MSL level 1 260 °C/10 s at terminals (according J-STD-020) ABSOLUTE MAXIMUM RATINGS GSOT05CL-V PARAMETER TEST CONDITIONS Pin 1 to 3 or pin 2 to 3 acc. IEC 61000-4-5, tp = 8/20 μs; single shot Pin 1 to 2 or pin 2 to 1; pin 3 not connected acc. IEC 61000-4-5, tp = 8/20 μs; single shot Pin 1 to 3 or pin 2 to 3 acc. IEC 61000-4-5, tp = 8/20 μs; single shot Pin 1 to 2 or pin 2 to 1; pin 3 not connected acc. IEC 61000-4-5, tp = 8/20 μs; single shot Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses Junction temperature SYMBOL VALUE 13 IPPM 13 156 PPP 156 VESD TJ TSTG ± 30 ± 30 - 40 to + 125 - 55 to + 150 W kV kV °C °C A W UNIT A Peak pulse current Peak pulse power ESD immunity Operating temperature Storage temperature ** Please see document “Vishay Material Category Policy”: www.vishay.com/doc?99902 Document Number: 85182 Rev. 1.2, 01-Jul-10 For technical questions, contact: ESDprotection@vishay.com www.vishay.com 1 GSOT05CL-V Vishay Semiconductors Two-Line ESD-Protection in SOT-23 BiAs-MODE (2-line bidirectional asymmetrical protection mode) With the GSOT05CL-V two signal- or data-lines (L1, L2) can be protected against voltage transients. With pin 3 connected to ground and pin 1 and pin 2 connected to a signal- or data-line which has to be protected. As long as the voltage level on the data- or signal-line is between 0 V (ground level) and the specified maximum reverse working voltage (VRWM) the protection diode between pin 2 and pin 3 and between pin 1 and pin 3 offer a high isolation to the ground line. The protection device behaves like an open switch. As soon as any positive transient voltage signal exceeds the break through voltage level of the protection diode, the diode becomes conductive and shorts the transient current to ground. Now the protection device behaves like a closed switch. The clamping voltage (VC) is defined by the breakthrough voltage (VBR) level plus the voltage drop at the series impedance (resistance and inductance) of the protection device. Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the forward direction of the protection diode. The low forward voltage (VF) clamps the negative transient close to the ground level. Due to the different clamping levels in forward and reverse direction the GSOT05CL-V clamping behaviour is bidirectional and asymmetrical (BiAs). L1 L2 2 1 3 BiAs 20358 Ground If a higher surge current or peak pulse current (IPP) is needed, both protection diodes in the GSOTxxC can also be used in parallel in order to “double” the performance. This offers: • double surge power = double peak pulse current (2 x IPPM) • half of the line inductance = reduced clamping voltage • half of the line resistance = reduced clamping voltage • double line capacitance (2 x CD) • double reverse leakage current (2 x IR) L1 2 1 3 Ground 20359 ELECTRICAL CHARACTERISTICS GSOT05CLV PARAMETER Protection paths Reverse working voltage Reverse current Reverse breakdown voltage Reverse clamping voltage Forward clamping voltage Capacitance TEST CONDITIONS/REMARKS Number of lines which can be protected at IR = 1 μA at VR = 5.5 V at IR = 1 mA at IPP = 1 A at IPP = IPPM = 13 A at IPP = 1 A at IPP = IPPM = 30 A at VR = 0 V; f = 1 MHz at VR = 2.5V; f = 1 MHz SYMBOL Nchannel VRWM IR VBR VC VF CD MIN. 5.5 6 TYP. 6.1 6.75 6.9 10 1 2.6 100 60 MAX. 1 7 1 9 12 1.3 3 120 UNIT lines V μA V V V V V pF pF Note • BiAs mode (between pin 1 to pin 3 or pin 2 to 1) www.vishay.com 2 For technical questions, contact: ESDprotection@vishay.com Document Number: 85182 Rev. 1.2, 01-Jul-10 GSOT05CL-V Two-Line ESD-Protection in SOT-23 Vishay Semiconductors BiSY-MODE (1-line bidirectional symmetrical protection mode) If a bipolar symmetrical protection device is needed the GSOT05CL-V can also be used as a single line protection device. Therefore pin 1 has to be connected to the signal- or data-line (L1) and pin 2 to ground (or vice versa). Pin 3 must not be connected. Positive and negative voltage transients will be clamped in the same way. The clamping current through the GSOT05CL-V passes one diode in forward direction and the other one in reverse direction. The clamping voltage (VC) is defined by the breakthrough voltage (VBR) level of one diode plus the forward voltage of the other diode plus the voltage drop at the series impedances (resistances and inductances) of the protection device. Due to the same clamping levels in positive and negative direction the GSOT05CL-V voltage clamping behaviour is bidirectional and symmetrical (BiSy). L1 1 3 BiSy 20361 Ground ELECTRICAL CHARACTERISTICS GSOT05CL-V PARAMETER Protection paths Reverse working voltage Reverse current Reverse breakdown voltage Reverse clamping voltage Capacitance TEST CONDITIONS/REMARKS Number of lines which can be protected at IR = 1 μA at VR = 6 V at IR = 1 mA at IPP = 1 A at IPP = IPPM = 13 A at VR = 0 V; f = 1 MHz at VR = 2.5 V; f = 1 MHz SYMBOL Nchannel VRWM IR VBR VC CD MIN. 6 6.5 TYP. 7.5 8 12.6 50 37 MAX. 1 1 10 15 60 UNIT lines V μA V V V pF pF Note • Ratings at 25 °C, ambient temperature unless otherwise specified. BiAs mode (between pin 1 to 2 or pin 2 to 1; pin 3 not connected) TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 120 % Rise time = 0.7 ns to 1 ns 100 % 80 % 80 % 60 % 53 % 2 8 µs to 100 % Discharge Current IESD 100 % IPPM 60 % 20 µs to 50 % 40 % 20 % 0% 0 10 20 30 40 40 % 27 % 20 % 0% - 10 0 10 20 30 40 50 60 70 80 90 100 20557 Time (ns) 20548 Time (µs) Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 W/150 pF) Fig. 2 - 8/20 µs Peak Pulse Current Wave Form acc. IEC 61000-4-5 Document Number: 85182 Rev. 1.2, 01-Jul-10 For technical questions, contact: ESDprotection@vishay.com www.vishay.com 3 GSOT05CL-V Vishay Semiconductors Two-Line ESD-Protection in SOT-23 120 f = 1MHz 100 80 Pin 1 to 3 or pin 2 to 3 15 10 5 positive surge Pin 1 to 3 or pin 2 to 3 CD (pF) VC (V) 60 40 20 0 0 1 2 3 4 5 6 Pin 1 to 2 or pin 2 to 1 0 -5 - 10 - 15 0 2 negative surge Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 4 6 8 VC 10 12 14 16 21918 VR (V) 21921 IPP (A) Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR Fig. 6 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP 102 101 1 Pin 1 to 3 or pin 2 to 3 15 positive surge 10 Pin 1 to 2 5 IF (mA) 10-1 10-2 10-3 10-4 10-5 10-6 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VC (V) 0 -5 - 10 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) VC negative surge - 15 0 21925 21919 VF (V) 2 4 6 8 10 12 14 16 Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF IPP (A) Fig. 7 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP 9 8 7 6 Pin 1 to 2 or pin 2 to 1 Pin 1 to 3 or pin 2 to 3 80 60 40 acc. IEC 61000-4-2 + 8 kV contact discharge VR (V) 5 4 3 2 1 0 0.01 0.1 1 VC-ESD (V) 20 0 - 20 - 40 - 60 - 10 0 21922 10 100 1000 10 000 Pin 1 to 3 or pin 2 to 3 pos. discharge 21920 IR (µA) 10 20 30 40 50 60 70 80 90 Fig. 5 - Typical Reverse Voltage VR vs. Reverse Current IR t (ns) Fig. 8 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) www.vishay.com 4 For technical questions, contact: ESDprotection@vishay.com Document Number: 85182 Rev. 1.2, 01-Jul-10 GSOT05CL-V Two-Line ESD-Protection in SOT-23 Vishay Semiconductors 60 40 20 acc. IEC 61000-4-2 - 8 kV contact discharge 250 200 150 100 acc. IEC 61000-4-2 contact discharge VC-ESD (V) 0 - 20 - 40 - 60 - 80 - 10 0 Pin 1 to 3 or pin 2 to 3 neg. discharge VC-ESD (V) 50 0 - 50 - 100 - 150 - 200 Pin 1 to 3 or pin 2 to 3 0 5 10 15 20 25 30 VC-ESD 10 20 30 40 50 60 70 80 90 - 250 21924 21923 t (ns) VESD (kV) Fig. 9 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) Fig. 10 - Typical Peak. Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) PACKAGE DIMENSIONS in millimeters (inches): SOT-23 1.15 (0.045) 0.9 (0.035) 0.9 (0.035) 0.1 (0.004) max. 3.1 (0.122) 2.8 (0.110) 0.550 ref. (0.022 ref.) 0.175 (0.007) 0.098 (0.004) 0.2 (0.008) 0.45 (0.018) 0.35 (0.014) 0.45 (0.018) 0.35 (0.014) 0.3 (0.012) 2.6 (0.102) 2.35 (0.093) 0.45 (0.018) 1.43 (0.056) 0.35 (0.014) 1.20 (0.047) Foot print recommendation: 0.7 (0.028) 1 (0.039) 0.9 (0.035) 1 (0.039) 0.9 (0.035) 2 (0.079) 0.95 (0.037) 0.95 (0.037) Document no.: 6.541-5014.01-4 Rev. 8 - Date: 23.Sept.2009 17418 Document Number: 85182 Rev. 1.2, 01-Jul-10 For technical questions, contact: ESDprotection@vishay.com www.vishay.com 5 0° t 0.5 (0.020) o8 ° Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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