PBSS4160PANP
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
20 December 2017
Product data sheet
1. General description
NPN/PNP low VCEsat Breakthrough In Small Signal (BISS) transistor in a leadless medium power
DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.
NPN/NPN complement: PBSS4160PAN. PNP/PNP complement: PBSS5160PAP.
2. Features and benefits
•
•
•
•
•
•
Very low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
High collector current gain hFE at high IC
Reduced Printed-Circuit Board (PCB) requirements
High efficiency due to less heat generation
AEC-Q101 qualified
3. Applications
•
•
•
•
•
Load switch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
-
60
V
-
-
1
A
Per transistor; for the PNP transistor with negative polarity
VCEO
collector-emitter
voltage
open base
IC
collector current
ICM
peak collector current
single pulse; tp ≤ 1 ms
-
-
1.5
A
collector-emitter
saturation resistance
IC = 0.5 A; IB = 50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
240
mΩ
collector-emitter
saturation resistance
IC = -0.5 A; IB = -50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
360
mΩ
TR1 (NPN)
RCEsat
TR2 (PNP)
RCEsat
PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
1
E1
emitter TR1
2
B1
base TR1
3
C2
collector TR2
4
E2
emitter TR2
5
B2
base TR2
6
C1
collector TR1
7
C1
collector TR1
8
C2
collector TR2
Simplified outline
6
5
7
1
Graphic symbol
4
8
2
3
Transparent top view
C1
B2
E2
TR2
TR1
E1
B1
C2
sym139
DFN2020-6 (SOT1118)
6. Ordering information
Table 3. Ordering information
Type number
PBSS4160PANP
Package
Name
Description
Version
DFN2020-6
DFN2020-6: plastic thermal enhanced ultra thin small outline
package; no leads; 6 terminals; body 2 x 2 x 0.65 mm
SOT1118
7. Marking
Table 4. Marking codes
Type number
Marking code
PBSS4160PANP
2M
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
Per transistor; for the PNP transistor with negative polarity
VCBO
collector-base voltage
open emitter
-
60
V
VCEO
collector-emitter voltage
open base
-
60
V
VEBO
emitter-base voltage
open collector
-
7
V
IC
collector current
-
1
A
ICM
peak collector current
-
1.5
A
IB
base current
-
0.3
A
IBM
peak base current
single pulse; tp ≤ 1 ms
-
1
A
Ptot
total power dissipation
Tamb ≤ 25 °C
[1]
-
370
mW
[2]
-
570
mW
[3]
-
530
mW
[4]
-
700
mW
[5]
-
450
mW
[6]
-
760
mW
[7]
-
700
mW
[8]
-
1450
mW
[1]
-
510
mW
[2]
-
780
mW
[3]
-
730
mW
[4]
-
960
mW
[5]
-
620
mW
[6]
-
1040
mW
[7]
-
960
mW
[8]
-
2000
mW
single pulse; tp ≤ 1 ms
Per device
Ptot
total power dissipation
Tamb ≤ 25 °C
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
-55
150
°C
Tstg
storage temperature
-65
150
°C
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
1.5
006aad165
(1)
Ptot
(W)
1.0
(2)
(3) (4)
(5)
0.5 (6)
(7)
(8)
0
-75
-25
25
75
2
125
175
Tamb (°C)
(1) 4-layer PCB 70 µm, mounting pad for collector 1 cm
2
(2) FR4 PCB 70 µm, mounting pad for collector 1 cm
(3) 4-layer PCB 70 µm, standard footprint
2
(4) 4-layer PCB 35 µm, mounting pad for collector 1 cm
2
(5) FR4 PCB 35 µm, mounting pad for collector 1 cm
(6) 4-layer PCB 35 µm, standard footprint
(7) FR4 PCB 70 µm, standard footprint
(8) FR4 PCB 35 µm, standard footprint
Fig. 1.
Per transistor: power derating curves
9. Thermal characteristics
Table 6. Thermal characteristics
Symbol
Parameter
Conditions
thermal resistance
from junction to
ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
338
K/W
[2]
-
-
219
K/W
[3]
-
-
236
K/W
[4]
-
-
179
K/W
[5]
-
-
278
K/W
[6]
-
-
164
K/W
[7]
-
-
179
K/W
[8]
-
-
86
K/W
-
-
30
K/W
Per transistor
Rth(j-a)
Rth(j-sp)
thermal resistance
from junction to solder
point
PBSS4160PANP
Product data sheet
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PBSS4160PANP
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60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
Symbol
Parameter
Conditions
thermal resistance
from junction to
ambient
in free air
Min
Typ
Max
Unit
[1]
-
-
245
K/W
[2]
-
-
160
K/W
[3]
-
-
171
K/W
[4]
-
-
130
K/W
[5]
-
-
202
K/W
[6]
-
-
120
K/W
[7]
-
-
130
K/W
[8]
-
-
63
K/W
Per device
Rth(j-a)
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on an FR4 PCB, single-sided 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated and standard footprint.
2
Device mounted on 4-layer PCB 70 µm copper strip line, tin-plated, mounting pad for collector 1 cm .
006aad166
103
Zth(j-a)
(K/W)
102
duty cycle = 1
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
0.01
0
1
10-5
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
FR4 PCB 35 µm, standard footprint
Fig. 2.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4160PANP
Product data sheet
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Nexperia B.V. 2017. All rights reserved
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aad167
103
Zth(j-a)
(K/W)
102
duty cycle = 1
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
1
10-5
0.01
0
10-4
10-3
10-2
10-1
FR4 PCB 35 µm, mounting pad for collector 1 cm
Fig. 3.
1
10
102
2
tp (s)
103
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aad168
103
Zth(j-a)
(K/W)
102
duty cycle = 1
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
1
10-5
0.01
0
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
4-layer PCB 35 µm, standard footprint
Fig. 4.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aad169
103
Zth(j-a)
(K/W)
102
duty cycle = 1
0.75
0.33
0.5
0.2
0.1
0.05
10
0.02
0.01
1
10-5
0
10-4
10-3
10-2
10-1
4-layer PCB 35 µm, mounting pad for collector 1 cm
Fig. 5.
1
10
102
2
tp (s)
103
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aac610
103
Zth(j-a)
(K/W)
duty cycle = 1
0.75
102
0.33
0.5
0.2
0.1
0.05
10
0.02
0
1
5
10
0.01
10- 4
10- 3
10- 2
10- 1
1
10
102
tp (s)
103
FR4 PCB 70 µm, standard footprint
Fig. 6.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aac611
103
Zth(j-a)
(K/W)
duty cycle = 1
102
0.75
0.5
0.33
0.2
10
0.1
0.05
0.02
0
1
10- 5
0.01
10- 4
10- 3
10- 2
10- 1
FR4 PCB 70 µm, mounting pad for collector 1 cm
Fig. 7.
1
10
102
2
tp (s)
103
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
006aad170
103
Zth(j-a)
(K/W)
102
duty cycle = 1
0.75
0.5
0.33
0.2
0.1
0.05
10
0.02
0.01
1
10-5
0
10-4
10-3
10-2
10-1
1
10
102
tp (s)
103
4-layer PCB 70 µm, standard footprint
Fig. 8.
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
102
006aad171
duty cycle = 1
0.75
Zth(j-a)
(K/W)
0.5
0.33
0.2
10
0.1
0.05
0.02
0.01
0
1
10-5
10-4
10-3
10-2
10-1
4-layer PCB 70 µm, mounting pad for collector 1 cm
Fig. 9.
1
10
102
2
tp (s)
103
Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration;
typical values
PBSS4160PANP
Product data sheet
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PBSS4160PANP
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60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
10. Characteristics
Table 7. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
collector-base cut-off
current
VCB = 48 V; IE = 0 A; Tamb = 25 °C
-
-
100
nA
VCB = 48 V; IE = 0 A; Tj = 150 °C
-
-
50
µA
IEBO
emitter-base cut-off
current
VEB = 5 V; IC = 0 A; Tamb = 25 °C
-
-
100
nA
hFE
DC current gain
VCE = 2 V; IC = 100 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
290
430
-
VCE = 2 V; IC = 500 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
150
220
-
VCE = 2 V; IC = 1 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
70
110
-
IC = 500 mA; IB = 50 mA; Tamb = 25 °C
-
90
120
mV
IC = 1 A; IB = 50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
185
240
mV
IC = 1 A; IB = 100 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
175
220
mV
IC = 0.5 A; IB = 50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
240
mΩ
-
-
1
V
-
-
1.1
V
IC = 1 A; IB = 100 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
1.1
V
TR1 (NPN)
ICBO
VCEsat
collector-emitter
saturation voltage
RCEsat
collector-emitter
saturation resistance
VBEsat
base-emitter saturation IC = 500 mA; IB = 50 mA; Tamb = 25 °C
voltage
IC = 1 A; IB = 50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
VBEon
base-emitter turn-on
voltage
VCE = 2 V; IC = 0.5 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
0.9
V
td
delay time
-
15
-
ns
tr
rise time
VCC = 10 V; IC = 0.5 A; IBon = 25 mA;
IBoff = -25 mA; Tamb = 25 °C
-
90
-
ns
ton
turn-on time
-
105
-
ns
ts
storage time
-
410
-
ns
tf
fall time
-
130
-
ns
toff
turn-off time
-
540
-
ns
fT
transition frequency
VCE = 10 V; IC = 50 mA; f = 100 MHz;
Tamb = 25 °C
90
175
-
MHz
Cc
collector capacitance
VCB = 10 V; IE = 0 A; ie = 0 A;
f = 1 MHz; Tamb = 25 °C
-
4
6
pF
collector-base cut-off
current
VCB = -48 V; IE = 0 A
-
-
-100
nA
VCB = -48 V; IE = 0 A; Tj = 150 °C
-
-
-50
µA
emitter-base cut-off
current
VEB = -5 V; IC = 0 A
-
-
-100
nA
TR2 (PNP)
ICBO
IEBO
PBSS4160PANP
Product data sheet
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PBSS4160PANP
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60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
Symbol
Parameter
Conditions
Min
Typ
Max
hFE
DC current gain
VCE = -2 V; IC = -100 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
170
245
-
VCE = -2 V; IC = -500 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
120
170
-
VCE = -2 V; IC = -1 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
70
100
-
IC = -500 mA; IB = -50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-125
-180
mV
IC = -1 A; IB = -50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-390
-550
mV
IC = -1 A; IB = -100 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-240
-340
mV
IC = -0.5 A; IB = -50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
360
mΩ
-
-
-1
V
IC = -1 A; IB = -50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
-1
V
IC = -1 A; IB = -100 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
-1.1
V
VCEsat
collector-emitter
saturation voltage
RCEsat
collector-emitter
saturation resistance
VBEsat
base-emitter saturation IC = -500 mA; IB = -50 mA; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
voltage
Unit
VBEon
base-emitter turn-on
voltage
VCE = -2 V; IC = -0.5 A; tp ≤ 300 µs;
pulsed; δ ≤ 0.02 ; Tamb = 25 °C
-
-
-0.9
V
td
delay time
-
15
-
ns
tr
rise time
VCC = -10 V; IC = -0.5 A; IBon = -25 mA;
IBoff = 25 mA; Tamb = 25 °C
-
40
-
ns
ton
turn-on time
-
55
-
ns
ts
storage time
-
95
-
ns
tf
fall time
-
40
-
ns
toff
turn-off time
-
135
-
ns
fT
transition frequency
VCE = -10 V; IC = -50 mA; f = 100 MHz;
Tamb = 25 °C
65
125
-
MHz
Cc
collector capacitance
VCB = -10 V; IE = 0 A; ie = 0 A;
f = 1 MHz; Tamb = 25 °C
-
9.5
13
pF
PBSS4160PANP
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PBSS4160PANP
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60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aad204
800
006aad205
1.50
IB = 15 mA
IC
(A)
hFE
(1)
13.5
12
10.5
1.00
600
(2)
9
7.5
6
0.75
4.5
400
3
0.50
(3)
1.5
200
0.25
0
10-1
1
10
102
0
103
104
IC (mA)
VCE = 2 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
0
1
2
3
4
VCE (V)
5
Tamb = 25 °C
Fig. 11. TR1 (NPN): Collector current as a function of
collector-emitter voltage; typical values
Fig. 10. TR1 (NPN): DC current gain as a function of
collector current; typical values
006aad206
1.2
006aad207
1.2
VBEsat
(V)
VBE
(V)
1.0
(1)
0.8
(1)
0.8
(2)
(2)
(3)
0.6
(3)
0.4
0.4
0
10-1
1
10
102
0.2
10-1
103
104
IC (mA)
VCE = 2 V
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Product data sheet
10
102
103
104
IC (mA)
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb= 100 °C
Fig. 12. TR1 (NPN): Base-emitter voltage as a function
of collector current; typical values
PBSS4160PANP
1
Fig. 13. TR1 (NPN): Base-emitter saturation voltage as
a function of collector current; typical values
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Nexperia B.V. 2017. All rights reserved
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aad208
1
006aad209
10
VCEsat
(V)
VCEsat
(V)
1
(1)
10-1
(2)
10-1
(1)
(3)
10-2
(2)
10-2
(3)
10-3
10-1
1
102
10
10-3
10-1
103
104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
1
10
102
103
104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig. 14. TR1 (NPN): Collector-emitter saturation voltage Fig. 15. TR1 (NPN): Collector-emitter saturation voltage
as a function of collector current; typical
as a function of collector current; typical
values
values
006aad210
103
RCEsat
(Ω)
RCEsat
(Ω)
102
102
10
10
(1)
(2)
1
006aad211
103
(1)
(2)
1
10-1
10-1
(3)
(3)
10-2
10-1
1
10
102
10-2
10-1
103
104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Product data sheet
10
102
103
104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig. 16. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4160PANP
1
Fig. 17. TR1 (NPN): Collector-emitter saturation
resistance as a function of collector current;
typical values
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aad212
500
-1.50
hFE
IC
(A)
400
006aad213
IB = -20 mA
-18
-16
-14
-1.00
(1)
-12
-10
300
-8
-0.75
-6
(2)
200
-4
-0.50
(3)
100
0
-10-1
-1
-2
-0.25
-10
-102
0
-103
-104
IC (mA)
VCE = −2 V
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
0
-1
-2
-3
-4
VCE (V)
-5
Tamb = 25 °C
Fig. 19. TR2 (PNP): Collector current as a function of
collector-emitter voltage; typical values
Fig. 18. TR2 (PNP): DC current gain as a function of
collector current; typical values
006aad214
-1.2
006aad215
-1.2
VBEsat
(V)
VBE
(V)
-1.0
-0.8
(1)
(1)
-0.8
(2)
(2)
-0.6
(3)
(3)
-0.4
-0.4
0
-10-1
-1
-10
-102
-0.2
-10-1
-103
-104
IC (mA)
VCE = −2 V
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Product data sheet
-10
-102
-103
-104
IC (mA)
IC/IB = 20
(1) Tamb = −55 °C
(2) Tamb = 25 °C
(3) Tamb = 100 °C
Fig. 20. TR2 (PNP): Base-emitter voltage as a function
of collector current; typical values
PBSS4160PANP
-1
Fig. 21. TR2 (PNP): Base-emitter saturation voltage as a
function of collector current; typical values
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
006aad216
-10
006aad217
-10
VCEsat
(V)
VCEsat
(V)
-1
-1
(1)
(2)
-10-1
-10-1
(1)
(2)
(3)
-10-2
(3)
-10-2
-10-3
-10-1
-1
-10
-102
-10-3
-10-1
-103
-104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
-1
-10
-102
-103
-104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB = 10
Fig. 22. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical
values
006aad218
103
Fig. 23. TR2 (PNP): Collector-emitter saturation voltage
as a function of collector current; typical
values
006aad219
103
RCEsat
(Ω)
RCEsat
(Ω)
102
102
(1)
10
10
(1)
(2)
1
(2)
1
10-1
10-1
-10-1
(3)
-1
-10
-102
10-2
-10-1
-103
-104
IC (mA)
IC/IB = 20
(1) Tamb = 100 °C
(2) Tamb = 25 °C
(3) Tamb = −55 °C
Product data sheet
-1
-10
-102
-103
-104
IC (mA)
Tamb = 25 °C
(1) IC/IB = 100
(2) IC/IB = 50
(3) IC/IB= 10
Fig. 24. TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
PBSS4160PANP
(3)
Fig. 25. TR2 (PNP): Collector-emitter saturation
resistance as a function of collector current;
typical values
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
11. Test information
IB
input pulse
(idealized waveform)
90 %
IBon (100 %)
10 %
IBoff
output pulse
(idealized waveform)
IC
90 %
IC (100 %)
10 %
t
td
ts
tr
ton
tf
toff
006aaa003
Fig. 26. TR1 (NPN): BISS transistor switching time definition
VBB
RB
(probe)
oscilloscope
450 Ω
VCC
RC
Vo
(probe)
450 Ω
R2
VI
oscilloscope
DUT
R1
mlb826
Fig. 27. TR1 (NPN): Test circuit for switching times
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
- IB
input pulse
(idealized waveform)
90 %
- I Bon (100 %)
10 %
- I Boff
output pulse
(idealized waveform)
- IC
90 %
- I C (100 %)
10 %
t
td
ts
tr
t on
tf
t off
006aaa266
Fig. 28. TR2 (PNP): BISS transistor switching time definition
VBB
RB
(probe)
oscilloscope
450 Ω
VCC
RC
Vo
(probe)
450 Ω
R2
VI
oscilloscope
DUT
R1
mgd624
Fig. 29. TR2 (PNP): Test circuit for switching times
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
12. Package outline
2.1
1.9
0.65
max
1.1
0.9
2.1
1.9
0.77
0.57
(2×)
0.54
0.44
(2×)
0.04
max
3
4
1
6
0.65
(4×)
0.35
0.25
(6×)
0.3
0.2
Dimensions in mm
10-05-31
Fig. 30. Package outline DFN2020-6 (SOT1118)
13. Soldering
2.1
0.65
0.49
0.65
0.49
0.3 0.4
(6×) (6×)
solder lands
0.875
1.05 1.15
(2×) (2×)
2.25
0.875
solder paste
solder resist
occupied area
Dimensions in mm
0.35
(6×)
0.72
(2×)
0.45
(6×)
0.82
(2×)
sot1118_fr
Fig. 31. Reflow soldering footprint for DFN2020-6 (SOT1118)
PBSS4160PANP
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
14. Revision history
Table 8. Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
PBSS4160PANP v.2
20171220
Product data sheet
-
PBSS4160PANP v.1
-
-
Modifications:
PBSS4160PANP v.1
PBSS4160PANP
Product data sheet
•
Characteristics: Fig. 22 corrected
20130114
Product data sheet
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
15. Legal information
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Data sheet status
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nexperia.com.
Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
Nexperia does not give any representations or warranties as to the accuracy
or completeness of information included herein and shall have no liability for
the consequences of use of such information.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
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or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
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In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
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Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’ aggregate and cumulative liability towards customer
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
PBSS4160PANP
Product data sheet
Trademarks
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PBSS4160PANP
Nexperia
60 V, 1 A NPN/PNP low VCEsat (BISS) transistor
16. Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Thermal characteristics............................................... 4
10. Characteristics.......................................................... 10
11. Test information....................................................... 16
12. Package outline........................................................ 18
13. Soldering................................................................... 18
14. Revision history........................................................19
15. Legal information..................................................... 20
©
Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 20 December 2017
PBSS4160PANP
Product data sheet
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