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74AHC1G32GW,165

74AHC1G32GW,165

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    TSSOP5

  • 描述:

    IC GATE OR 1CH 2-INP 5TSSOP

  • 数据手册
  • 价格&库存
74AHC1G32GW,165 数据手册
Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia 74AHC1G32; 74AHCT1G32 2-input OR gate Rev. 8 — 18 November 2014 Product data sheet 1. General description 74AHC1G32 and 74AHCT1G32 are high-speed Si-gate CMOS devices. They provide a 2-input OR function. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits  Symmetrical output impedance  High noise immunity  ESD protection:  HBM JESD22-A114E: exceeds 2000 V  MM JESD22-A115-A: exceeds 200 V  CDM JESD22-C101C: exceeds 1000 V  Low power dissipation  Balanced propagation delays  SOT353-1 and SOT753 package options  Specified from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74AHC1G32GW Package Temperature range Name Description Version 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74AHCT1G32GW 74AHC1G32GV 74AHCT1G32GV 74AHC1G32; 74AHCT1G32 NXP Semiconductors 2-input OR gate 4. Marking Table 2. Marking codes Type number Marking code[1] 74AHC1G32GW AG 74AHCT1G32GW CG 74AHC1G32GV A32 74AHCT1G32GV C32 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram  %  $ <    PQD PQD Fig 1. •  Logic symbol Fig 2. IEC logic symbol % < $ PQD Fig 3. Logic diagram 6. Pinning information 6.1 Pinning $+&* $+&7* %  $  *1'   9&&  < DDN Fig 4. Pin configuration SOT353-1 (TSSOP5) and SOT753 (SC-74A) 74AHC_AHCT1G32 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 18 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 13 74AHC1G32; 74AHCT1G32 NXP Semiconductors 2-input OR gate 6.2 Pin description Table 3. Pin description Symbol Pin Description B 1 data input A 2 data input GND 3 ground (0 V) Y 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level Inputs Output A B Y L L L L H H H L H H H H 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VCC Conditions Min Max Unit supply voltage 0.5 +7.0 V VI input voltage 0.5 +7.0 V 20 - mA - 20 mA - 25 mA IIK input clamping current VI < 0.5 V IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V IO output current 0.5 V < VO < VCC + 0.5 V ICC supply current - 75 mA IGND ground current 75 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot Tamb = 40 C to +125 C [1] [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. 74AHC_AHCT1G32 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 8 — 18 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 13 74AHC1G32; 74AHCT1G32 NXP Semiconductors 2-input OR gate 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC1G32 Min Typ 74AHCT1G32 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.3 V  0.3 V - - 100 - - - ns/V VCC = 5.0 V  0.5 V - - 20 - - 20 ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V HIGH-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V For type 74AHC1G32 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage 3.94 - - 3.8 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A CI input capacitance - 1.5 10 - 10 - 10 pF 74AHC_AHCT1G32 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 8 — 18 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 13 74AHC1G32; 74AHCT1G32 NXP Semiconductors 2-input OR gate Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max For type 74AHCT1G32 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V IO = 8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A IO = 8.0 mA VI = 5.5 V or GND; VCC = 0 V to 5.5 V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A ICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; tr = tf =  3.0 ns. For waveform see Figure 5. For test circuit see Figure 6. Symbol Parameter 25 C Conditions Min Typ 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max For type 74AHC1G32 tpd propagation delay [1] A and B to Y VCC = 3.0 V to 3.6 V [2] CL = 15 pF - 4.4 7.9 1.0 9.5 1.0 10.0 ns CL = 50 pF - 6.3 11.4 1.0 13.0 1.0 14.5 ns - 3.2 5.5 1.0 6.5 1.0 7.0 ns - 4.6 7.5 1.0 8.5 1.0 9.5 ns - 16 - - - - - pF VCC = 4.5 V to 5.5 V [3] CL = 15 pF CL = 50 pF CPD power dissipation capacitance 74AHC_AHCT1G32 Product data sheet per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [4] All information provided in this document is subject to legal disclaimers. Rev. 8 — 18 November 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 13 74AHC1G32; 74AHCT1G32 NXP Semiconductors 2-input OR gate Table 8. Dynamic characteristics …continued GND = 0 V; tr = tf =  3.0 ns. For waveform see Figure 5. For test circuit see Figure 6. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 3.3 6.9 1.0 8.0 1.0 9.0 ns - 4.8 7.9 1.0 9.0 1.0 10 ns - 17 - - - - - pF For type 74AHCT1G32 propagation delay tpd [1] A and B to Y VCC = 4.5 V to 5.5 V [3] CL = 15 pF CL = 50 pF power dissipation capacitance CPD per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [1] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [4] [3] Typical values are measured at VCC = 5.0 V. [4] CPD is used to determine the dynamic power dissipation PD (W). PD = CPD  VCC2  fi +  (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 12. Waveforms $%LQSXW  90 W3+/
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