ESP32S2SOLO
ESP32S2SOLOU
Datasheet
2.4 GHz WiFi (802.11 b/g/n) module
Built around ESP32S2 series of SoC (chip revision v0.0), Xtensa® singlecore 32bit LX7 mi
croprocessor
Flash up to 16 MB, optional 2 MB PSRAM in chip package
36 GPIOs, rich set of peripherals
Onboard PCB antenna or external antenna connector
ESP32S2SOLO
ESP32S2SOLOU
Version 1.6
Espressif Systems
Copyright © 2023
www.espressif.com
1 Module Overview
1 Module Overview
Note:
Check the link or the QR code to make sure that you use the latest version of this document:
https://www.espressif.com/documentation/esp32-s2-solo_esp32-s2-solo-u_datasheet_en.pdf
1.1 Features
CPU and OnChip Memory
Integrated Components on Module
• ESP32-S2 or ESP32-S2R2 embedded, Xtensa®
• 40 MHz crystal oscillator
single-core 32-bit LX7 microprocessor, up to 240
• 4 MB SPI flash
MHz
• 128 KB ROM
Antenna Options
• 320 KB SRAM
• On-board PCB antenna (ESP32-S2-SOLO)
• 16 KB SRAM in RTC
• External antenna via a connector
• 2 MB embedded PSRAM (ESP32-S2R2 only)
(ESP32-S2-SOLO-U)
WiFi
Operating Conditions
• 802.11 b/g/n
• Operating voltage/Power supply: 3.0 ~ 3.6 V
• Bit rate: 802.11n up to 150 Mbps
• Operating ambient temperature:
• A-MPDU and A-MSDU aggregation
– 85 °C version: –40 ~ 85 °C
• 0.4 µs guard interval support
– 105 °C version: –40 ~ 105 °C
• Operating frequency: 2412 ~ 2484 MHz
(ESP32-S2-SOLO-H4 and
ESP32-S2-SOLO-U-H4 only)
Peripherals
• GPIO, SPI, LCD, UART, I2C, I2S, Camera
interface, IR, pulse counter, LED PWM, TWAI®
(compatible with ISO 11898-1, i.e. CAN
Specification 2.0), full-speed USB OTG, ADC,
DAC, touch sensor, temperature sensor
Certification
• RF certification: See certificates
• Green certification: RoHS/REACH
Note:
Test
* Please refer to ESP32-S2 Series Datasheet for
detailed information about the module peripherals.
• HTOL/HTSL/uHAST/TCT/ESD
1.2 Description
ESP32-S2-SOLO and ESP32-S2-SOLO-U are two powerful, generic Wi-Fi MCU modules that have a rich set of
peripherals. They are an ideal choice for a wide variety of application scenarios relating to Internet of Things (IoT),
wearable electronics and smart home.
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
1 Module Overview
ESP32-S2-SOLO comes with a PCB antenna (ANT). ESP32-S2-SOLO-U comes with an external antenna
connector (CONN). A wide selection of module variants are available for customers as shown in Table 1 and
Table 2.
Table 1: ESP32S2SOLO (ANT) Series Comparison1
Ordering Code
PSRAM4
Flash
1
(°C)
(mm)
–40 ∼ 85
—
–40 ∼ 105
2 MB (Quad SPI)
–40 ∼ 85
4 MB (Quad SPI)
ESP32-S2-SOLO-N4R2
Size3
—
ESP32-S2-SOLO-N4
ESP32-S2-SOLO-H4
Ambient Temp.2
18.0 × 25.5 × 3.1
This table shares the same notes presented in Table 2 below.
Table 2: ESP32S2SOLOU (CONN) Series Comparison
Ordering Code
PSRAM4
Flash
ESP32-S2-SOLO-U-N4
ESP32-S2-SOLO-U-H4
ESP32-S2-SOLO-U-N4R2
2
Ambient Temp.2
Size3
(°C)
(mm)
–40 ∼ 85
—
–40 ∼ 105
—
4 MB (Quad SPI)
2 MB (Quad SPI)
4
18.0 × 19.2 × 3.2
–40 ∼ 85
Ambient temperature specifies the recommended temperature range of the environment immediately outside the Espressif module.
3
For details, refer to Section 7.1 Physical Dimensions.
4
The PSRAM is integrated in the chip’s package.
In this datasheet unless otherwise stated, ESP32-S2-SOLO refers to all variants of ESP32-S2-SOLO, whereas
ESP32-S2-SOLO-U refers to all variants of ESP32-S2-SOLO-U.
The ESP32-S2 chip and the ESP32-S2R2 chip at the core of the two modules fall into the same category,
namely ESP32-S2 series (chip revision v0.0). ESP32-S2 series of chips has an Xtensa® 32-bit LX7 CPU that
operates at up to 240 MHz. It has a low-power co-processor that can be used instead of the CPU to save power
while performing tasks that do not require much computing power, such as monitoring of peripherals.
ESP32-S2 integrates a rich set of peripherals, ranging from SPI, I2S, UART, I2C, LED PWM, TWAI® , LCD,
Camera interface, ADC, DAC, touch sensor, temperature sensor, as well as up to 43 GPIOs. It also includes a
full-speed USB On-The-Go (OTG) interface to enable USB communication.
The ESP32-S2 chip and the ESP32-S2R2 chip vary only in whether a PSRAM is embedded.
For more information on ESP32-S2 series of SoCs, please refer to ESP32-S2 Series Datasheet and ESP32-S2
Series SoC Errata.
Information about ESP-IDF release that supports a specific chip revision is provided in ESP Product Selector.
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
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1 Module Overview
1.3 Applications
• Generic Low-power IoT Sensor Hub
• Smart Building
• Generic Low-power IoT Data Loggers
• Industrial Automation
• Cameras for Video Streaming
• Smart Agriculture
• Over-the-top (OTT) Devices
• Audio Applications
• USB Devices
• Health Care Applications
• Speech Recognition
• Wi-Fi-enabled Toys
• Image Recognition
• Wearable Electronics
• Mesh Network
• Home Automation
• Retail & Catering Applications
• Smart Home Control Panel
• Smart POS Machines
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
Contents
Contents
1
Module Overview
2
1.1
Features
2
1.2
Description
2
1.3
Applications
4
2
Block Diagram
9
3
Pin Definitions
10
3.1
Pin Layout
10
3.2
Pin Description
10
3.3
Strapping Pins
12
4
Electrical Characteristics
14
4.1
Absolute Maximum Ratings
14
4.2
Recommended Operating Conditions
14
4.3
DC Characteristics (3.3 V, 25 °C)
14
4.4
Current Consumption Characteristics
15
4.4.1
Current Consumption in Active Mode
15
4.4.2
Current Consumption in Other Modes
15
4.5
Wi-Fi RF Characteristics
16
4.5.1
Wi-Fi RF Standards
16
4.5.2
Transmitter Characteristics
17
4.5.3
Receiver Characteristics
17
5
Module Schematics
19
6
Peripheral Schematics
21
7
Physical Dimensions and PCB Land Pattern
22
7.1
Physical Dimensions
22
7.2
Recommended PCB Land Pattern
23
7.3
Dimensions of External Antenna Connector
25
8
Product Handling
26
8.1
Storage Conditions
26
8.2
Electrostatic Discharge (ESD)
26
8.3
Soldering Profile
26
8.3.1
26
Reflow Profile
8.4
Ultrasonic Vibration
27
9
MAC Addresses and eFuse
28
10 Related Documentation and Resources
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
Contents
Revision History
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
List of Tables
List of Tables
1
ESP32-S2-SOLO (ANT) Series Comparison
3
2
ESP32-S2-SOLO-U (CONN) Series Comparison
3
3
Pin Definitions
11
4
Strapping Pins
12
5
Absolute Maximum Ratings
14
6
Recommended Operating Conditions
14
7
DC Characteristics (3.3 V, 25 °C)
14
8
Current Consumption Depending on RF Modes
15
9
Current Consumption in Modem-sleep Mode
15
10
Current Consumption in Low-Power Modes
16
11
Wi-Fi RF Standards
16
12
TX Power
17
13
RX Sensitivity
17
14
Maximum RX Level
18
15
Adjacent Channel Rejection
18
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
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List of Figures
List of Figures
1
ESP32-S2-SOLO Block Diagram
9
2
ESP32-S2-SOLO-U Block Diagram
9
3
Pin Layout (Top View)
10
4
ESP32-S2-SOLO Schematics
19
5
ESP32-S2-SOLO-U Schematics
20
6
Peripheral Schematics
21
7
ESP32-S2-SOLO Physical Dimensions
22
8
ESP32-S2-SOLO-U Physical Dimensions
22
9
ESP32-S2-SOLO Recommended PCB Land Pattern
23
10
ESP32-S2-SOLO-U Recommended PCB Land Pattern
24
11
Dimensions of External Antenna Connector
25
12
Reflow Profile
26
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SPI Flash
2 Block Diagram
2 Block Diagram
40 MHz
Crystal
3V3
ESP32-S2-SOLO
Antenna
RF Matching
EN
ESP32-S2
ESP32-S2R2
GPIOs
SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
PSRAM(opt.)
(QSPI)
SPI Flash
Figure 1: ESP32S2SOLO Block Diagram
40 MHz
Crystal
3V3
ESP32-S2-SOLO-U
Antenna
RF Matching
EN
ESP32-S2
ESP32-S2R2
GPIOs
SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
PSRAM(opt.)
(QSPI)
SPI Flash
Figure 2: ESP32S2SOLOU Block Diagram
40 MHz
Crystal
3V3
ESP32-S2-SOLO
Antenna
RF Matching
EN
ESP32-S2
ESP32-S2R2
GPIOs
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SPICS0
SPICLK
SPID
SPIQ
SPIHD
SPIWP
VDD_SPI
PSRAM(opt.)
(QSPI)
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SPI Flash
ESP32-S2-SOLO & SOLO-U Datasheet v1.6
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3 Pin Definitions
3 Pin Definitions
3.1 Pin Layout
The pin diagram below shows the approximate location of pins on the module. For the actual diagram drawn to
scale, please refer to Figure 7.1 Physical Dimensions.
Keepout Zone
GND
GND
35
IO42
IO7
7
GND
41
GND
GND
34
IO41
IO15
8
GND
GND
GND
33
IO40
IO16
9
32
IO39
IO17
10
31
IO38
IO18
11
30
IO37
IO8
12
29
IO36
IO19
13
28
IO35
IO20
14
27
IO0
IO45
26
GND
25
6
IO34
IO6
24
RXD0
IO33
36
23
5
IO21
IO5
22
TXD0
IO14
37
21
4
IO13
IO4
20
IO2
IO12
38
19
3
IO11
EN
18
IO1
IO10
39
17
2
IO9
3V3
16
GND
IO46
40
15
1
IO3
GND
Figure 3: Pin Layout (Top View)
The above pin layout is applicable for ESP32-S2-SOLO and ESP32-S2-SOLO-U, but the latter has no keepout
zone.
3.2 Pin Description
The module has 41 pins. See pin definitions in Table 3 Pin Definitions.
For peripheral pin configurations, please refer to ESP32-S2 Series Datasheet > Section Peripheral Pin
Configurations.
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3 Pin Definitions
Table 3: Pin Definitions
Type1 Function
Name
No.
GND
1
P
Ground
3V3
2
P
Power supply
EN
3
I
High: on, enables the chip.
Low: off, the chip powers off.
Note: Do not leave the EN pin floating.
IO4
4
I/O/T
RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3
IO5
5
I/O/T
RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4
IO6
6
I/O/T
RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5
IO7
7
I/O/T
RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6
IO15
8
I/O/T
RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P
IO16
9
I/O/T
RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N
IO17
10
I/O/T
RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6, DAC_1
IO18
11
I/O/T
RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, DAC_2, CLK_OUT3
IO8
12
I/O/T
RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7
IO19
13
I/O/T
RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D-
IO20
14
I/O/T
RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+
IO3
15
I/O/T
RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2
IO46
16
I
IO9
17
I/O/T
RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD
IO10
18
I/O/T
RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4
IO11
19
I/O/T
RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5
IO12
20
I/O/T
RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6
IO13
21
I/O/T
RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7
IO14
22
I/O/T
RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS
IO21
23
I/O/T
RTC_GPIO21, GPIO21
IO33
24
I/O/T
SPIIO4, GPIO33, FSPIHD
IO34
25
I/O/T
SPIIO5, GPIO34, FSPICS0
IO45
26
I/O/T
GPIO45
IO0
27
I/O/T
RTC_GPIO0, GPIO0
IO35
28
I/O/T
SPIIO6, GPIO35, FSPID
IO36
29
I/O/T
SPIIO7, GPIO36, FSPICLK
IO37
30
I/O/T
SPIDQS, GPIO37, FSPIQ
IO38
31
I/O/T
GPIO38, FSPIWP
IO39
32
I/O/T
MTCK, GPIO39, CLK_OUT3
IO40
33
I/O/T
MTDO, GPIO40, CLK_OUT2
IO41
34
I/O/T
MTDI, GPIO41, CLK_OUT1
IO42
35
I/O/T
MTMS, GPIO42
RXD0
36
I/O/T
U0RXD, GPIO44, CLK_OUT2
TXD0
37
I/O/T
U0TXD, GPIO43, CLK_OUT1
IO2
38
I/O/T
RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1
IO1
39
I/O/T
RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0
GPIO46
Cont’d on next page
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
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3 Pin Definitions
Table 3 – cont’d from previous page
1
Name
No.
Type
GND
40
P
Ground
EPAD
41
P
Ground
1
Function
P: power supply; I: input; O: output; T: high impedance.
3.3 Strapping Pins
Note:
The content below is excerpted from Section Strapping Pins in ESP32-S2 Series Datasheet. For the strapping pin mapping
between the chip and modules, please refer to Chapter 5 Module Schematics.
ESP32-S2 has three strapping pins:
• GPIO0
• GPIO45
• GPIO46
Software can read the values of corresponding bits from register ”GPIO_STRAPPING”.
During the chip’s system reset (power-on-reset, RTC watchdog reset, brownout reset, analog super watchdog
reset, and crystal clock glitch detection reset), the latches of the strapping pins sample the voltage level as
strapping bits of ”0” or ”1”, and hold these bits until the chip is powered down or shut down.
GPIO0, GPIO45 and GPIO46 are connected to the chip’s internal weak pull-up/pull-down during the chip reset.
Consequently, if they are unconnected or the connected external circuit is high-impedance, the internal weak
pull-up/pull-down will determine the default input level of these strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-S2.
After reset, the strapping pins work as normal-function pins.
Refer to Table 4 for a detailed boot-mode configuration of the strapping pins.
Table 4: Strapping Pins
VDD_SPI Voltage 1
Pin
Default
3.3 V
GPIO45
Pull-down
0
2
1.8 V
1
Booting Mode
3
Pin
Default
SPI Boot
Download Boot
GPIO0
Pull-up
1
0
GPIO46
Pull-down
Don’t-care
0
Enabling/Disabling ROM Messages Print During Booting 4
5
Pin
Default
Enabled
Disabled
GPIO46
Pull-down
See note 5
See note 5
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3 Pin Definitions
Note:
1. The functionality of strapping pin GPIO45 to select VDD_SPI voltage may be disabled by setting VDD_SPI_FORCE
eFuse to 1. In such a case the voltage is selected with eFuse bit VDD_SPI_TIEH.
2. Since ESP32-S2FH2, ESP32-S2FH4, ESP32-S2FN4R2, and ESP32-S2R2 come with both/either 3.3 V SPI flash
and/or PSRAM, VDD_SPI must be configured to 3.3 V.
3. The strapping combination of GPIO46 = 1 and GPIO0 = 0 is invalid and will trigger unexpected behavior.
4. ROM code can be printed over U0TXD (by default) or DAC_1, depending on the eFuse bit.
5. When eFuse UART_PRINT_CONTROL value is:
0, print is normal during boot and not controlled by GPIO46.
1 and GPIO46 is 0, print is normal during boot; but if GPIO46 is 1, print is disabled.
2 and GPIO46 is 0, print is disabled; but if GPIO46 is 1, print is normal.
3, print is disabled and not controlled by GPIO46.
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4 Electrical Characteristics
4 Electrical Characteristics
4.1 Absolute Maximum Ratings
Stresses above those listed in Table 5 Absolute Maximum Ratings may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond
those indicated under Table 6 Recommended Operating Conditions is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
Table 5: Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
VDD33
Power supply voltage
–0.3
3.6
V
TST ORE
Storage temperature
–40
105
°C
4.2 Recommended Operating Conditions
Table 6: Recommended Operating Conditions
Symbol
Parameter
Min
Typ
Max
Unit
VDD33
Power supply voltage
3.0
3.3
3.6
V
IV DD
Current delivered by external power supply
0.5
—
—
A
TA
Operating ambient temperature
–40
—
85 °C version
105 °C version
85
°C
105
4.3 DC Characteristics (3.3 V, 25 °C)
Table 7: DC Characteristics (3.3 V, 25 °C)
Symbol
Parameter
CIN
Pin capacitance
VIH
Min
—
High-level input voltage
0.75 × VDD
1
Typ
Max
Unit
2
—
pF
—
1
VDD + 0.3
V
1
VIL
Low-level input voltage
–0.3
—
0.25 × VDD
IIH
High-level input current
—
—
50
nA
Low-level input current
—
—
50
nA
—
—
IIL
VOH
VOL
2
2
High-level output voltage
0.8 × VDD
Low-level output voltage
1
V
V
1
—
—
0.1 × VDD
V
—
40
—
mA
—
28
—
mA
45
—
kΩ
45
—
kΩ
—
1
1
IOH
IOL
High-level source current (VDD = 3.3 V, VOH >=
2.64 V, PAD_DRIVER = 3)
Low-level sink current (VDD1 = 3.3 V, VOL =
0.495 V, PAD_DRIVER = 3)
RP U
Pull-up resistor
—
RP D
Pull-down resistor
—
VIH_nRST
VIL_nRST
Chip reset release voltage
0.75 × VDD
Chip reset voltage
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—
VDD + 0.3
0.25 × VDD
V
1
V
ESP32-S2-SOLO & SOLO-U Datasheet v1.6
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4 Electrical Characteristics
1
VDD is the I/O voltage for pins of a particular power domain.
2
VOH and VOL are measured using high-impedance load.
4.4 Current Consumption Characteristics
Owing to the use of advanced power-management technologies, the module can switch between different power
modes. For details on different power modes, please refer to Section RTC and Low-Power Management
in ESP32-S2 Series Datasheet.
4.4.1 Current Consumption in Active Mode
Table 8: Current Consumption Depending on RF Modes
Work mode
Description
TX
Active (RF working)
RX 2
1
Peak (mA)
802.11b, 20 MHz, 1 Mbps, @19.5 dBm
310
802.11g, 20 MHz, 54 Mbps, @15 dBm
220
802.11n, 20 MHz, MCS7, @13.5 dBm
205
802.11n, 40 MHz, MCS7, @13.5 dBm
165
802.11b/g/n, 20 MHz
71
802.11n, 40 MHz
75
The current consumption measurements are taken with a 3.3 V supply at 25 °C of ambient
temperature at the RF port. All transmitters’ measurements are based on 100% duty cycle.
2
The current consumption figures in RX mode are for cases where the peripherals are disabled
and the CPU idle.
Note:
The content below is excerpted from Section Power Consumption in Other Modes in ESP32-S2 Series Datasheet.
4.4.2 Current Consumption in Other Modes
The measurements below are applicable to ESP32-S2, ESP32-S2FH2, and ESP32-S2FH4. Since
ESP32-S2FN4R2 and ESP32-S2R2 are embedded with PSRAM, their current consumption might be
higher.
Table 9: Current Consumption in Modemsleep Mode
Mode
CPU Frequency
(MHz)
240
Modem-sleep2,3
160
80
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Typ
Description
All Peripherals Clocks
All Peripherals Clocks
Disabled (mA)
Enabled (mA)1
CPU is idle
20.0
28.0
CPU is running
23.0
32.0
CPU is idle
14.0
21.0
CPU is running
16.0
24.0
CPU is idle
10.5
18.4
CPU is running
12.0
20.0
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4 Electrical Characteristics
1
In practice, the current consumption might be different depending on which peripherals are enabled.
2
In Modem-sleep mode, Wi-Fi is clock gated.
3
In Modem-sleep mode, the consumption might be higher when accessing flash. For a flash rated at 80
Mbit/s, in SPI 2-line mode the consumption is 10 mA.
Table 10: Current Consumption in LowPower Modes
Mode
Description
1
Light-sleep
VDD_SPI and Wi-Fi are powered down, and all GPIOs are high-impedance
750
The ULP co-processor
ULP-FSM
170
ULP-RISC-V
190
is powered on
Deep-sleep
Power off
1
Typ (µA)
2
ULP sensor-monitored pattern
3
22
RTC timer + RTC memory
25
RTC timer only
20
CHIP_PU is set to low level, the chip is powered off
1
In Light-sleep mode, with all related SPI pins pulled up, the current consumption of the embedded
PSRAM is 140 µA. Chip variants with embedded PSRAM include ESP32-S2FN4R2 and ESP32-S2R2.
2
During Deep-sleep, when the ULP co-processor is powered on, peripherals such as GPIO and I2C
are able to operate.
3
The “ULP sensor-monitored pattern” refers to the mode where the ULP coprocessor or the sensor
works periodically. When touch sensors work with a duty cycle of 1%, the typical current consumption
is 22 µA.
4.5 WiFi RF Characteristics
4.5.1 WiFi RF Standards
Table 11: WiFi RF Standards
Name
Description
Center frequency range of operating channel
1
2412 ~ 2484 MHz
Wi-Fi wireless standard
IEEE 802.11b/g/n
802.11b: 1, 2, 5.5 and 11 Mbps
Data rate
20 MHz
802.11g: 6, 9, 12, 18, 24, 36, 48, 54 Mbps
802.11n: MCS0-7, 72.2 Mbps (Max)
40 MHz
802.11n: MCS0-7, 150 Mbps (Max)
Antenna type
1
PCB antenna, external antenna connector
Device should operate in the center frequency range allocated by regional regulatory authorities.
Target center frequency range is configurable by software.
2
For the modules that use external antenna connectors, the output impedance is 50 Ω. For other
modules without external antenna connectors, the output impedance is irrelevant.
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(Chip Revision v0.0)
4 Electrical Characteristics
4.5.2 Transmitter Characteristics
Target TX power is configurable based on device or certification requirements. The default characteristics are
provided in Table 12.
Table 12: TX Power
Min
Typ
Max
(dBm)
(dBm)
(dBm)
802.11b, 1 Mbps
—
19.5
—
802.11b, 11 Mbps
—
19.5
—
802.11g, 6 Mbps
—
18.0
—
802.11g, 54 Mbps
—
15.0
—
802.11n, HT20, MCS0
—
18.0
—
802.11n, HT20, MCS7
—
13.5
—
802.11n, HT40, MCS0
—
18.0
—
802.11n, HT40, MCS7
—
13.5
—
Rate
4.5.3 Receiver Characteristics
Table 13: RX Sensitivity
Min
Typ
Max
(dBm)
(dBm)
(dBm)
802.11b, 1 Mbps
—
–97
—
802.11b, 2 Mbps
—
–95
—
802.11b, 5.5 Mbps
—
–93
—
802.11b, 11 Mbps
—
–88
—
802.11g, 6 Mbps
—
–92
—
802.11g, 9 Mbps
—
–91
—
802.11g, 12 Mbps
—
–89
—
802.11g, 18 Mbps
—
–86
—
802.11g, 24 Mbps
—
–83
—
802.11g, 36 Mbps
—
–80
—
802.11g, 48 Mbps
—
–76
—
802.11g, 54 Mbps
—
–75
—
802.11n, HT20, MCS0
—
–92
—
802.11n, HT20, MCS1
—
–88
—
802.11n, HT20, MCS2
—
–85
—
802.11n, HT20, MCS3
—
–83
—
802.11n, HT20, MCS4
—
–79
—
802.11n, HT20, MCS5
—
–75
—
802.11n, HT20, MCS6
—
–73
—
802.11n, HT20, MCS7
—
–72
—
802.11n, HT40, MCS0
—
–89
—
802.11n, HT40, MCS1
—
–85
—
Rate
Cont’d on next page
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4 Electrical Characteristics
Table 13 – cont’d from previous page
Min
Typ
Max
(dBm)
(dBm)
(dBm)
802.11n, HT40, MCS2
—
–83
—
802.11n, HT40, MCS3
—
–79
—
802.11n, HT40, MCS4
—
–76
—
802.11n, HT40, MCS5
—
–72
—
802.11n, HT40, MCS6
—
–70
—
802.11n, HT40, MCS7
—
–68
—
Rate
Table 14: Maximum RX Level
Min
Typ
Max
(dBm)
(dBm)
(dBm)
802.11b, 1 Mbps
—
5
—
802.11b, 11 Mbps
—
5
—
802.11b, 6 Mbps
—
5
—
802.11b, 54 Mbps
—
0
—
802.11n, HT20, MCS0
—
5
—
802.11n, HT20, MCS7
—
0
—
802.11n, HT40, MCS0
—
5
—
802.11n, HT40, MCS7
—
0
—
Rate
Table 15: Adjacent Channel Rejection
Rate
Espressif Systems
Min
Typ
Max
(dB)
(dB)
(dB)
802.11b, 11 Mbps
—
35
—
802.11b, 6 Mbps
—
31
—
802.11b, 54 Mbps
—
14
—
802.11n, HT20, MCS0
—
31
—
802.11n, HT20, MCS7
—
13
—
802.11n, HT40, MCS0
—
19
—
802.11n, HT40, MCS7
—
8
—
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5 Module Schematics
This is the reference design of the module.
5
4
3
2
1
TBD
VDD33
10K(NC)
1uF
GND
0
R3
C5
10uF
1uF
0.1uF
NC
GND
ANT1
GND
GND
RF_ANT
1
2
L2
GND
TBD
C11
C12
TBD
TBD
PCB_ANT
GND
GND
C10
GND
The values of C11, L2 and C12
vary with the actual PCB board.
NC: No component.
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
VDDA
LNA_IN
VDD3P3
VDD3P3
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
15
16
17
18
19
20
21
22
23
24
25
26
27
28
U1
VDD33
0.1uF
GPIO21
GND
C
GPIO38
GPIO37
GPIO36
GPIO35
GPIO34
GPIO33
SPID
SPIQ
SPICLK
SPICS0
SPIWP
SPIHD
VDD_SPI
SPICS1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
R10
VDD_SPI
GPIO38
GPIO37
GPIO36
GPIO35
GPIO34
GPIO33
SPID
SPIQ
SPICLK
SPICS0
SPIWP
SPIHD
0
C13
C14
0.1uF
1uF
R8
10K(NC)
SPICS0
1
SPICLK
6
SPIHD
7
/CS
/HOLD
U2
VDD_SPI
DI
CLK
DO
/WP
5
SPID
2
SPIQ
3
SPIWP
FLASH-3V3
GND
GND
ESP32-S2
ESP32-S2R2
GND
VDD33
0.1uF
A
GND
Figure 4: ESP32S2SOLO Schematics
5
4
B
C16
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
A
D
ESP32-S2-SOLO(pin-out)
GND
C15
0.1uF
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
B
LNA_IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GPIO1
GPIO2
U0TXD
U0RXD
GPIO42
GPIO41
GPIO40
GPIO39
GPIO38
GPIO37
GPIO36
GPIO35
GPIO0
VDD33
56
55
54
53
52
51
50
49
48
47
46
45
44
43
C9
CHIP_PU
GPIO46
VDDA
XTAL_P
XTAL_N
VDDA
GPIO45
U0RXD
U0TXD
MTMS
MTDI
VDD3P3_CPU
MTDO
MTCK
C8
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
VDD3P3_RTC
XTAL_32K_P
XTAL_32K_N
DAC_1
DAC_2
GPIO19
GPIO20
VDD3P3_RTC_IO
GPIO21
C7
57
C6
GND
L1
GND
2.0nH
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
8
GND
VDD33
R4
0.1uF
C
CHIP_PU
GPIO46
GPIO45
U0RXD
499 U0TXD
GPIO42
GPIO41
GPIO40
GPIO39
EPAD
GND
IO1
IO2
TXD0
RXD0
IO42
IO41
IO40
IO39
IO38
IO37
IO36
IO35
IO0
GND
3V3
EN
IO4
IO5
IO6
IO7
IO15
IO16
IO17
IO18
IO8
IO19
IO20
VDD
GND
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VDD33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
GND
100pF
GND
40MHz(±10ppm)
CHIP_PU
GPIO4
GPIO5
D1 GPIO6
ESD GPIO7
GPIO15
GPIO16
GPIO17
GPIO18
GPIO8
GND
GPIO19
GPIO20
4
3
C4
ESP32-S2-SOLO
IO3
IO46
IO9
IO10
IO11
IO12
IO13
IO14
IO21
IO33
IO34
IO45
C3
GND
U3
R1
C2
GND
15
16
17
18
19
20
21
22
23
24
25
26
1
The value of R4 varies with the actual
PCB board.
VDD33
VDD33
GPIO3
GPIO46
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO21
GPIO33
GPIO34
GPIO45
TBD
GND
GND XOUT
C1
The values of C1 and C4 vary with
the selection of the crystal.
Y1
2
D
GND
GND
4
GND
XIN
Espressif Systems
5 Module Schematics
3
2
1
5
4
3
2
1
VDD33
VDD33
10K(NC)
1uF
VDD33
GND
0
R3
C5
1uF
0.1uF
NC
GND
GND
3
2
1
GND
RF_ANT
L2
GND
TBD
ANT1
C11
C12
IPEX
TBD
TBD
GND
GND
GND
B
The values of C11, L2 and C12
vary with the actual PCB board.
NC: No component.
LNA_IN
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VDDA
LNA_IN
VDD3P3
VDD3P3
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
0.1uF
GPIO38
GPIO37
GPIO36
GPIO35
GPIO34
GPIO33
SPID
SPIQ
SPICLK
SPICS0
SPIWP
SPIHD
VDD_SPI
SPICS1
GPIO21
GND
42
41
40
39
38
37
36
35
34
33
32
31
30
29
R10
VDD_SPI
GPIO38
GPIO37
GPIO36
GPIO35
GPIO34
GPIO33
SPID
SPIQ
SPICLK
SPICS0
SPIWP
SPIHD
0
C13
C14
0.1uF
1uF
R8
10K(NC)
SPICS0
1
SPICLK
6
SPIHD
7
/CS
CLK
/HOLD
U2
VDD_SPI
DI
DO
/WP
5
SPID
2
SPIQ
3
SPIWP
FLASH-3V3
GND
GND
ESP32-S2
ESP32-S2R2
GND
VDD33
0.1uF
A
GND
Figure 5: ESP32S2SOLOU Schematics
5
4
B
C16
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19
GPIO20
A
C
ESP32-S2-SOLO-U(pin-out)
GND
C15
0.1uF
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
15
16
17
18
19
20
21
22
23
24
25
26
27
28
U1
VDD33
D
VDD33
56
55
54
53
52
51
50
49
48
47
46
45
44
43
10uF
C10
CHIP_PU
GPIO46
VDDA
XTAL_P
XTAL_N
VDDA
GPIO45
U0RXD
U0TXD
MTMS
MTDI
VDD3P3_CPU
MTDO
MTCK
C9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
VDD3P3_RTC
XTAL_32K_P
XTAL_32K_N
DAC_1
DAC_2
GPIO19
GPIO20
VDD3P3_RTC_IO
GPIO21
C8
57
C7
20
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C6
GND
L1
GND
2.0nH
GPIO1
GPIO2
U0TXD
U0RXD
GPIO42
GPIO41
GPIO40
GPIO39
GPIO38
GPIO37
GPIO36
GPIO35
GPIO0
8
GND
VDD33
R4
0.1uF
C
CHIP_PU
GPIO46
GPIO45
U0RXD
499 U0TXD
GPIO42
GPIO41
GPIO40
GPIO39
VDD
GND
EPAD
GND
IO1
IO2
TXD0
RXD0
IO42
IO41
IO40
IO39
IO38
IO37
IO36
IO35
IO0
GND
3V3
EN
IO4
IO5
IO6
IO7
IO15
IO16
IO17
IO18
IO8
IO19
IO20
GND
100pF
GND
40MHz(±10ppm)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IO3
IO46
IO9
IO10
IO11
IO12
IO13
IO14
IO21
IO33
IO34
IO45
TBD
CHIP_PU
GPIO4
GPIO5
D1 GPIO6
ESD GPIO7
GPIO15
GPIO16
GPIO17
GPIO18
GPIO8
GND
GPIO19
GPIO20
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
15
16
17
18
19
20
21
22
23
24
25
26
C4
ESP32-S2-SOLO-U
GPIO3
GPIO46
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO21
GPIO33
GPIO34
GPIO45
C3
GND
U3
R1
C2
GND
4
3
4
1
The value of R4 varies with the actual
PCB board.
VDD33
GND
GND XOUT
TBD
Y1
2
C1
The values of C1 and C4 vary with
the selection of the crystal.
GND
D
XIN
GND
3
2
1
5 Module Schematics
Espressif Systems
GND
6 Peripheral Schematics
6 Peripheral Schematics
This is the typical application circuit of the module connected with peripheral components (for example, power
supply, antenna, reset button, JTAG interface, and UART interface).
VDD33
GND
GND
VDD33
JP1
1
2
3
4
ESP32-S2-SOLO/ESP32-S2-SOLO-U
R1
22uF
0.1uF
C2
TBD
C6
TBD
C5 NC: No component.
GND
3V3
EN
IO4
IO5
IO6
IO7
IO15
IO16
IO17
IO18
IO8
IO19
IO20
EPAD
GND
IO1
IO2
TXD0
RXD0
IO42
IO41
IO40
IO39
IO38
IO37
IO36
IO35
IO0
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
IO1
IO2
RXD0
TXD0
IO42
IO41
IO40
IO39
IO38
IO37
IO36
IO35
IO0
UART
JP2
GND
TMS
TDI
TDO
TCK
1
2
3
4
GND
1
2
3
4
JTAG
JP4
2
1
2
1
SW1
U1
R7
C8
GNDGND
1
2
3
4
Boot Option
TBD
IO3
IO46
IO9
IO10
IO11
IO12
IO13
IO14
IO21
IO33
IO34
IO45
1
2
NC
USB OTG
R2
EN
GND
IO4
IO5
GND
GND
IO6
C4 12pF(NC)
GND
X1: ESR = Max. 70 KΩ IO7
IO15
R3
0(NC)
X1
IO16
R5
0(NC)
32.768KHz(NC)
IO17
IO18
R8
10K
GND
IO8
C7 12pF(NC)
IO19
VDD33
IO20
JP3
USB_D2
R6
0
2 1
USB_D+
R4
0
1
TBD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IO3
IO46
IO9
IO10
IO11
IO12
IO13
IO14
IO21
IO33
IO34
IO45
C3
15
16
17
18
19
20
21
22
23
24
25
26
C1
0 EN
0.1uF
GND
Figure 6: Peripheral Schematics
• Soldering the EPAD to the ground of the base board is not a must, however, it can optimize thermal
performance. If you choose to solder it, please apply the correct amount of soldering paste. Too much
soldering paste may increase the gap between the module and the baseboard. As a result, the adhesion
between other pins and the baseboard may be poor.
• To ensure that the power supply to the ESP32-S2 chip is stable during power-up, it is advised to add an
RC delay circuit at the EN pin. The recommended setting for the RC delay circuit is usually R = 10 kΩ and
C = 1 µF. However, specific parameters should be adjusted based on the power-up timing of the module
and the power-up and reset sequence timing of the chip. For ESP32-S2’s power-up and reset sequence
timing diagram, please refer to ESP32-S2 Series Datasheet > Section Power Scheme.
• GPIO18 works as U1RXD and is in floating state when the chip is powered on, which may affect the chip’s
entry into download boot mode. To solve this issue, add an external pull-up resistor.
5
4
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
7 Physical Dimensions and PCB Land Pattern
7 Physical Dimensions and PCB Land Pattern
7.1 Physical Dimensions
Unit: mm
3.1±0.15
0.8
15.8
0.9
0.5
1.05
Ø
1.5
13.97
40 x 0.45
0.9
3.7
3.7
10.5
10.29
5
40 x 0.9
17.6
40 x Ø0.55
0.
25.5±0.15
16.51
40 x 0.9
1.27
6
18±0.15
1.27 2.015
40 x 0.85
1
Top View
Bottom View
Side View
Figure 7: ESP32S2SOLO Physical Dimensions
Unit: mm
3.2±0.15
0.8
0.9
0.5
13.1
40 x 0.9
15.65
1.1
3.7
10.5
1.27 2.015
40 x 0.85
13.97
1.08
40 x 0.45
Top View
0.9
2.46
40 x Ø0.55
17.5
19.2±0.15
16.51
1.5
40 x 0.9
1.27
10.75
10.29
3
3.7
18±0.15
Bottom View
Side View
Figure 8: ESP32S2SOLOU Physical Dimensions
Note:
For information about tape, reel, and product marking, please refer to Espressif Module Packaging Information.
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
7 Physical Dimensions and PCB Land Pattern
7.2 Recommended PCB Land Pattern
This section provides the following resources for your reference:
• Figures for recommended PCB land patterns with all the dimensions needed for PCB design. See Figure 9
ESP32-S2-SOLO Recommended PCB Land Pattern and Figure 10 ESP32-S2-SOLO-U Recommended PCB
Land Pattern.
• Source files of recommended PCB land patterns to measure dimensions not covered in Figure 9. You can
view the source files for ESP32-S2-SOLO and ESP32-S2-SOLO-U with Autodesk Viewer.
• 3D models of ESP32-S2-SOLO and ESP32-S2-SOLO-U. Please make sure that you download the 3D
model file in .STEP format (beware that some browsers might add .txt).
Unit: mm
Via for thermal pad
Copper
Antenna Area
40 x1.5
40
25.5
0.9
0.5
7.5
15
0.5
1.27
10.29
1.5
0.5
3.7
0.9
3.7
40 x0.9
1
16.51
6
7.49
18
26
1.27
2.015 2.015
17.5
Figure 9: ESP32S2SOLO Recommended PCB Land Pattern
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
7 Physical Dimensions and PCB Land Pattern
Unit: mm
Via for thermal pad
Copper
18
40 x1.5
40
1.19
15
0.5
1.27
19.2
10.29
7.5
0.9
3.7
40 x0.9
0.9
0.5
3.7
1.5
0.5
16.51
1
26
1.27
2.015 2.015
17.5
Figure 10: ESP32S2SOLOU Recommended PCB Land Pattern
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
7 Physical Dimensions and PCB Land Pattern
7.3 Dimensions of External Antenna Connector
ESP32-S2-SOLO-U uses the first generation external antenna connector as shown in Figure 11 Dimensions of
External Antenna Connector. This connector is compatible with the following connectors:
• U.FL Series connector from Hirose
• MHF I connector from I-PEX
• AMC connector from Amphenol
Unit: mm
Figure 11: Dimensions of External Antenna Connector
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
(Chip Revision v0.0)
8 Product Handling
8 Product Handling
8.1 Storage Conditions
The products sealed in moisture barrier bags (MBB) should be stored in a non-condensing atmospheric
environment of < 40 °C and 90%RH. The module is rated at the moisture sensitivity level (MSL) of 3.
After unpacking, the module must be soldered within 168 hours with the factory conditions 25±5 °C and
60%RH. If the above conditions are not met, the module needs to be baked.
8.2 Electrostatic Discharge (ESD)
• Human body model (HBM): ±2000 V
• Charged-device model (CDM): ±500 V
8.3 Soldering Profile
8.3.1 Reflow Profile
Temperature (℃)
Solder the module in a single reflow.
Peak Temp.
235 ~ 250 ℃
250
Preheating zone
150 ~ 200 ℃
60 ~ 120 s
217
200
Reflow zone
217 ℃ 60 ~ 90 s
Cooling zone
–1 ~ –5 ℃/s
Soldering time
> 30 s
Ramp-up zone
1 ~ 3 ℃/s
100
50
25
Time (sec.)
0
0
50
100
150
200
250
Ramp-up zone — Temp.: 25 ~ 150 ℃ Time: 60 ~ 90 s Ramp-up rate: 1 ~ 3 ℃/s
Preheating zone — Temp.: 150 ~ 200 ℃ Time: 60 ~ 120 s
Reflow zone — Temp.: >217 ℃
60 ~ 90 s; Peak Temp.: 235 ~ 250 ℃ Time: 30 ~ 70 s
Cooling zone — Peak Temp. ~ 180 ℃ Ramp-down rate: –1 ~ –5 ℃/s
Solder — Sn-Ag-Cu (SAC305) lead-free solder alloy
Figure 12: Reflow Profile
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8 Product Handling
8.4 Ultrasonic Vibration
Avoid exposing Espressif modules to vibration from ultrasonic equipment, such as ultrasonic welders or
ultrasonic cleaners. This vibration may induce resonance in the in-module crystal and lead to its malfunction or
even failure. As a consequence, the module may stop working or its performance may deteriorate.
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ESP32-S2-SOLO & SOLO-U Datasheet v1.6
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9 MAC Addresses and eFuse
9 MAC Addresses and eFuse
The eFuse in ESP32-S2 series of chips has been burnt into 48-bit mac_address. The actual addresses the chip
uses in station or AP modes correspond to mac_address in the following way:
• Station mode: mac_address
• AP mode: mac_address + 1
There are seven blocks in eFuse for users to use. Each block is 256 bits in size and has independent write/read
disable controller. Six of them can be used to store encrypted key or user data, and the remaining one is only
used to store user data.
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10 Related Documentation and Resources
10
Related Documentation and Resources
Related Documentation
• ESP32-S2 Series Datasheet – Specifications of the ESP32-S2 hardware.
• ESP32-S2 Technical Reference Manual – Detailed information on how to use the ESP32-S2 memory and peripherals.
• ESP32-S2 Hardware Design Guidelines – Guidelines on how to integrate the ESP32-S2 into your hardware product.
• ESP32-S2 Series SoC Errata – Descriptions of known errors in ESP32-S2 series of SoCs.
• Certificates
https://espressif.com/en/support/documents/certificates
• ESP32-S2 Product/Process Change Notifications (PCN)
https://espressif.com/en/support/documents/pcns?keys=ESP32-S2
• ESP32-S2 Advisories – Information on security, bugs, compatibility, component reliability.
https://espressif.com/en/support/documents/advisories?keys=ESP32-S2
• Documentation Updates and Update Notification Subscription
https://espressif.com/en/support/download/documents
Developer Zone
• ESP-IDF Programming Guide for ESP32-S2 – Extensive documentation for the ESP-IDF development framework.
• ESP-IDF and other development frameworks on GitHub.
https://github.com/espressif
• ESP32 BBS Forum – Engineer-to-Engineer (E2E) Community for Espressif products where you can post questions,
share knowledge, explore ideas, and help solve problems with fellow engineers.
https://esp32.com/
• The ESP Journal – Best Practices, Articles, and Notes from Espressif folks.
https://blog.espressif.com/
• See the tabs SDKs and Demos, Apps, Tools, AT Firmware.
https://espressif.com/en/support/download/sdks-demos
Products
• ESP32-S2 Series SoCs – Browse through all ESP32-S2 SoCs.
https://espressif.com/en/products/socs?id=ESP32-S2
• ESP32-S2 Series Modules – Browse through all ESP32-S2-based modules.
https://espressif.com/en/products/modules?id=ESP32-S2
• ESP32-S2 Series DevKits – Browse through all ESP32-S2-based devkits.
https://espressif.com/en/products/devkits?id=ESP32-S2
• ESP Product Selector – Find an Espressif hardware product suitable for your needs by comparing or applying filters.
https://products.espressif.com/#/product-selector?language=en
Contact Us
• See the tabs Sales Questions, Technical Enquiries, Circuit Schematic & PCB Design Review, Get Samples
(Online stores), Become Our Supplier, Comments & Suggestions.
https://espressif.com/en/contact-us/sales-questions
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Revision History
Revision History
Date
Version
Release notes
• Changed Table Ordering Information to Table ESP32-S2-SOLO (ANT) Series
Comparison and Table ESP32-S2-SOLO-U (CONN) Series Comparison
2023-05-25
v1.6
• Added links to some reference documents in Section 1 Module Overview
• Updated EPAD descriptions in Section 6 Peripheral Schematics
• Added descriptions in Section 7.2 Recommended PCB Land Pattern
• Other formatting updates
2022-09-23
v1.5
• Added Section 8.4 Ultrasonic Vibration
• Removed NRND watermark
• Added module pictures on the title page
• Added NRND watermark
• Updated Section ”Learning Resources” and renamed to ”Related Docu2022-03-01
v1.4
mentation and Resources”
• Added a note with a link and QR code to the latest version of the document
• Updated Table 9 Current Consumption in Modem-sleep Mode and Table 10
Current Consumption in Low-Power Modes
• Added module variants embedded with the ESP32-S2R2 chip
• Added module description to the title page
• Updated Chapter 1 Module Overview
2021-06-21
v1.3
• Updated Pin Layout (Top View), in which IO3, IO46 and IO45 are newly
added
• Updated Figure 9 ESP32-S2-SOLO Recommended PCB Land Pattern
• Added description in Section 7.3 Dimensions of External Antenna Connector
• Replaced ”chip family” with ”chip series” following Espressif’s taxonomy
• Added TWAI to Chapter 1 Module Overview
• Updated Table 8 Current Consumption Depending on RF Modes
2020-12-17
v1.2
• Updated the capacitance value of RC delay circuit to 1 µF in Chapter 6
Peripheral Schematics
• Updated note in Section 8.3.1 Reflow Profile
2020-07-31
v1.1
Updated notes in Table Ordering Information
2020-07-22
v1.0
Official release
2020-05-19
v0.1
Preliminary release
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Disclaimer and Copyright Notice
Information in this document, including URL references, is subject to change without notice.
ALL THIRD PARTY’S INFORMATION IN THIS DOCUMENT IS PROVIDED AS IS WITH NO
WARRANTIES TO ITS AUTHENTICITY AND ACCURACY.
NO WARRANTY IS PROVIDED TO THIS DOCUMENT FOR ITS MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, NOR DOES ANY WARRANTY
OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
All liability, including liability for infringement of any proprietary rights, relating to use of information
in this document is disclaimed. No licenses express or implied, by estoppel or otherwise, to any
intellectual property rights are granted herein.
The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a
registered trademark of Bluetooth SIG.
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All trade names, trademarks and registered trademarks mentioned in this document are property
of their respective owners, and are hereby acknowledged.
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