CY74FCT541TSOCT

CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 D D D D D D D OEA D0 D1 D2 D3 D4 D5 D6 D7 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OEB O0 O1 O2 O3 O4 O5 O6 O7 CY54FCT541T . . . L PACKAGE (TOP VIEW) D2 D3 D4 D5 D6 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 O0 O1 O2 O3 O4 D7 GND O7 O6 O5 description OEB D CY54FCT541T . . . D PACKAGE CY74FCT541T . . . P, Q, OR SO PACKAGE (TOP VIEW) OEA VCC D Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics Ioff Supports Partial-Power-Down Mode Operation ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) Matched Rise and Fall Times Fully Compatible With TTL Input and Output Logic Levels CY54FCT541T – 48-mA Output Sink Current – 12-mA Output Source Current CY74FCT541T – 64-mA Output Sink Current – 32-mA Output Source Current 3-State Outputs D1 D0 D The ’FCT541T noninverting buffers/line drivers can be employed as memory address drivers, clock drivers, and bus-oriented transmitters/receivers. These devices provide speed and drive capabilities equivalent to their fastest bipolar-logic counterparts, while reducing power dissipation. The input and output voltage levels allow direct interface with TTL, NMOS, and CMOS devices without external components. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 ORDERING INFORMATION QSOP – Q TOP-SIDE MARKING 4.1 CY74FCT541CTQCT Tube 4.1 CY74FCT541CTSOC Tape and reel 4.1 CY74FCT541CTSOCT DIP – P Tube 4.8 CY74FCT541ATPC CY74FCT541ATPC QSOP – Q Tape and reel 4.8 CY74FCT541ATQCT FCT541A Tube 4.8 CY74FCT541ATSOC Tape and reel 4.8 CY74FCT541ATSOCT SOIC – SO SOIC – SO –55°C to 125°C ORDERABLE PART NUMBER Tape and reel SOIC – SO –40°C to 85°C SPEED (ns) PACKAGE† TA Tube 8 CY74FCT541TSOC Tape and reel 8 CY74FCT541TSOCT CY54FCT541CTDMB CDIP – D Tube 4.6 CDIP – D Tube 8 LCC – L Tube 8 FCT541C FCT541C FCT541A FCT541 CY54FCT541TDMB CY54FCT541TLMB † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE INPUTS D OUTPUT O OEA OEB L L L L L L H H H H X Z H = High logic level, L = Low logic level, X = Don’t care, Z = High-impedance state logic diagram (positive logic) OEA OEB D0 1 19 2 18 To Seven Other Channels 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 O0 CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 absolute maximum rating over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA Package thermal impedance, θJA (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 2) CY54FCT541T CY74FCT541T MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.75 5 5.25 UNIT VCC VIH Supply voltage VIL IOH Low-level input voltage 0.8 0.8 V High-level output current –12 –32 mA IOL TA Low-level output current 48 64 mA 85 °C High-level input voltage 2 Operating free-air temperature –55 2 125 –40 V V NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH CY54FCT541T TYP† MAX TEST CONDITIONS VCC = 4.5, V VCC = 4.75 V, IIN = –18 mA IIN = –18 mA VCC =4.5 V, IOH = –12 mA IOH = –32 mA VCC = 4 4.75 75 V MIN –0.7 –1.2 –0.7 2.4 2.4 Vhys All inputs II VCC = 5.5 V, VCC = 5.25 V, VIN = VCC VIN = VCC 5 IIH VCC = 5.5 V, VCC = 5.25 V, VIN = 2.7 V VIN = 2.7 V ±1 IIL VCC = 5.5 V, VCC = 5.25 V, VIN = 0.5 V VIN = 0.5 V ±1 IOZH VCC = 5.5 V, VCC = 5.25 V, VOUT = 2.7 V VOUT = 2.7 V 10 IOZL VCC = 5.5 V, VCC = 5.25 V, VOUT = 0.5 V VOUT = 0.5 V –10 IOS‡ VCC = 5.5 V, VCC = 5.25 V, VOUT = 0 V VOUT = 0 V VCC = 0 V, VCC = 5.5 V, VOUT = 4.5 V VIN ≤ 0.2 V, ∆ICC 0.3 0.3 0.2 0.55 0.2 ±1 ±1 10 –10 –120 –225 –60 –120 ±1 VIN ≥ VCC – 0.2 V VIN ≥ VCC – 0.2 V 0.1 0.5 V V 5 VIN ≤ 0.2 V, VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open VCC = 5.25 V, 3.3 0.55 IOL = 64 mA –60 V V 2 IOH = –15 mA IOL = 48 mA VCC = 4.5 V, VCC = 4.75 V, ICC –1.2 UNIT 3.3 VOL Ioff CY74FCT541T TYP† MAX MIN –225 ±1 0.2 0.1 0.2 0.5 2 µA µA µA µA µA mA µA mA 2 mA VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open VCC = 5.5 V, 50% duty cycle, Outputs open, One bit switching at f1 = 10 MHz, 0.06 0.12 OEA = OEB = GND or OEA = GND and OEB = VCC, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V mA/ ICCD¶ MHz VCC = 5.25 V, 50% duty cycle, Outputs open, One bit switching at f1 = 10 MHz, 0.06 0.12 OEA = OEB = GND or OEA = GND and OEB = VCC, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V † Typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. § Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND ¶ This parameter is derived for use in total power-supply calculations. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER CY54FCT541T TYP† MAX TEST CONDITIONS VCC = 5.5 V, Outputs Out uts o open en, OEA = OEB = GND or OEA = GND and OEB = VCC One bit switching at f1 = 10 MHz at 50% duty cycle VCC = 5.25 V, Out uts o en, Outputs open OEA = OEB = GND or OEA = GND and OEB = VCC One bit switching at f1 = 10 MHz at 50% duty cycle IC# Eight bits switching at f1 = 2.5 MHz at 50% duty cycle MIN VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VIN = 3.4 V or GND VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VIN = 3.4 V or GND VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 0.7 1.4 1 2.4 1.3 2.6|| 3.3 10.6|| CY74FCT541T TYP† MAX MIN UNIT mA 0.7 1.4 1 2.4 1.3 2.6|| 3.3 10.6|| Ci 5 10 pF Co 9 12 pF Eight bits switching at f1 = 2.5 MHz at 50% duty cycle VIN = 3.4 V or GND VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VIN = 3.4 V or GND † Typical values are at VCC = 5 V, TA = 25°C. # IC = ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1) Where: IC = Total supply current ICC = Power-supply current with CMOS input levels ∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V) DH = Duty cycle for TTL inputs high NT = Number of TTL inputs at DH ICCD = Dynamic current caused by an input transition pair (HLH or LHL) f0 = Clock frequency for registered devices, otherwise zero f1 = Input signal frequency N1 = Number of inputs changing at f1 All currents are in milliamperes and all frequencies are in megahertz. || Values for these conditions are examples of the ICC formula. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 switching characteristics over operating free-air temperature range (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL D O tPZH tPZL OE O tPHZ tPLZ OE O CY54FCT541T CY54FCT541CT MIN MAX MIN MAX 1.5 8 1.5 4.6 1.5 8 1.5 4.6 1.5 10.5 1.5 6.5 1.5 10.5 1.5 6.5 1.5 10 1.5 5.7 1.5 10 1.5 5.7 UNIT ns ns ns switching characteristics over operating free-air temperature range (see Figure 1) 6 PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL D O tPZH tPZL OE O tPHZ tPLZ OE O POST OFFICE BOX 655303 CY74FCT541T CY74FCT541AT CY74FCT541CT MIN MAX MIN MAX MIN MAX 1.5 8 1.5 4.8 1.5 4.1 1.5 8 1.5 4.8 1.5 4.1 1.5 10 1.5 6.2 1.5 5.8 1.5 10 1.5 6.2 1.5 5.8 1.5 9.5 1.5 5.6 1.5 5.2 1.5 9.5 1.5 5.6 1.5 5.2 • DALLAS, TEXAS 75265 UNIT ns ns ns CY54FCT541T, CY74FCT541T 8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCCS072 – OCTOBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 500 Ω S1 Open 7V Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 1.5 V Input 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL tPHL Out-of-Phase Output tPLZ ≈3.5 V 1.5 V tPZH VOH 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V Output Waveform 1 (see Note B) tPLH 1.5 V 1.5 V tPZL VOH In-Phase Output 3V Output Control Output Waveform 2 (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 18-Nov-2023 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) Samples (4/5) (6) 5962-9223701M2A ACTIVE LCCC FK 20 55 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629223701M2A CY54FCT 541TLMB 5962-9223701MRA ACTIVE CDIP J 20 20 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9223701MR A CY54FCT541TDMB 5962-9223705MRA ACTIVE CDIP J 20 20 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9223705MR A CY54FCT541TDMB ACTIVE CDIP J 20 20 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 5962-9223701MR A CY54FCT541TDMB CY54FCT541TLMB ACTIVE LCCC FK 20 55 Non-RoHS & Green SNPB N / A for Pkg Type -55 to 125 59629223701M2A CY54FCT 541TLMB CY74FCT541ATPC ACTIVE PDIP N 20 20 RoHS & Non-Green NIPDAU N / A for Pkg Type -40 to 85 CY74FCT541ATPC Samples CY74FCT541ATQCT ACTIVE SSOP DBQ 20 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT541A Samples CY74FCT541ATSOC ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT541A Samples CY74FCT541ATSOCT ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT541A Samples CY74FCT541CTQCT ACTIVE SSOP DBQ 20 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT541C Samples CY74FCT541CTSOC ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT541C Samples CY74FCT541CTSOCT ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT541C Samples CY74FCT541TQCT ACTIVE SSOP DBQ 20 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT541 Samples CY74FCT541TSOC ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 FCT541 Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. Addendum-Page 1 Samples Samples Samples Samples Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Nov-2023 NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of