TSP8N60M

600V N-Channel MOSFET General Description Features This Power MOSFET is produced using Truesemi‘s advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction based on half bridge topology. Absolute Maximum Ratings Symbol • 7.5A,600V,Max.RDS(on)=1.20 Ω @ VGS =10V • Low gate charge(typical 29nC) • High ruggedness • Fast switching • 100% avalanche tested • Improved dv/dt capability TC=25℃ unless otherwise specified Parameter TSP8N60M TSF8N60M Units VDSS Drain-Source Voltage 600 V VGS Gate-Source Voltage ± 30 V ID Drain Current TC = 25℃ 7.5 7.5* A TC = 100℃ 4.5 4.5* A 30 IDM Pulsed Drain Current (Note 1) EAS Single Pulsed Avalanche Energy (Note 2) 267 mJ EAR Repetitive Avalanche Energy (Note 1) 15.2 mJ Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns dv/dt PD TJ, TSTG TL Power Dissipation (TC = 25℃) -Derate above 25℃ A 30* 152 50 W 1.21 0.40 W/℃ Operating and Storage Temperature Range -55 to +150 ℃ 300 ℃ Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds * Drain current limited by maximum junction temperature. Thermal Resistance Characteristics Symbol Parameter TSP8N60M TSF8N60M Units RθJC Thermal Resistance,Junction-to-Case 0.82 2.5 ℃/W RθCS Thermal Resistance,Case-to-Sink Typ. 0.5 -- ℃/W RθJA Thermal Resistance,Junction-to-Ambient 62.5 62.5 ℃/W © 2018 Truesemi Semiconductor Corporation Ver.C1 www.truesemi.com TSP8N60M/TSF8N60M TSP8N60M/TSF8N60M Symbol Parameter unless otherwise specified Test Conditions Min Typ Max Units Gate Threshold Voltage VDS = VGS, ID = 250 uA㎂ 2.0 -- 4.0 V Static Drain-Source On-Resistance VGS = 10 V, ID = 3.75A -- 0.98 1.20 Ω Fprward Transconductance VDS = 20 V, ID = 3.75A -- 8.5 -- S 600 -- -- V ID = 250 uA, Referenced to 25 ℃ -- 0.7 -- V/℃ VDS = 600 V, VGS = 0 V -- -- 1 uA VDS = 480 V, TJ = 125℃ -- -- 10 uA On Characteristics VGS RDS(ON) YFS Off Characteristics BVDSS Drain-Source Breakdown Voltage △BVDSS Breakdown Voltage Temperature / △TJ Coefficient VGS = 0 V, ID = 250 uA㎂ IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current,Forward VGS = 30 V, VDS = 0 V -- -- 100 nA㎁ IGSSR Gate-Body Leakage Current,Reverse VGS =- 30 V, VDS = 0 V -- -- -100 nA㎁ -- 1000 -- pF㎊ -- 110 -- pF㎊ -- 12.6 -- pF -- 20 -- ns -- 50 -- ns㎱ -- 80 -- ns㎱ -- 70 -- ns㎱ -- 29 -- nC -- 4.7 -- nC -- 12.5 -- nC Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd VDS = 300V, ID = 7.5A, RG = 25 Ω (Note 4,5) VDS = 480 V, ID = 7.5A, VGS = 10 V (Note 4,5) Gate-Drain Charge Source-Drain Diode Maximum Ratings and Characteristics IS Continuous Source-Drain Diode Forward Current -- -- 7.5 ISM Pulsed Source-Drain Diode Forward Current -- -- 30.0 VSD Source-Drain Diode Forward Voltage IS = 7.5A, VGS = 0 V -- -- 1.5 trr Reverse Recovery Time IS =7.5A, VGS = 0 V -- 350 -- ns㎱ Qrr Reverse Recovery Charge diF/dt = 100 A/μs -- 3.3 -- uC (Note 4) A V NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L=10mH, IAS=7.5A, VDD=50V, RG=25 Ω,Starting TJ=25 ℃ 3. ISD≤7.5A, di/dt ≤ 200A/us, VDD ≤ BVDSS, Starting TJ = 25 ℃ 4. Pulse Test: Pulse width ≤ 300us, Duty Cycle ≤ 2% 5. Essentially Independent of Operating Temperature Typical Characteristics © 2018 Truesemi Semiconductor Corporation Ver.C1 www.truesemi.com TSP8N60M/TSF8N60M Electrical Characteristics TC=25 ℃ © 2018 Truesemi Semiconductor Corporation TSP8N60M/TSF8N60M Typical Characteristics Ver.C1 www.truesemi.com TSP8N60M/TSF8N60M Typical Characteristics © 2018 Truesemi Semiconductor Corporation Ver.C1 www.truesemi.com TSP8N60M/TSF8N60M Typical Characteristics © 2018 Truesemi Semiconductor Corporation Ver.C1 www.truesemi.com TSP8N60M/TSF8N60M Fig 12. Gate Charge Test Circuit & Waveform 50KΩ 12V VGS Same Type as DUT 200nF Qg 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Fig 13. Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 10V 10% td(on) tr td(off) t on t off tf Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms L VDS VDD ID RG 10V 1 EAS = ---- LL IAS2 2 BVDSS IAS ID (t) DUT VDS (t) VDD tp © 2018 Truesemi Semiconductor Corporation Ver.C1 Time www.truesemi.com TSP8N60M/TSF8N60M Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) IS ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VDD Vf Body Diode Forward Voltage Drop © 2018 Truesemi Semiconductor Corporation Ver.C1 www.truesemi.com © 2018 Truesemi Semiconductor Corporation TSP8N60M/TSF8N60M Package Dimension Ver.C1 www.truesemi.com © 2018 Truesemi Semiconductor Corporation TSP8N60M/TSF8N60M Package Dimension Ver.C1 www.truesemi.com