LP6220ASPF

LP6220A Preliminary Datasheet 600mA LNB Power Supply & Control Voltage Regulator General Description Features Designed for analog and digital satellite receivers/sat-TV, the LP6220A is a adjustable voltage regulator, specifically to provide the 14V/19V power supply and the 22kHz tone signaling to the LNB converter in the antenna dish or to the multi-switch box.  LP6220A consists of a BOOST converter with a internal power MOS running at 1MHz switching frequency and a LDO regulator which with push-pull output stage generates clean 22-kHz tone signal superimposed at the output even at zero loading. The EXTM can accept a DiSEqC command and transfer it symmetrically to the output to meet DiSEqC 1.x protocol. Other features include over temperature protection and under-voltage lockout (UVLO). The LP6220A is available in a space saving ESOP-8 package.           Applications Order Information LP6220A □□□  Low noise output to avoid sensitivity of Can Tuner and DISH’s LNA dropping down Single chip solution on 700mVpp 22KHz EXTM with 10μ s Trise/Tfall for less Transferring noise LNB Voltages (14V/19V) compatible with common standards, Push-pull output stage minimizes 14→19V and 19V→14V output transition times External 22KHz EXTM input 1MHz Switch Frequency Boost Integrate Low Noise Linear Regulator Under Voltage Lockout Output Short-Circuit Protection Output Over-Current Protection Over-Temperature Protection Available in ESOP-8 RoHS Compliant and Halogen Free F: Green Package Type SP: ESOP-8      LNB Power supply For DVB-S/S2/ABS Digital Set-Top-Box Satellite TV cards STB Satellite Receiver PC Card Satellite Marking Information Device Marking Package Shipping LP6220A LPS ESOP-8 4K/REEL LP6220A YWX Y: Y is year code. W: W is week code. X: X is series number. LP6220A Version 0.1 FEB.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 8 LP6220A Preliminary Datasheet Typical Application Circuit D1 SK24 L1 10uH VIN VBoost C1 20uF Rin 10Ω Cin 1uF LX VIN Select Voltage C3 100nF C2 20uF BOOST GND Surge Protection OUT EN EN CP D3 1N4007 HLS EXTM EXTM D2 SK14 C4 100nF (Option) VOUT C5 100nF LP6220A Figure 1. Typical Application Circuit of LP6220A . Pin Configuration VIN 1 OUT 2 BOOST 3 CP 4 EP GND 8 EXTM 7 HLS 6 EN 5 LX Figure 2. Package Top View LP6220A Version 0.1 FEB.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 8 LP6220A Preliminary Datasheet Function Block Diagram LX Boost CP OUT Charge Pump OSC UVLO VIN EN OCP SCP OTP BOOST Control Logic Driver LDO VREF 14V/19V Select 22kHz signal input HLS EXTM GND Figure 3. Function Block Diagram Functional Pin Description Pin NO. ESOP8 1 VIN Power Source Input. Connect a ceramic capacitor between VIN and GND. 2 OUT Output Voltage for LNB. 3 BOOST 4 CP Charge Pump for LDO use. 5 LX Boost Regulator Switching Node. Connect the inductor and the schottky diode to LX. 6 EN Enable Pin. 7 HLS 8 EXTM 22KHz external modulation signal input Pin. EP GND Ground. LP6220A Description Boost converter output Voltage sense and internal LDO's input terminal. LNB output Voltage Set Pin. HLS=H:19V；HLS=L:14V Version 0.1 FEB.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 8 LP6220A Preliminary Datasheet Absolute Maximum Ratings Note1  VIN to GND -------------------------------------------------------------------------------------------------------- -0.3V to +27V  BOOST, OUT to GND ------------------------------------------------------------------------------------------ -0.3V to +22.5V  LX to GND(10ns) ------------------------------------------------------------------------------------------------ -0.3V to +36V  CP to GND --------------------------------------------------------------------------------------------------------- -0.3V to +27V  EN, HLS, EXTM to GND --------------------------------------------------------------------------------------- -0.3V to +6V  Operating Junction Temperature Range (TJ) -------------------------------------------------------- -40°C to +125°C  Operation Ambient Temperature Range ------------------------------------------------------------- -40°C to +85°C  Storage Temperature Range  Maximum Soldering Temperature (at leads, 10sec) ---------------------------------------------------------------------------- -65°C to +150°C ----------------------------------------------- +260°C Note1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. LP6220A Version 0.1 FEB.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 4 of 8 LP6220A Preliminary Datasheet Electrical Characteristics (VIN = 12V, TA = 25°C (Unless Otherwise Specified)) Parameter Symbol Test Conditions Min Typ Max Units 9 12 14 V Supply and Reference Function Power Source Voltage VIN Power Source Current IQ Shutdown Current Input Under Threshold Voltage ISD Lockout UVLO Threshold Hysteresis VUVLO ΔVUVLO EN=H,VOUT=19V, EXTM=0V EN=H,VOUT=19V, EXTM apply 22KHz EN=L VIN Rising Falling Hysteresis 8 mA 24 mA 1.6 mA 8 V 0.3 V Thermal Shutdown Threshold TSD 160 °C Thermal Shutdown Threshold Hysteresis ΔTSD 25 °C EXTM 1.4 VIH V EXTM Threshold Voltage VIL EXTM Internal Pull-Low Current IEXTM Input EXTM Frequency Range FEXTM VOUT Output EXTM Amplitude Vpp(EXTM) 0.4 Sink 20 ILOAD=0~0.5A, CLOAD=100nF V 4 uA 22 kHz 700 mV 50 % VOUT Output EXTM Duty DEXTM VOUT EXTM Rising Time TR_EXTM ILoad=0~0.5A, CLoad=100nF 7.5 10 12.5 us VOUT EXTM Falling Time TF_EXTM ILoad=0~0.5A, CLoad=100nF 7.5 10 12.5 us Logic (EN, HLS) 1.4 VENH V EN Threshold Voltage VENL EN Internal Pull-High Current IEN 0.4 Source 12 uA 1.4 VHLH V V HLS Threshold Voltage VHLL HLS Internal Pull-Low Current LP6220A Version 0.1 FEB.-2019 IHL 0.4 Sink Email: marketing@lowpowersemi.com 4 www.lowpowersemi.com V uA Page 5 of 8 LP6220A Preliminary Datasheet Electrical Characteristics(Continued) (VIN = 12V, TA = 25°C (Unless Otherwise Specified)) Parameter Symbol Test Conditions Min Typ Max Units 0.8 1 1.2 MHz Boost Regulator Internal Oscillator Frequency FOSC Switch On Resistance RDS(ON) 150 mΩ Maximum Duty Cycle DMAX 80 % TON(MIN) 90 ns ILimit 2.2 A Minimum On Time Current Limit Output Voltage Output voltage Linear regulator drop voltage VOUT Line Regulation VOUT Output Load Regulation Output Current limit LP6220A Version 0.1 FEB.-2019 EN=H, HLS=H 18.5 19 19.5 V EN=H, HLS=L 13.6 14 14.4 V VOUT VDrop ΔVOUT/ (VOUT x ΔVIN) ΔVOUT/ VOUT EN=H, ILOAD=500mA. 0.7 VIN=9~14V, VOUT=19V 0.05 ILoad=0~500mA, VOUT=19V COUT=0.1uF 0.5 % 650 mA ILIMIT Email: marketing@lowpowersemi.com V 0.2 www.lowpowersemi.com %/V Page 6 of 8 LP6220A Preliminary Datasheet Application Information DiSEqC Encoding The EXTM accepts an externally modulated EXTM. command and in turn modulates the VOUT symmetrically to meet the DiSEqC 1.x and with few more external components to meet DiSEqC 2.0 transmit protocol. Burst coding of the EXTM can be accomplished due to the fast response of the EXTM pin. Over Temperature Protection The LP6220A device enters over temperature protection if its junction temperature exceeds 160°C (typical). During over temperature protection none of the device's functions are available. To resume normal operation the junction temperature need cool down, and the outputs will restart. Layout Consideration The proper PCB layout and component placement are critical for all circuit. Here are some suggestions to the layout of LP6220A design. 1. The input capacitor should be located as closed as possible to the VIN and ground plane. 2. Minimize the distance of all traces connected to the LX node, that the traces short and wide route to obtain optimum efficiency. 3. All output capacitor must be closed to ground plane. The ground terminal of COUT must be located as closed as possible to ground plane. 4. Radiated noise can be decreased by choosing a shielded inductor. L VIN C1 The LP6220A is a power management IC that integrates a boost converter, a LDO, and a 22-kHz tone transfer that serves as a LNB power supply. OUT voltage set by HLS pin, and accepts a tone modulated DiSEqC command and transfers it symmetrically to the output to meet DiSEqC 1.x protocol. Under Voltage Lockout (UVLO) The LP6220A had an UVLO internal circuit that enable the device once the voltage on the VIN voltage exceeds the UVLO threshold voltage. Boost Converter The LP6220A use 1MHz fixed-frequency, current mode architecture to regulate the output voltage. The LP6220A measures the output voltage through BOOST pin, and use the internal compensation to saving external element. Linear Regulator The linear regulator features low drop out voltage to minimize power loss while keeping enough head room for the 22-kHz tone. It also implements a tight current limit for over current protection. The linear regulator is used to generate the 22-kHz tone signal by changing the reference voltage. Over Load Protection When the LNB OUT current over the preset over current threshold and the status continues for 65ms, the device enters a auto-retry routine. The device returns to normal operation after the status release. EXTM input Once LP6220A is enable, it can applying 22kHz, 50% square pulse on EXTM in generates the DISEQ EXTM (±350mV) on the output VOUT. 5 6 7 8 Diode EP C2 C5 GND Diode VOUT 4 3 Rin 2 1 Cin GND CCP VBoost Figure 4. Recommended PCB Layout Diagram LP6220A Version 0.1 FEB.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 8 LP6220A Preliminary Datasheet Outline Information ESOP-8 Package (Unit: mm) D D2 SYMBOLS UNIT LPS LP6220P YWX E E2 E1 1 b DIMENSION IN MILLIMETER MIN MAX A 1.300 1.700 A1 0.000 0.100 A2 1.250 1.520 b 0.330 0.510 D 4.800 5.000 D2 3.150 3.450 E 5.800 6.200 E1 3.800 4.000 E2 2.260 e e L A2 2.560 1.270 BSC 0.410 1.270 A A1 L LP6220A Version 0.1 FEB.-2019 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 8 of 8