ATA8520
Single-Chip SIGFOX RF Transmitter
DATASHEET
Features
● Fully integrated, single-chip RF transmitter (SIGFOX™ compliant)
● System-on-chip solution including SIGFOX related protocol handling for modem
operation
● AVR® microcontroller core with embedded firmware, SIGFOX, protocol stack and
ID/PAC
● Supports uplink operation, i.e. transmit data telegram to SIGFOX base stations
● Operating frequency range: 868.0MHz to 868.6MHz
● Low current consumption: 32.7mA during telegram transmit with +14.5dBm TX
output power
● Typical OFF mode current: 5nA (maximum 600nA at VS = +3.6V and T = +85°C)
● Data rate: 100bit/s with DBPSK modulation
● SPI interface for TX data access and transmitter configuration
● Event signal indicates the status of the IC to an external microcontroller
● Power-up (typical 10ms OFF mode -> IDLE mode)
● Supply voltage ranges 1.9V to 3.6V and 2.4V to 5.5V (SIGFOX compliant supply
range 3V±5% and 3.3V to 5.5V)
● Temperature range –40°C to +85°C
● ESD protection at all pins (±4kV HBM, ±200V MM, ±750V FCDM)
● Small 55mm QFN32 package/pitch 0.5mm
Applications
SIGFOX compatible modem for long-range, low-power and low-cost applications using the
SIGFOX network
● Home and building automation
● Alarm and security systems
● Smart environment and industrial
● Smart parking
● Tracking
● Metering
9372H-INDCO-11/15
1.
General Description
1.1
Introduction
The Atmel® ATA8520 is a highly integrated, low-power RF transmitter with an integrated AVR® microcontroller for
applications using the wide area SIGFOX™ network
The Atmel ATA8520 is partitioned into three sections: an RF front end, a digital baseband and the low-power 8-bit AVR
microcontroller. The product is designed for the ISM frequency band in the range of 868.0MHz to 868.6MHz. The external
part count is kept to a minimum due to the very high level of integration in this device. By combining outstanding RF
performance with highly sophisticated baseband signal processing, robust wireless communication can be easily achieved.
The transmit path uses a closed loop fractional-N modulator.
The SPI interface enables external control and device configuration.
1.2
System Overview
Figure 1-1. Circuit Overview
AVCC
VS
DVCC
Supply and Reset
PLL
SIGFOX
Protocol Stack
RF_OUT
Firmware
DSP
Peripherals
TX
ID and PAC
CPU
RF Frontend
DATA BUS
XTO
Port B
Port C
PB[7..0]
(SPI)
PC[5..0]
XTAL
Figure 1-1 shows an overview of the main functional blocks of the Atmel ATA8520. External control of the Atmel ATA8520 is
performed through the SPI pins SCK, MOSI, MISO, and NSS. The functionality of the device is defined by the internal
firmware and processed by the AVR. SPI commands are used to control the device and to start the data telegram
transmission. The end of the telegram transmission is signaled to an external microcontroller on pin 28 (PB6/EVENT).
It is important to note that all PWRON and NPWRON pins (PC1..5, PB4, PB7) are active in OFF mode. This means that
even if the Atmel ATA8520 is in OFF mode and the DVCC voltage is switched off, the power management circuitry within the
Atmel ATA8520 biases these pins with VS.
The AVR microcontroller ports can be used as button inputs, LED drivers, EVENT pin, general purpose digital inputs, or
wake-up inputs, etc. Functionality of these ports is already implemented in the firmware.
2
ATA8520 [DATASHEET]
9372H–INDCO–11/15
Pinning
NC
NC
NC
AGND
PB7
PB6
PB5
PB4
PB3
Figure 1-2. Pin Diagram
32
31
30
29
28
27
26
25
1
NC
2
NC
3
exposed die pad
Atmel
ATA8520
24
PB2
23
PB1
22
PB0
21
DGND
6
19
PC5
RF_OUT
7
18
PC4
VS_PA
8
17
PC3
9
10
11
12
13
14
15
16
PC2
NC
PC1
DVCC
PC0
20
VS
5
AVCC
NC
XTAL2
4
XTAL1
NC
NC
1.3
Note:
The exposed die pad is connected to the internal die.
Table 1-1.
Pin Description
Pin No.
Pin Name
Type
1
NC
Connected to GND
2
NC
Connected to GND
3
NC
Connected to GND
4
NC
Connected to GND
5
NC
Leave open
Description
6
NC
7
RF_OUT
Analog
Connected to GND
Power amplifier output
8
VS_PA
Analog
Power amplifier supply. 3V supply: connect to VS.
5V supply: leave open. Use SPI command “Write System
Configuration” (0x11) to enable 5V supply mode
9
NC
–
10
XTAL1
Analog
Crystal oscillator pin 1 (input)
11
XTAL2
Analog
Crystal oscillator pin 2 (output)
12
AVCC
Analog
RF front-end supply regulator output
13
VS
Analog
Main supply voltage input
14
PC0
Digital
Main
: NRESET
15
PC1
Digital
Main
Alternate
: AVR Port C1
: NPWRON1
16
PC2
Digital
Main
Alternate
: AVR Port C2
: NPWRON2
17
PC3
Digital
Main
Alternate
: AVR Port C3
: NPWRON3
Connected to GND
ATA8520 [DATASHEET]
9372H–INDCO–11/15
3
Table 1-1.
Pin Description (Continued)
Pin No.
Pin Name
Type
Description
18
PC4
Digital
Main
Alternate
: AVR Port C4
: NPWRON4
19
PC5
Digital
Main
Alternate
: AVR Port C5
: NPWRON5
20
DVCC
–
Digital supply voltage regulator output
21
DGND
–
Digital ground
22
PB0
Digital
Main
:--
23
PB1
Digital
Main
: SCK
24
PB2
Digital
Main
: MOSI (SPI master out Slave in)
25
PB3
Digital
Main
: MISO (SPI master in Slave out)
26
PB4
Digital
Main
: PWRON
27
PB5
Digital
Main
: NSS
28
PB6
Digital
Main
: EVENT
29
PB7
Digital
Main
Alternate
: TX active
: NPWRON6
30
AGND
–
Analog ground
31
NC
–
Connected to GND
NC
–
Connected to GND
GND
–
Ground/backplane on exposed die pad
32
4
ATA8520 [DATASHEET]
9372H–INDCO–11/15
1.4
Applications
This section provides application examples for the two supply modes for the Atmel® ATA8520 device. In addition the
recommended PCB design and layout is described to achieve the SIGFOX™ certification.
3V Application Example
Figure 1-3. 3V Application with External Microcontroller
IRQ
NSS
MISO
NC
25
PB3
26
PB4
27
PB5
PB7
1
28
PB6
29
AGND
NC
30
NC
31
32
24
23
22
NC
PB0
Atmel
ATA8520
4
NC
21
DGND
20
5
NC
PC5
RF_OUT
PC4
18
VS_PA
PC3
17
C2
9
10
11
12
13
14
15
C5
PC2
PC1
PC0
VS
AVCC
XTAL2
7
8
C1
NC
19
XTAL1
L1
Microcontroller
DVCC
6
RF Filter
SCK
PB1
NC
3
C6
MOSI
PB2
2
NC
1.4.1
16
Wake/Monitor
Q1
C3
C4
VS = 3V
VDD
Supply
Figure 1-3 shows a typical application circuit with an external host microcontroller operating from a 3V lithium cell. The Atmel
ATA8520 stays in OFFMode until NPWRON1 (PC1) is used to wake it up. In OFFMode the Atmel ATA8520 draws typically
less than 5nA at 25°C.
In OFFMode all Atmel ATA8520 AVR® ports PB0..PB7 and PC0..PC5 are switched to input. PC0..PC5 and PB7 have
internal pull-up resistors ensuring that the voltage at these ports is VS. PB0..PB6 are tri-state inputs and require additional
consideration. PB1, PB2, and PB5 have defined voltages since they are connected to the output of the external
microcontroller. PB4 is connected to ground to avoid unwanted power-ups. PB0, PB3 and PB6 do not require external
circuitry since the internal circuit avoids transverse currents in OFFMode. The external microcontroller has to tolerate the
floating inputs. Otherwise additional pull-down resistors are required on these floating lines.
Typically, the Atmel ATA8520 wake-up is done by pulling NPWRON1 (pin 15) to ground.
RF_OUT is matched with C1/L1 for 50 antenna connection. The RF filter is required to suppress unwanted side and
spurious emissions. The design of this filter depends on the final PCB and system layout and is subject to SIGFOX and ETSI
certification procedures.
Together with the fractional-N PLL within the Atmel ATA8520, an external crystal is used to fix the Tx frequency. Accurate
load capacitors for this crystal are integrated to reduce the system part count and cost. Only four supply blocking capacitors
are needed to decouple the different supply voltages AVCC, DVCC, VS, and VS_PA of the Atmel ATA8520. The exposed
die pad is the RF and analog ground of the Atmel ATA8520. It is connected directly to AGND via a fused lead. The Atmel
ATA8520 is controlled using specific SPI commands via the SPI interface.
ATA8520 [DATASHEET]
9372H–INDCO–11/15
5
1.4.2
5V Application Example
In addition to the 3V supply mode the device can be used with a 3.3V to 5.5V supply voltage as shown in Figure 1-4. This
requires to remove the connection between VS and VS_PA (pin 8) and to enable the internal LDO regulator. The 5V mode
can be enabled using the SPI command “Write System Configuration” (0x11) followed by a system reset to enable these
settings (the 5V mode can only be used with firmware revision ≥V1.0. Firmware revisions
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