ATSAMG54G19B-UUT

SAM G54G / SAM G54N Atmel | SMART ARM-based Flash MCU SUMMARY DATASHEET Description The Atmel® | SMART SAM G54 is a series of Flash microcontrollers based on the high-performance 32-bit ARM® Cortex®-M4 RISC processor. They operate at a maximum speed of 96 MHz and feature up to 512 Kbytes of Flash and 96 Kbytes of SRAM. The peripheral set includes one USART, two UARTs, three I2C-bus interfaces (TWI), up to two SPIs, two three-channel general-purpose 16-bit timers, two I2S controllers with two-way, one-channel pulse density modulation, one realtime timer (RTT), one real-time clock (RTC) and one 8-channel 12-bit ADC. The Atmel | SMART SAM G54 devices have two software-selectable low-power modes: Sleep and Wait. In Sleep mode, the processor is stopped while all other functions can be kept running. In Wait mode, all clocks and functions are stopped but some peripherals can be configured to wake up the system based on predefined conditions. This feature, called SleepWalking, performs a partial asynchronous wake-up, thus allowing the processor to wake up only when needed. The Event System allows peripherals to receive, react to and send events in Active and Sleep modes without processor intervention. A general-purpose microcontroller with the best ratio in terms of reduced power consumption, processing power and peripheral set, the SAM G54 series sustains a wide range of applications including consumer, industrial control, and PC peripherals. The device operates from 1.62V to 3.45V and is available in a 49-ball WLCSP package and a 100-pin LQFP package. This is a summary document. The complete document is available on the Atmel website at www.atmel.com. Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 Features    Core ̶ ARM Cortex-M4 up to 96 MHz ̶ Memory Protection Unit (MPU) ̶ DSP Instructions ̶ Floating Point Unit (FPU) ̶ Thumb®-2 instruction set Memories ̶ 512 Kbytes embedded Flash ̶ 96 Kbytes embedded SRAM System ̶ Embedded voltage regulator for single-supply operation ̶ Power-on reset (POR) and Watchdog for safe operation ̶ Quartz or ceramic resonator oscillators: 3 to 20 MHz with clock failure detection and 32.768 kHz for RTT or device clock ̶ High-precision 8/16/24 MHz factory-trimmed internal RC oscillator. In-application trimming access for frequency adjustment ̶ Slow clock internal RC oscillator as permanent low-power mode device clock ̶ PLL range from 24 MHz to 96 MHz for device clock ̶ 28 peripheral DMA (PDC) channels ̶ 8 x 32-bit General-Purpose Backup Registers (GPBR) ̶ 16 external interrupt lines  Power consumption in Active mode  Low-power modes (typical value) ̶  2 102 µA/MHz running Fibonacci in SRAM ̶ Wait mode down to 8 µA ̶ Wake-up time less than 5 µs ̶ Asynchronous partial wake-up (SleepWalking™) on UART and TWI Peripherals ̶ One USART with SPI mode ̶ Two Inter-IC Sound Controllers (I2S) ̶ Two-way one-channel Pulse Density Modulation (PDM) (interfaces up to two microphones in PDM mode) ̶ Two UARTs ̶ Three Two-wire Interface (TWI) modules featuring two TWI masters and one high-speed TWI slave ̶ One fast SPI at up to 24 Mbit/s ̶ Two three-channel 16-bit Timer/Counters (TC) with Capture, Waveform, Compare and PWM modes ̶ One 32-bit Real-Time Timer (RTT) ̶ One 32-bit Real-Time Clock (RTC) SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14  I/O ̶ ̶ Up to 38 I/O lines with external interrupt capability (edge or level), debouncing, glitch filtering and ondie series resistor termination. Individually programmable open-drain, pull-up and pull-down resistor and synchronous output Two PIO Controllers provide control of up to 25 I/O lines  Analog  Package ̶  One 8-channel ADC, resolution up to 12 bits, sampling rate up to 800 kSPS ̶ 49-ball WLCSP ̶ 100-pin LQFP, 14 x 14 mm, pitch 0.5 mm Temperature operating range ̶ Industrial (-40° C to +85° C) SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 3 1. Configuration Summary Table 1-1 summarizes the SAM G54 device configurations. Table 1-1. Configuration Summary Feature SAM G54G19 SAM G54N19 Flash 512 Kbytes 512 Kbytes SRAM 96 Kbytes 96 Kbytes Package WLCSP49 LQFP100 Number of PIOs 38 38 Event System Yes Yes 8 channels 8 channels Performance: Performance: 800 kSPS at 10-bit resolution 800 kSPS at 10-bit resolution 200 kSPS at 11-bit resolution 200 kSPS at 11-bit resolution 50 kSPS at 12-bit resolution 50 kSPS at 12-bit resolution 6 channels 6 channels 16-bit Timer (3 external channels) (3 external channels) I2SC/PDM 2 / 1-channel 2-way 2 / 1-channel 2-way 12-bit ADC PDC Channels 28 28 USART/UART 1/2 1/2 SPI 1 1 2 masters at 400 Kbits/s and 2 masters at 400 Kbits/s and 1 slave at 3.4 Mbit/s 1 slave at 3.4 Mbit/s TWI 4 SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 Block Diagram T U O IO D D TST VD VD TD I SAM G54 Block Diagram O TM S TC /SW K/ D SW IO JT C LK AG SE L Figure 2-1. TD 2. Voltage Regulator PCK[2:0] PLL RC OSC 8/16/24 MHz Power Management Controller JTAG and Serial Wire In-Circuit Emulator WKUP[15:0] XIN XOUT Cortex-M4 Processor fMAX 96 MHz 3-20 MHz Oscillator Supply Controller DSP XIN32 XOUT32 MPU FPU Flash Unique Identifier 32K OSC I/D 32K RC ERASE Power-on Reset Real-time Clock 8 General-purpose Backup Registers Real-time Timer Watchdog Timer M User Signature Flash S 512 Kbytes 3-layer AHB Bus Matrix fMAX 96 MHz S 96 Kbytes S M S AHB/APB Bridge PDC Reset Controller NRST S M VDDIO VDDCORE 24-bit SysTick Counter NVIC Tamper Detection Supply Monitor SRAM ROM(1) 8 Kbytes PIOA/PIOB System Controller PDMDAT0 PDMCLK0 PDMIC0 PDMIC1 I2SCK[1:0] I2SWS[1:0] I2SDI[1:0] I2SDO[1:0] I2SMCK[1:0] PDC PDC SPI PDC PDC 2 x I2SC PDC 3 x TWI SCK TXD RXD RTS CTS TWCK[2:0] TWD[2:0] PDC USART PDC Timer Counter A TC[0..2] PDC URXD[1:0] UTXD[1:0] NPCS0 NPCS1 MISO MOSI SPCK TCLK[2:0] TIOA[2:0] TIOB[2:0] 2 x UART Timer Counter B TC[3..5] AD[7:0] ADTRG PDC 12-bit ADC VDDIO Note: Event System 1. The ROM is reserved for future use. SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 5 3. Signal Description Table 3-1 provides details on the signal names classified by peripheral. Table 3-1. Signal Description List Signal Name Function Type Active Level Voltage Reference Comments Power Supplies VDDIO Peripheral I/O Lines, Voltage Regulator, ADC Power Supply Power – – VDDOUT Voltage Regulator Output Power – – – VDDCORE Core Chip Power Supply Power – – Connected externally to VDDOUT GND Ground Ground – – – – VDDIO Reset state: - PIO input 1.62V to 3.45V Clocks, Oscillators and PLLs XIN Main Oscillator Input XOUT Main Oscillator Output XIN32 Slow Clock Oscillator Input XOUT32 Slow Clock Oscillator Output Input Output – – Input – VDDIO - Internal pull-up disabled Output – – - Schmitt Trigger enabled Reset state: - PIO input PCK0–PCK2 Programmable Clock Output Output – – - Internal pull-up enabled - Schmitt Trigger enabled ICE and JTAG TCK Test Clock Input – VDDIO No pull-up resistor TDI Test Data In Input – VDDIO No pull-up resistor TDO Test Data Out Output – VDDIO – TRACESWO Trace Asynchronous Data Out Output – VDDIO – SWDIO Serial Wire Input/Output I/O – VDDIO – SWCLK Serial Wire Clock Input – VDDIO – TMS Test Mode Select Input – VDDIO No pull-up resistor JTAGSEL JTAG Selection Input High VDDIO Pull-down resistor Input High VDDIO Pull-down (15 kΩ) resistor I/O Low VDDIO Pull-up resistor Input – VDDIO Pull-down resistor Flash Memory ERASE Flash and NVM Configuration Bits Erase Command Reset/Test NRST Microcontroller Reset TST Test Mode Select Universal Ansynchronous Receiver Transceiver - UART[x=0..1] URXDx 6 UART Receive Data x SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 Input – – – Table 3-1. Signal Description List (Continued) Signal Name UTXDx Function UART Transmit Data x Type Active Level Voltage Reference Comments Output – – – PIO Controller - PIOA - PIOB PA0–PA24 Parallel I/O Controller A I/O – VDDIO Pulled-up input at reset. No pull-down for PA3/PA4/PA14. PB0–PB12 Parallel I/O Controller B I/O – VDDIO Pulled-up input at reset I/O – VDDIO Wake-up pins are used also as External Interrupt Wake-up Pins WKUP0–15 Wake-up Pin / External Interrupt Universal Synchronous Asynchronous Receiver Transmitter USART SCK USART Serial Clock I/O – – – TXD USART Transmit Data I/O – – – RXD USART Receive Data Input – – – RTS USART Request To Send Output – – – CTS USART Clear To Send Input – – – Input – – – Timer/Counter - TC[x=0..3] TCLKx TC Channel x External Clock Input TIOAx TC Channel x I/O Line A I/O – – – TIOBx TC Channel x I/O Line B I/O – – – Serial Peripheral Interface - SPI MISO Master In Slave Out I/O – – – MOSI Master Out Slave In I/O – – – SPCK SPI Serial Clock I/O – – NPCS0 SPI Peripheral Chip Select 0 I/O Low – – NPCS1 SPI Peripheral Chip Select 1 Output Low – – High-speed pad Two-Wire Interface- TWI[x=0..1] TWDx TWIx Two-wire Serial Data I/O – – High-speed pad for TWD0 TWCKx TWIx Two-wire Serial Clock I/O – – High-speed pad for TWDCK0 10-bit Analog-to-Digital Converter - ADCC AD0–AD7 Analog Inputs Analog – – – ADTRG ADC Trigger Input – – – Inter-IC Sound Controller - I2SC[x=0..1] I2SMCKx Master Clock Output – – – I2SCKx Serial Clock I/O – – – I/O – – – I2SWSx 2 I S Word Select SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 7 Table 3-1. Signal Description List (Continued) Signal Name Function Type Active Level Voltage Reference Comments Input – – – I2SDIx Serial Data Input I2SDOx Serial Data Output Output – – – PDMCLK0 Pulse Density Modulation Clock Output – – – PDMDAT0 Pulse Density Modulation Data Input – – – 8 SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 4. Package and Pinout Table 4-1. 4.1 SAM G54 Packages Device Package SAM G54G19 WLCSP49 SAM G54N19 LQFP100 49-ball WLCSP Pinout Table 4-2. SAM G54G19 49-ball WLCSP Pinout A1 PA9 C1 VDDCORE E1 PB2/AD6 G1 VDDIO A2 GND C2 PA11 E2 PB0/AD4 G2 VDDOUT A3 PA24 C3 PA12 E3 PA18/AD1 G3 GND A4 PB8/XOUT C4 PB6 E4 PA14 G4 VDDIO A5 PB9/XIN C5 PA4 E5 PA10 G5 PA22 A6 PB4 C6 PA3 E6 TST G6 PA15 A7 VDDIO C7 PA0 E7 PA7/XIN32 G7 PA6 B1 PB11 D1 PA13 F1 PA20/AD3 B2 PB5 D2 PB3/AD7 F2 PA19/AD2 B3 PB7 D3 PB1/AD5 F3 PA17/AD0 B4 PA2 D4 PB10 F4 PA21 B5 JTAGSEL D5 PA1 F5 PA23 B6 NRST D6 PA5 F6 PA16 B7 PB12 D7 VDDCORE F7 PA8/XOUT32 SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 9 4.2 100-lead LQFP Pinout Table 4-3. SAM G54N19 100-pin LQFP Pinout 1 NC 26 NC 51 NC 76 NC 2 NC 27 NC 52 NC 77 NC 3 NC 28 PA6 53 PA17 78 NC 4 NC 29 VDDIO 54 PA18 79 PA9 5 VDDIO 30 PA16 55 PA19 80 PB5 6 VDDIO 31 PA15 56 PA20 81 GND 7 NRST 32 PA23 57 PB0 82 GND 8 PB12 33 NC 58 PB1 83 GND 9 PA4 34 NC 59 PB2 84 PB6 10 PA3 35 PA22 60 PB3 85 PB7 11 PA0 36 PA21 61 VDDIO 86 PA24 12 PA1 37 VDDIO 62 PA14 87 PB8 13 PA5 38 VDDIO 63 PA13 88 PB9 14 VDDIO 39 GND 64 PA12 89 VDDIO 15 VDDCORE 40 GND 65 PA11 90 PA2 16 VDDCORE 41 GND 66 VDDCORE 91 PB4 17 TEST 42 GND 67 VDDCORE 92 NC 18 PA7 43 GND 68 PB10 93 JTAGSEL 19 PA8 44 VDDOUT 69 PB11 94 VDDIO 20 GND 45 VDDOUT 70 GND 95 VDDIO 21 NC 46 VDDIO 71 GND 96 NC 22 NC 47 VDDIO 72 PA10 97 NC 23 NC 48 VDDIO 73 NC 98 NC 24 NC 49 NC 74 NC 99 NC 25 NC 50 NC 75 NC 100 NC 10 SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 5. Mechanical Characteristics 5.1 49-lead WLCSP Package max 49-lead WLCSP Package Mechanical Drawing 0.025mm min Figure 5-1. SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 11 5.2 100-lead LQFP Package Figure 5-2. 12 100-lead LQFP Package Mechanical Drawing SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 6. Ordering Information Table 6-1. SAM G54 Ordering Codes Ordering Code MRL Flash (Kbytes) Package Carrier Type Temperature Operating Range ATSAMG54G19B-UUT B 512 WLCSP49 Tape and Reel Industrial -40°C to 85°C ATSAMG54N19B-AU B 512 LQFP100 Tape and Reel Industrial -40°C to 85°C SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 13 7. Revision History In the tables that follow, the most recent version of the document appears first. Table 7-1. 14 SAM G54 Datasheet Rev. 11266AS Revision History Doc. Date Changes 16-Dec-14 First issue. SAM G54G / SAM G54N [SUMMARY DATASHEET] Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14 ARM Connected Logo XXXXXX Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2014 Atmel Corporation. / Rev.: Atmel-11266AS-ATARM-SAM-G54G-SAM-G54N-Summary-Datasheet_16-Dec-14. Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. ARM®, ARM Connected® logo, Cortex®, Thumb® -2, AMBA®, CoreSight™ and others are the registered trademarks or trademarks of ARM Ltd. Other terms and product names may be trademarks of others. DISCLAIMER: The information in this document is provided in connection with Atmel products. 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