HV57009
64-Channel Serial-to-Parallel Converter with P-Channel Open Drain
Controllable Output Current
Features
General Description
•
•
•
•
•
•
•
The HV57009 is a low-voltage to high-voltage
serial-to-parallel converter with P-channel open drain
outputs. This device has been designed as a driver for
plasma panels.
5V CMOS Logic
Up to –85V Output Voltage
Output Current Source Control
16 MHz Equivalent Data Rate
Latched Data Outputs
Forward and Reverse Shifting Options (DIR pin)
Diode to VDD allows Efficient Power Recovery
Applications
•
•
•
•
•
Plasma Panel Driver
Display Driver
Print Head Driver
Relay Driver
Microelectromechanical Systems Applications
The device has two parallel 32-bit Shift registers,
permitting data rates twice the speed of one in a single
clock cycle. There are also 64 latches and control logic
to perform the blanking of the outputs. HVOUT1 is
connected to the first stage of the first Shift register
through the blanking logic. Data is shifted through the
Shift registers on the logic low-to-high transition of the
clock. The DIR pin causes counter-clockwise shifting
when connected to VSS and clockwise shifting when
connected to VDD. A data output buffer is provided for
cascading devices. This output reflects the current
status of the last bit of the Shift register, HVOUT64. The
operation of the Shift register is not affected by the latch
enable (LE) and the blanking (BL) inputs. Data transfer
from the Shift registers to the latches occurs when the
LE input is high. The data in the latches is stored when
LE is low.
The HV57009 has 64 channels of output
constant-current sourcing capability. They are
adjustable from 0.1 mA to 2 mA through one external
resistor or a current source.
Package Type
80-lead PQFP
(Top view)
80
1
See Table 2-1 for pin information.
2018 Microchip Technology Inc.
DS20005856A-page 1
HV57009
Functional Block Diagram
DI/O2A DI/O1A
LE
BL
VDD
I/O
HVOUT1
HVOUT2
HVOUT3
•
•
•
HVOUT32
Latch
DIR
CLK
SR1
Latch
Latch
SR2
Latch
Programmable
Current
I/O
DI/O2B DI/O1B
VSS
VBP +IN
HVOUT33
HVOUT34
HVOUT35
•
•
•
HVOUT64
-IN
Note:
Each SR (shift register) provides 32 outputs. SR1 supplies outputs 1 to 32 and SR2 supplies outputs 33 to 64.
DS20005856A-page 2
2018 Microchip Technology Inc.
HV57009
Typical Application Circuit
2018 Microchip Technology Inc.
DS20005856A-page 3
HV57009
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Supply Voltage, VDD (Note 1) ................................................................................................................. –0.5V to +7.5V
Output Voltage, VNN (Note 1) .......................................................................................................... VDD +0.5V to –95V
Logic Input Levels (Note 1) ............................................................................................................ –0.3V to VDD +0.3V
Ground Current (Note 2) ......................................................................................................................................... 1.5A
Operating Ambient Temperature, TA .................................................................................................... –40°C to +85°C
Storage Temperature, TS .................................................................................................................... –65°C to +150°C
Continuous Total Power Dissipation:
80-lead PQFP (Note 3) ......................................................................................................................... 1200 mW
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: All voltages are referenced to VSS.
2: Duty cycle is limited by the total power dissipated in the package.
3: For operations above 25°C ambient, derate linearly to the maximum operating temperature at 20 mW/°C.
RECOMMENDED OPERATING CONDITIONS
Parameter
Logic Supply Voltage
Sym.
Min.
Typ.
Max.
Unit
VDD
4.5
—
5.5
V
HVOUT
–85
—
VDD
V
High-Level Input Voltage
VIH
VDD–1.2V
—
VDD
V
Low-Level Input Voltage
VIL
0
High-Voltage Output Voltage
Clock Frequency per Register
Operating Ambient Temperature
DS20005856A-page 4
fCLK
DC
TA
–40
—
1.2
V
—
8
MHz
—
4.5
MHz
—
+85
°C
Conditions
2018 Microchip Technology Inc.
HV57009
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: All voltages are referenced to VSS, VSS = 0, and TA = 25°C. Current going out of the chip
is considered negative.
Parameter
Sym.
Min.
Typ.
Max.
Unit
VDD Supply Current
IDD
—
—
15
mA
VDD = VDD maximum,
fCLK = 8 MHz
High-Voltage Supply Current
INN
—
—
–10
µA
Outputs off, HVOUT = –85V
(total of all outputs)
IDDQ
—
—
100
µA
All inputs = VDD,
except +IN = VSS = GND
VDD–0.5V
—
—
V
IO= –100 µA
Quiescent VDD Supply Current
High-Level Output
Data Out
VOH
Conditions
+1
—
VDD
V
IO = –2 mA
VOL
—
—
+0.5
V
IO = 100 µA
High-Level Logic Input Current
IIH
—
—
1
µA
VIH = VDD
Low-Level Logic Input Current
IIL
—
—
–1
µA
VIL = 0V
—
—
–2
mA
VREF = 2V, REXT = 1 kΩ,
See Figure 3-3 and Figure 3-4.
–0.1
—
—
mA
VREF = 0.1V, REXT = 1 kΩ,
See Figure 3-3 and Figure 3-4.
—
—
10
%
Low-Level Output
HVOUT
Data Out
High-Output Source Current
High-Voltage Output Source Current
for IREF = 2 mA
ICS
∆ICS
VREF = 2V, REXT = 1 kΩ,
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: Logic signal inputs and data inputs have tr, tf ≤ 5 ns (10% and 90% points) for
measurements.
Parameter
Sym.
Min.
fCLK
DC
tWL, tWH
Typ.
Max. Unit
Conditions
—
8
—
4.5
62
—
—
ns
tSU
20
—
—
ns
Data Hold Time after Clock Rises
tH
15
—
—
ns
Time from Latch Enable to HVOUT
tON, tOFF
—
—
500
ns
Latch Enable Pulse Width
tWLE
25
—
—
ns
Delay Time Clock to Latch Enable Low to High
tDLE
45
—
—
ns
Latch Enable Set-Up Time before Clock Rises
tSLE
0
—
—
ns
Delay Time Clock to Data Low to High
tDLH
—
—
150
ns
CL = 15 pF
Delay Time Clock to Data High to Low
tDHL
—
—
150
ns
CL = 15 pF
Maximum Allowable Clock Rise and Fall Time
(10% and 90% Points)
tr, tf
—
—
100
ns
Clock Frequency
Clock Width High or Low
Data Set-Up Time before Clock Rises
2018 Microchip Technology Inc.
MHz Per register
MHz When cascading devices
CL = 15 pF
DS20005856A-page 5
HV57009
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
Operating Ambient Temperature
TA
–40
—
+85
°C
Storage Temperature
TS
–65
—
+150
°C
JA
—
37
—
°C/W
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
80-lead PQFP
Timing Waveforms
VDD
DATA
INPUT
50%
Data Valid
50%
tf
tH
tSU
CLK
50%
90%
50%
50%
tWL
VSS
tr
90%
10%
tWH
VDD
VSS
10%
50%
VDD
50%
VSS
tDLH
DATA
OUT
VDD
50%
VSS
tDLH
VDD
50%
50%
LE
VSS
tWLE
tDLE
HVOUT
w/ Data Input
Low
tSLE
IO = 0
tOFF
10%
HVOUT
w/ Data Input
High
DS20005856A-page 6
Previous IO = 0
VDD
90%
10%
Previous IO = IREF
tON
90%
HVOUT(OFF)
VDD
IO = IREF
HVOUT(OFF)
2018 Microchip Technology Inc.
HV57009
2.0
PIN DESCRIPTION
The details on the pins of HV57009 are listed on
Table 2-1. Refer to Package Type for the location of
pins.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
HVOUT24
High-voltage output
2
HVOUT23
High-voltage output
3
HVOUT22
High-voltage output
4
HVOUT21
High-voltage output
5
HVOUT20
High-voltage output
6
HVOUT19
High-voltage output
7
HVOUT18
High-voltage output
8
HVOUT17
High-voltage output
9
HVOUT16
High-voltage output
10
HVOUT15
High-voltage output
11
HVOUT14
High-voltage output
12
HVOUT13
High-voltage output
13
HVOUT12
High-voltage output
14
HVOUT11
High-voltage output
15
HVOUT10
High-voltage output
16
HVOUT9
High-voltage output
17
HVOUT8
High-voltage output
18
HVOUT7
High-voltage output
19
HVOUT6
High-voltage output
20
HVOUT5
High-voltage output
21
HVOUT4
High-voltage output
22
HVOUT3
High-voltage output
23
HVOUT2
High-voltage output
24
HVOUT1
High-voltage output
25
DI/O1A
Data Input/Output 1A pin
26
DI/O2A
Data Input/Output 2A pin
27
NC
No connection
28
NC
No connection
29
LE
Latch enable pin
30
CLK
31
BL
32
VSS
Reference voltage (usually ground)
33
DIR
Direction pin (See Note 1.)
34
VDD
Logic supply voltage (See Note 2.)
Note 1:
2:
Clock pin
Blanking pin
Pin designation for DIR = VDD.
0.1 µF capacitor is needed between VDD and VBP (pin 40) for better output current stability and to
prevent transient cross-coupling between outputs. See Figure 3-3 and Figure 3-4.
2018 Microchip Technology Inc.
DS20005856A-page 7
HV57009
TABLE 2-1:
Pin Number
PIN FUNCTION TABLE (CONTINUED)
Pin Name
Description
35
–IN
36
DI/O2B
Data Input/Output 2B pin
37
DI/O1B
Data Input/Output 1B pin
38
NC
No connection
39
+IN
+IN input pin
40
VBP
Bias control voltage (See Note 2.)
41
HVOUT64
High-voltage output
42
HVOUT63
High-voltage output
43
HVOUT62
High-voltage output
44
HVOUT61
High-voltage output
45
HVOUT60
High-voltage output
46
HVOUT59
High-voltage output
47
HVOUT58
High-voltage output
48
HVOUT57
High-voltage output
49
HVOUT56
High-voltage output
50
HVOUT55
High-voltage output
51
HVOUT54
High-voltage output
52
HVOUT53
High-voltage output
53
HVOUT52
High-voltage output
54
HVOUT51
High-voltage output
55
HVOUT50
High-voltage output
56
HVOUT49
High-voltage output
57
HVOUT48
High-voltage output
58
HVOUT47
High-voltage output
59
HVOUT46
High-voltage output
60
HVOUT45
High-voltage output
61
HVOUT44
High-voltage output
62
HVOUT43
High-voltage output
63
HVOUT42
High-voltage output
64
HVOUT41
High-voltage output
65
HVOUT40
High-voltage output
66
HVOUT39
High-voltage output
67
HVOUT38
High-voltage output
68
HVOUT37
High-voltage output
69
HVOUT36
High-voltage output
70
HVOUT35
High-voltage output
71
HVOUT34
High-voltage output
72
HVOUT33
High-voltage output
73
HVOUT32
High-voltage output
Note 1:
2:
–IN input pin
Pin designation for DIR = VDD.
0.1 µF capacitor is needed between VDD and VBP (pin 40) for better output current stability and to
prevent transient cross-coupling between outputs. See Figure 3-3 and Figure 3-4.
DS20005856A-page 8
2018 Microchip Technology Inc.
HV57009
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
Pin Name
74
HVOUT31
High-voltage output
75
HVOUT30
High-voltage output
76
HVOUT29
High-voltage output
77
HVOUT28
High-voltage output
78
HVOUT27
High-voltage output
79
HVOUT26
High-voltage output
80
HVOUT25
High-voltage output
Note 1:
2:
Description
Pin designation for DIR = VDD.
0.1 µF capacitor is needed between VDD and VBP (pin 40) for better output current stability and to
prevent transient cross-coupling between outputs. See Figure 3-3 and Figure 3-4.
2018 Microchip Technology Inc.
DS20005856A-page 9
HV57009
3.0
FUNCTIONAL DESCRIPTION
Follow the steps in Table 3-1 to power up and power
down the HV57009.
TABLE 3-1:
POWER-UP AND POWER-DOWN SEQUENCE
Power-up
Power-down
Step
Description
Step
1
2
3
4
Connect ground.
Apply VDD.
Set all inputs (Data, CLK, Enable, etc.) to a known state.
Apply VPP.
1
2
3
4
TABLE 3-2:
Description
Remove VPP.
Remove all inputs.
Remove VDD.
Disconnect ground.
TRUTH FUNCTION TABLE
Function
Inputs
Outputs
Data
CLK
LE
BL
DIR
Shift Register
High-voltage Output
Data Out
All O/P High
X
X
X
L
X
*
ON
*
Data Falls Through
(Latches Transparent)
L
↑
H
H
X
L...L
ON
L
H
↑
H
H
X
H...H
OFF
H
Data Stored in Latches
X
X
L
H
X
*
Inversion of stored data
*
DI/O1-2A
↑
H
H
H
QN→QN+1
New ON or OFF
DI/O1-2B
DI/O1-2A
↑
L
H
H
QN→QN+1
Previous ON or OFF
DI/O1-2B
DI/O1-2B
↑
L
H
L
QN→QN-1
Previous ON or OFF
DI/O1-2A
DI/O1-2B
↑
H
H
L
QN→QN-1
New ON or OFF
DI/O1-2A
I/O Relation
Note:
H = VDD (Logic)/VNN (HV Outputs)
L = VSS
↑ = Low-to-high transition
* = Dependent on the previous stage’s state. See Figure 3-2 for DIN and DOUT pin designation for clockwise
and counter-clockwise shifts.
DS20005856A-page 10
2018 Microchip Technology Inc.
HV57009
VDD
VDD
DATA
OUTPUT
DATA
INPUT
VSS
VSS
Logic Data Output
Logic Inputs
VDD
VDD
ICS
PCNTRL
DATA
INPUT
To Internal
Circuits
HVOUT
VSS
Analog Input
FIGURE 3-1:
High Voltage Output
Input and Output Equivalent Circuits.
HVOUT32
DIR = VDD; CW (HVOUT1→HVOUT64)
DIR = VSS; CCW (HVOUT64→HVOUT1)
•
HVOUT33
•
•
•
SR1
•
•
CW
•
•
CW
•
•
SR1
HVOUT2
HVOUT1
Pin
DIR = VDD
DIR = VSS
FIGURE 3-2:
HVOUT63
HVOUT64
25
26
DI/O1A DI/O2A
DI/O2A DI/O1A
36
37
DI/O2B DI/O1B
DI/O1B DI/O2B
Shift Register Operation.
2018 Microchip Technology Inc.
DS20005856A-page 11
HV57009
3.1
Typical Current Programing Circuits
VDD
0.1μF
HV57009
VBP
To other
outputs
Logic
IOUT
- +
HVOUT
+IN
-IN
VSS
REXT
RD *10kΩ
CD *390pF
IREF
VREF
*Required if REXT > 10 kΩ or REXT is replaced by a constant current source.
FIGURE 3-3:
Negative Control Circuit.
VDD
0.1μF
HV57009
VBP
To other
outputs
Logic
IOUT
- +
HVOUT
+IN
-IN
VSS
VREF
REXT
IREF
RD *10kΩ
CD *390pF
*Required if REXT > 10 kΩ or REXT is replaced by a constant current source.
FIGURE 3-4:
Positive Control Circuit.
DS20005856A-page 12
2018 Microchip Technology Inc.
HV57009
EQUATION 3-1:
I OUT = I REF = V REF R EXT
4
0.1k
0.2k
0.5k
1.0k
2.0k 3.0k
3
IOUT (mA)
Figure 3-3 and Figure 3-4 show the programming
circuits to control the high-voltage output current limit.
A reference current IREF is set by the external resistor
REXT and reference voltage VREF. The current mirror
formed by the matching transistors uses the reference
current to cap the maximum allowed current at the
high-voltage output. The relationship between IOUT and
IREF are shown in Equation 3-1 and Equation 3-2.
2
5.0K
1
0
0
1
2
3
4
5
VREF (V)
EQUATION 3-2:
If IOUT = 2 mA and VREF = –5V → REXT = 2.5 kΩ
FIGURE 3-5:
IOUT vs. IREF.
If IOUT = 1 mA and REXT = 1 kΩ → VREF = –1V
If REXT > 10 kΩ, add series network RD and CD to
ground for stability as shown in Figure 3-3 and
Figure 3-4.
This control method behaves linearly as long as the
operational amplifier is not saturated. However, it
requires a negative power source and needs to provide
a current IREF = IOUT for each HV57009 chip being
controlled.
If HVOUT ≥ +1V, the HVOUT cascade may no longer
operate as a perfect current source, and the output
current will diminish. This effect depends on the
magnitude of the output current.
Given IOUT and VREF, the REXT can be calculated using
Equation 3-3:
EQUATION 3-3:
R EXT = V REF I REF = V REF I OUT
The intersection of a set of IOUT and VREF values can
be located in Figure 3-5. The value picked for REXT
must always be in the shaded area for linear operation.
This control method has the advantage that VREF is
positive and draws leakage current only. If
REXT > 10 kΩ, add series network RD and CD to ground
for stability as shown in Figure 3-3 and Figure 3-4.
Note:
Lower reference current, IREF, results in
higher distortion, ∆ICS, on the output.
2018 Microchip Technology Inc.
DS20005856A-page 13
HV57009
4.0
PACKAGE MARKING INFORMATION
4.1
Packaging Information
80-lead PQFP
Example
XXXXXXXXX
YYWWNNN
HV57009PG
e3 1822568
e3
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005856A-page 14
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2018 Microchip Technology Inc.
HV57009
80-Lead PQFP Package Outline (PG)
20.00x14.00mm body, 3.40mm height (max), 0.80mm pitch, 3.90mm footprint
D
D1
E
Note 1
(Index Area
D1/4 x E1/4)
E1
80
ș
1
e
b
Top View
View B
Gauge
Plane
L2
A A2
L
L1
Seating
Plane
A1
Side View
Seating
Plane
ș
View B
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEH DPROGHGPDUNLGHQWL¿HU DQHPEHGGHGPHWDOPDUNHU RU
a printed indicator.
Symbol
Dimension
(mm)
MIN
NOM
MAX
A
A1
2.80*
0.25
3.40
-
A2
b
D
D1
E
E1
e
2.55 0.30 23.65* 19.80* 17.65* 13.80*
2.80
-
23.90
20.00
17.90
14.00
0.50* 3.05 0.45 24.15* 20.20* 18.15* 14.20*
L
L1
L2
0.73
0.80
BSC
0.88
1.03
1.95
REF
0.25
BSC
ș
ș
0O
5O
3.5O
-
7
O
16O
JEDEC Registration MO-112, Variation CB-1, Issue B, Sept.1995.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings not to scale.
S
D
# DSPD 80PQFPPG V i C041309
2018 Microchip Technology Inc.
DS20005856A-page 15
HV57009
NOTES:
DS20005856A-page 16
2018 Microchip Technology Inc.
HV57009
APPENDIX A:
REVISION HISTORY
Revision A (April 2018)
• Converted Supertex Doc # DSFP-HV57009 to
Microchip DS20005856A
• Removed “HVCMOS® Technology” in the
Features section
• Changed the package marking format
• Made minor changes throughout the document
2018 Microchip Technology Inc.
DS20005856A-page 17
HV57009
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
Device
-
Package
Options
X
-
Environmental
X
Media Type
Device:
HV57009
=
64-Channel Serial-to-Parallel Converter
with P-Channel Open Drain Controllable
Output Current
Package:
PG
=
80-lead PQFP
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Type:
(blank)
=
66/Tray for a PG Package
DS20005856A-page 18
Example:
a) HV57009PG-G:
64-Channel Serial-to-Parallel
Converter with P-Channel Open
Drain Controllable Output
Current, 80-lead PQFP, 66/Tray
2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2951-7
== ISO/TS 16949 ==
2018 Microchip Technology Inc.
DS20005856A-page 19
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Australia - Sydney
Tel: 61-2-9868-6733
India - Bangalore
Tel: 91-80-3090-4444
China - Beijing
Tel: 86-10-8569-7000
India - New Delhi
Tel: 91-11-4160-8631
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
China - Chengdu
Tel: 86-28-8665-5511
India - Pune
Tel: 91-20-4121-0141
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
China - Chongqing
Tel: 86-23-8980-9588
Japan - Osaka
Tel: 81-6-6152-7160
Finland - Espoo
Tel: 358-9-4520-820
China - Dongguan
Tel: 86-769-8702-9880
Japan - Tokyo
Tel: 81-3-6880- 3770
China - Guangzhou
Tel: 86-20-8755-8029
Korea - Daegu
Tel: 82-53-744-4301
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
China - Hangzhou
Tel: 86-571-8792-8115
Korea - Seoul
Tel: 82-2-554-7200
China - Hong Kong SAR
Tel: 852-2943-5100
Malaysia - Kuala Lumpur
Tel: 60-3-7651-7906
China - Nanjing
Tel: 86-25-8473-2460
Malaysia - Penang
Tel: 60-4-227-8870
China - Qingdao
Tel: 86-532-8502-7355
Philippines - Manila
Tel: 63-2-634-9065
China - Shanghai
Tel: 86-21-3326-8000
Singapore
Tel: 65-6334-8870
China - Shenyang
Tel: 86-24-2334-2829
Taiwan - Hsin Chu
Tel: 886-3-577-8366
China - Shenzhen
Tel: 86-755-8864-2200
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Israel - Ra’anana
Tel: 972-9-744-7705
China - Suzhou
Tel: 86-186-6233-1526
Taiwan - Taipei
Tel: 886-2-2508-8600
China - Wuhan
Tel: 86-27-5980-5300
Thailand - Bangkok
Tel: 66-2-694-1351
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Xian
Tel: 86-29-8833-7252
Vietnam - Ho Chi Minh
Tel: 84-28-5448-2100
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Raleigh, NC
Tel: 919-844-7510
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
DS20005856A-page 20
China - Xiamen
Tel: 86-592-2388138
China - Zhuhai
Tel: 86-756-3210040
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-67-3636
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Italy - Padova
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Norway - Trondheim
Tel: 47-7289-7561
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
2018 Microchip Technology Inc.
10/25/17
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