MCP6286T-E/OTVAO

MCP6286 Low Noise, Low Power Op Amp Features Description • • • • • • • • • The Microchip Technology Inc. MCP6286 operational amplifier (op amp) has low noise (5.4 nV/√Hz, typical), low power (520 µA, typical) and rail-to-rail output operation. It is unity gain stable and has a gain bandwidth product of 3.5 MHz (typical). This device operates with a single supply voltage as low as 2.2V, while drawing low quiescent current. These features make the product well suited for single-supply, low noise, battery-powered applications. Low Noise: 5.4 nV/√Hz (typical) Low Quiescent Current: 520 µA (typical) Rail-to-Rail Output Wide Supply Voltage Range: 2.2V to 5.5V Gain Bandwidth Product: 3.5 MHz (typical) Unity Gain Stable Extended Temperature Range: -40°C to +125°C No Phase Reversal Small Package Applications • • • • • • • Noise Cancellation Headphones Cellular Phones Analog Filters Sensor Conditioning Portable Instrumentation Medical Instrumentation Battery Powered Systems Package Types MCP6286 SOT-23-5 VOUT 1 VSS 2 VIN+ 3 Design Aids • • • • • • The MCP6286 op amp is offered in a space saving SOT-23-5 package. It is designed with Microchip’s advanced CMOS process and available in the extended temperature range, with a power supply range of 2.2V to 5.5V. 5 VDD 4 VIN– SPICE Macro Models FilterLab® Software Mindi™ Circuit Designer & Simulator MAPS (Microchip Advanced Part Selector) Analog Demonstration and Evaluation Boards Application Notes Typical Application C1 47 nF R2 R1 382 kΩ 641 kΩ + VIN C2 22 nF fP = 10 Hz MCP6286 VOUT – G = +1 V/V Second-Order, Low-Pass Butterworth Filter © 2009 Microchip Technology Inc. DS22196A-page 1 MCP6286 NOTES: DS22196A-page 2 © 2009 Microchip Technology Inc. MCP6286 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings † VDD – VSS ........................................................................7.0V Current at Input Pins .....................................................±2 mA Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD – VSS| Output Short-Circuit Current .................................continuous Current at Output and Supply Pins ............................±30 mA † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. †† See 4.1.2 “Input Voltage And Current Limits” Storage Temperature ....................................-65°C to +150°C Maximum Junction Temperature (TJ).......................... +150°C ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS= GND, TA= +25°C, VCM = VDD/3, VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1). Parameters Sym Min Typ Max Units Conditions Input Offset Input Offset Voltage Input Offset Drift with Temperature Power Supply Rejection Ratio VOS -1.5 — +1.5 ΔVOS/ΔTA — ±1 — PSRR 80 100 — IB — ±1 — pA — 50 150 pA TA = +85°C TA = +125°C mV µV/°C TA= -40°C to +125°C dB Input Bias Current and Impedance Input Bias Current — 1500 3000 pA Input Offset Current IOS — ±1 — pA Common Mode Input Impedance ZCM — 1013||20 — Ω||pF Differential Input Impedance ZDIFF — 1013||20 — Ω||pF Common Mode Input Voltage Range VCMR VSS−0.3 — VDD-1.2 V Note 1 Common Mode Rejection Ratio CMRR 76 95 — dB VCM = -0.3V to 1.0V, VDD = 2.2V 80 100 — dB VCM = -0.3V to 4.3V, VDD = 5.5V AOL 100 120 — dB 0.2V < VOUT 2 mA R1 > FIGURE 4-2: Inputs. Protecting the Analog It is also possible to connect the diodes to the left of the resistors R1 and R2. In this case, the currents through the diodes D1 and D2 need to be limited by some other mechanism. The resistors then serve as in-rush current limiters; the DC currents into the input pins (VIN+ and VIN-) should be very small. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS). (See Figure 2-33). VDD Bond Pad 4.1.3 VIN+ Bond Pad The input stage of the MCP6286 op amp uses a PMOS input stage. It operates at low common mode input voltage (VCM), including ground. With this topology, the device operates with a VCM up to VDD - 1.2V and 0.3V below VSS. (See Figure 2-12).The input offset voltage is measured at VCM = VSS – 0.3V and VDD - 1.2V to ensure proper operation. Input Stage Bond VIN– Pad VSS Bond Pad FIGURE 4-1: Structures. Simplified Analog Input ESD In order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the voltages and currents at the VIN+ and VIN- pins (see Absolute Maximum Ratings at the beginning of Section 1.0 “Electrical Characteristics”). Figure 4-2 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and the resistors R1 and R2 limit the possible current drawn out of the input pins. Diodes D1 and D2 prevent the input pins (VIN+ and VIN-) from going too far above VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. © 2009 Microchip Technology Inc. NORMAL OPERATION For a unity gain buffer, since VOUT is the same voltage as the inverting input, VOUT must be maintained below VDD –1.2V for correct operation. 4.2 Rail-to-Rail Output The output voltage range of the MCP6286 op amp is VSS + 15 mV (minimum) and VDD – 15 mV (maximum) when RL = 10 kΩ is connected to VDD/2 and VDD = 5.5V. Refer to Figure 2-24 and Figure 2-25 for more information. DS22196A-page 15 MCP6286 4.3 Capacitive Loads 4.4 Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop’s phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity-gain buffer (G = +1 V/V) is the most sensitive to capacitive loads, all gains show the same general behavior. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1 V/V), a small series resistor at the output (RISO in Figure 4-3) improves the feedback loop’s phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitance load. – RISO MCP6286 + VIN VOUT CL Supply Bypass MCP6286 op amp’s power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good high frequency performance. It can use a bulk capacitor (i.e., 1 µF or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. 4.5 PCB Surface Leakage In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5 pA of current to flow; which is greater than the MCP6286 op amp’s bias current at +25°C (±1 pA, typical). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-5. FIGURE 4-3: Output Resistor, RISO Stabilizes Large Capacitive Loads. Guard Ring VIN– VIN+ VSS Figure 4-4 gives recommended RISO values for different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN), where GN is the circuit's noise gain. For non-inverting gains, GN and the Signal Gain are equal. For inverting gains, GN is 1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V). FIGURE 4-5: for Inverting Gain. Recommended RISO (Ω) 1000 VDD = 5.5 V RL = 10 kΩ 1. 100 10 GN: 1 V/V 2 V/V ≥ 5 V/V 1 10p 100p 1n 10n 0.1µ 1µ 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 Normalized Load Capacitance; CL/GN (F) FIGURE 4-4: Recommended RISO Values for Capacitive Loads. After selecting RISO for your circuit, double check the resulting frequency response peaking and step response overshoot. Modify RISO’s value until the response is reasonable. Bench evaluation and simulations with the MCP6286 SPICE macro model are very helpful. DS22196A-page 16 2. Example Guard Ring Layout Non-inverting Gain and Unity-Gain Buffer: a. Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b. Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the common mode input voltage. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a. Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b. Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface. © 2009 Microchip Technology Inc. MCP6286 4.6 4.6.1 Application Circuits 4.6.2 ACTIVE LOW-PASS FILTER The MCP6286 op amp’s low input bias current makes it possible for the designer to use larger resistors and smaller capacitors for active low-pass filter applications. However, as the resistance increases, the noise generated also increases. Parasitic capacitances and the large value resistors could also modify the frequency response. These trade-offs need to be considered when selecting circuit elements. Figure 4-6 and Figure 4-7 show low-pass, second-order, Butterworth filters with a cut-off frequency of 10 Hz. The filter in Figure 4-6 has a non-inverting gain of +1 V/V, and the filter in Figure 4-7 has an inverting gain of -1 V/V. PHOTO DETECTION The MCP6286 op amps can be used to easily convert the signal from a sensor that produces an output current (such as a photo diode) into a voltage (a transimpedance amplifier). This is implemented with a single resistor (R2) in the feedback loop of the amplifiers shown in Figure 4-8 and Figure 4-9. The optional capacitor (C2) sometimes provides stability for these circuits. A photodiode configured in the Photovoltaic mode has zero voltage potential placed across it (Figure 4-8). In this mode, the light sensitivity and linearity is maximized, making it best suited for precision applications. The key amplifier specifications for this application are: low input bias current, low noise, common mode input voltage range (including ground), and rail-to-rail output. G = +1 V/V fP = 10 Hz C1 47 nF C2 R2 R2 R1 382 kΩ 641 kΩ VOUT ID1 + VIN MCP6286 C2 22 nF VOUT D1 Light – VDD MCP6286 – + VOUT = ID1*R2 FIGURE 4-6: Second-Order, Low-Pass Butterworth Filter with Sallen-Key Topology. G = -1 V/V fP = 10 Hz R2 618 kΩ C1 8.2 nF R3 R1 618 kΩ 1.00 MΩ VOUT VIN C2 47 nF FIGURE 4-8: Photovoltaic Mode Detector. In contrast, a photodiode that is configured in the Photoconductive mode has a reverse bias voltage across the photo-sensing element (Figure 4-9). This decreases the diode capacitance, which facilitates high-speed operation (e.g., high-speed digital communications). The design trade-off is increased diode leakage current and linearity errors. The op amp needs to have a wide Gain Bandwidth Product (GBWP). – C2 MCP6286 VDD/2 + FIGURE 4-7: Second-Order, Low-Pass Butterwork Filter with Multiple-Feedback Topology. R2 ID1 D1 Light VBIAS – VDD VOUT MCP6286 + VOUT = ID1*R2 VBIAS < 0V FIGURE 4-9: Detector. © 2009 Microchip Technology Inc. Photoconductive Mode DS22196A-page 17 MCP6286 NOTES: DS22196A-page 18 © 2009 Microchip Technology Inc. MCP6286 5.0 DESIGN AIDS Microchip provides the basic design tools needed for the MCP6286 op amp. 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6286 op amp is available on the Microchip web site at www.microchip.com. The model was written and tested in official Orcad (Cadence) owned PSPICE. For the other simulators, it may require translation. The model covers a wide aspect of the op amp's electrical specifications. Not only does the model cover voltage, current, and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. The model has not been verified outside of the specification range listed in the op amp data sheet. The model behaviors under these conditions can not be guaranteed that it will match the actual op amp performance. Moreover, the model is intended to be an initial design tool. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 FilterLab® Software Microchip’s FilterLab® software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. 5.3 Mindi™ Circuit Designer & Simulator Microchip’s Mindi™ Circuit Designer & Simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. It is a free online circuit designer & simulator available from the Microchip web site at www.microchip.com/mindi. This interactive circuit designer & simulator enables designers to quickly generate circuit diagrams, simulate circuits. Circuits developed using the Mindi Circuit Designer & Simulator can be downloaded to a personal computer or workstation. 5.4 Microchip Advanced Part Selector (MAPS) MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website at www.microchip.com/ maps, the MAPS is an overall selection tool for Microchip’s product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. Helpful links are also provided for Datasheets, Purchase, and Sampling of Microchip parts. 5.5 Analog Demonstration and Evaluation Boards Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user’s guides and technical information, visit the Microchip web site at www.microchip.com/ analogtools. Some boards that are especially useful are: • • • • • • MCP6XXX Amplifier Evaluation Board 1 MCP6XXX Amplifier Evaluation Board 2 MCP6XXX Amplifier Evaluation Board 3 MCP6XXX Amplifier Evaluation Board 4 Active Filter Demo Board Kit 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2 5.6 Application Notes The following Microchip Analog Design Note and Application Notes are available on the Microchip web site at www.microchip.com/appnotes and are recommended as supplemental reference resources. • ADN003: “Select the Right Operational Amplifier for your Filtering Circuits”, DS21821 • AN722: “Operational Amplifier Topologies and DC Specifications”, DS00722 • AN723: “Operational Amplifier AC Specifications and Applications”, DS00723 • AN884: “Driving Capacitive Loads With Op Amps”, DS00884 • AN990: “Analog Sensor Conditioning Circuits – An Overview”, DS00990 • AN1177: “Op Amp Precision Design: DC Errors”, DS01177 • AN1228: “Op Amp Precision Design: Random Noise”, DS01228 These application notes and others are listed in the design guide: • “Signal Chain Design Guide”, DS21825 © 2009 Microchip Technology Inc. DS22196A-page 19 MCP6286 NOTES: DS22196A-page 20 © 2009 Microchip Technology Inc. MCP6286 6.0 PACKAGING INFORMATION 6.1 Package Marking Information Example: 5-Lead SOT-23 5 4 5 WENN XXNN 1 2 3 Legend: XX...X Y YY WW NNN e3 * Note: 4 1 2 3 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2009 Microchip Technology Inc. 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