MCP795B22-I/ST

MCP795WXX/MCP795BXX SPI Real-Time Clock Calendar with Enhanced Features and Battery Switchover Part Number MCP795W20 User Memory: 32 kHz Boot-up SRAM (Bytes) EEPROM (Kbits) No 64 2 Unique ID Blank MCP795W10 No 64 1 Blank MCP795W21 No 64 2 EUI-48™ MCP795W11 No 64 1 EUI-48™ MCP795W22 No 64 2 EUI-64™ MCP795W12 No 64 1 EUI-64™ MCP795B20 Yes 64 2 Blank MCP795B10 Yes 64 1 Blank MCP795B21 Yes 64 2 EUI-48™ ™ MCP795B11 Yes 64 1 EUI-48 MCP795B22 Yes 64 2 EUI-64™ MCP795B12 Yes 64 1 EUI-64™ Note: Watchdog Timer and Event Detects in all devices. Timekeeping Features: • Real-Time Clock/Calendar: - Hours, Minutes, Seconds, Hundredth of Seconds, Day of Week, Month, Year, Leap Year • Crystal Oscillator requires External 32,768 kHz Tuning Fork Crystal and Load Capacitors. • Clock Out Function: - 1Hz, 4.096 kHz, 8.192 kHz, 32.768 kHz • 32 kHz Boot-up Clock at Power-up (MCP795BXX) • 2 Programmable Alarms – Supports IRQ or WDO • Programmable open drain output – Alarm or Interrupt • On-Chip Digital Trimming/Calibration: - +/- 255 PPM range in 1 PPM steps • Power-Fail Time-Stamp @ Battery Switchover: - Logs time when VCC fails and VCC is restored • 64-Byte Battery-Backed SRAM • 2 Kbit and 1 Kbit EEPROM Memory: - Software block write-protect (¼, ½, or entire array) - Write Page mode (up to 8 bytes) - Endurance: 1M erase/write cycles • 128-Bit Unique ID in Protected Area of EEPROM: - Available blank or preprogrammed - EUI-48™ or EUI-64™ MAC address - Unlock sequence for user programming Enhanced Features: • SPI Clock Speed up to 10 MHz • Programmable Watchdog Timer: - Dedicated watchdog output pin - Dual retrigger using SPI bus or EVHS digital input • Dual Configurable Event Detect Inputs: - High-Speed Digital Event Detect (EVHS) with pulse count for 1st, 4th,16th or 32nd event - Low-Speed Event Detect (EVLS) with programmable debounce delays of 31 msec and 500 msec - Edge triggered (rising or falling) - Operates from VCC or VBAT • Operating Temperature Ranges: - Industrial (I Temp): -40°C to +85°C. • Packages include 14-Lead SOIC and TSSOP SOIC/TSSOP Low-Power Features: • Wide Operating Voltage: - VCC: 1.8V to 5.5V - VBAT: 1.3V to 5.5V • Low Operating Current: - VCC Standby Current < 1uA @ 3V - VBAT Timekeeping Current: VTRIP, VCC < VBAT VCC > VTRIP, VCC > VBAT No Yes Yes VBAT VCC VCC For more information on VBAT conditions see the RTCC Best Practices Application Note, AN1365 (DS01365). 9.1.6 VBAT SWITCHOVER UNIQUE ID LOCATIONS When the unique ID locations are preprogrammed from the factory with either an EUI-48 or EUI-64, the EUI code is programmed into location 0x00-0x07. Locations 0x08-0x0F are blank (0x0F). If the VBAT feature is not used, the VBAT pin should be connected to GND. A low value series resistor and Schottky diode are recommended between the external battery and the VBAT pin to reduce inrush current and also to prevent any leakage current reaching the external VBAT source. Note: For EUI-64, the data is located in address 0x00-0x07. For EUI-48 locations, 0x020x07 contain the data. 0x00/01 contain 0xFF. To read the unique ID location the IDREAD command is given with the starting address. Valid addresses are 0x00 through 0x0F. All 16 bytes can be read out in a single command by clocking the device. Trying to access locations past 0x0F will result in the address wrapping within these 16 bytes. The VTRIP point is defined as 1.5V typical. When VDD falls below 1.5V the system will continue to operate the RTCC and SRAM using the VBAT supply. There is ~50mV hyst in the trip point changeover. The following conditions apply: FIGURE 9-2: VBAT CHANGOVER CONDITIONS IDREAD COMMAND SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Instruction SI 0 0 1 1 0 Address Byte 0 1 1 0 0 0 0 3 2 1 Don’t Care 0 Data Out High-Impedance 7 SO 6 5 4 3 2 1 0 Address range is 0x00-0x0F, address counter will wrap within this range. To write to the unique ID locations, the IDWRITE command is used. The device must be write enabled and the correct unlock sequence must have been performed. See Section 10.1.4, Write to the Unlock Register for more details.  2011 Microchip Technology Inc. The ID locations can be written to using the IDWRITE command. The valid address is between 0x00 and 0x0F. The entire 16 bytes must be written in two groups of 8 bytes. A maximum of 8 bytes can be written at once. Preliminary DS22280A-page 31 MCP795WXX/MCP795BXX FIGURE 9-3: IDWRITE COMMAND SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 24 SCK Instruction SI 0 0 1 1 0 Address Byte 0 1 0 0 0 0 3 0 2 Data Byte 1 1 0 7 6 5 4 3 2 1 0 CS 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 SCK Data Byte 2 SI 7 DS22280A-page 32 6 5 4 3 Data Byte 3 2 1 0 7 6 5 4 3 Data Byte n (8 max) 2 Preliminary 1 0 7 6 5 4 3 2 1 0  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX 9.1.7 POWER-FAIL TIME-STAMP The MCP795XXX family of RTCC devices feature a power-fail time-stamp feature. This feature will save the time at which VCC crosses the VTRIP voltage and is shown in Figure 9-4. To use this feature, a VBAT supply must be present and the oscillator must also be running. There are two separate sets of registers that are used to record this information: • The second set of registers, located at 0x1Ch through 0x1Fh, are loaded at the time when VCC is restored and the RTCC switches to VCC. The power-fail time-stamp registers are cleared when the VBAT bit is cleared in software. Note: • The first set located at 0x18h through 0x1Bh are loaded at the time when VCC falls below VTRIP and the RTCC operates on the VBAT. The VBAT (register 0x03h bit 4) bit is also set at this time. FIGURE 9-4: It is strongly recommended that the timesaver function only be used when the oscillator is running. This will ensure accurate functionality POWER-FAIL GRAPH VCC VTRIP(max) VTRIP(min) Power-Down Time-Stamp Power-Up Time-Stamp VCCRT VCCFT 9.1.8 READ STATUS REGISTER (SRREAD) The Read Status Register (SRREAD) instruction provides access to the STATUS register. The STATUS register may be read at any time, even during a write cycle. The STATUS register is formatted as follows: 7 — X 6 — X 5 — X 4 — X 3 R/W BP1 2 R/W BP0 1 R WEL 0 R WIP via the WREN or WRDI commands, regardless of the state of write protection on the STATUS register. This bit is read-only. The Block Protection (BP0 and BP1) bits indicate which blocks are currently write-protected. These bits are set by the user issuing the WRSR instruction. These bits are nonvolatile. See Figure 9-5 for the RDSR timing sequence. * Note: Once a Write Status Register is initiated and a Read Status Register is attempted the new values for the nonvolatile bits will be read regardless of whether the values have been actually programmed into the device. (i.e., The values are moved to the latches prior to the write operation). The Write-In-Process (WIP) bit indicates whether the MCP795XXX is busy with a nonvolatile memory write operation. When set to a ‘1’, a write is in progress, when set to a ‘0’, no write is in progress. This bit is read-only. The Write Enable Latch (WEL) bit indicates the status of the write enable latch. When set to a ‘1’, the latch allows writes to the nonvolatile memory, when set to a ‘0’, the latch prohibits writes to the nonvolatile memory. The state of this bit can always be updated  2011 Microchip Technology Inc. Preliminary DS22280A-page 33 MCP795WXX/MCP795BXX FIGURE 9-5: READ STATUS REGISTER TIMING SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK Instruction SI 0 0 0 0 0 High-Impedance SO 1 0 1 Data from STATUS Register 7 6 5 4 3 2 1 0 * Data should be able to continuously be read from the STATUS register without toggling CS, for updating of the WIP and WEL bits. DS22280A-page 34 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX 9.1.9 WRITE STATUS REGISTER (SRWRITE) The Write Status Register (SRWRITE) instruction allows the user to select one of four levels of protection for the array by writing to the appropriate bits in the status register. The array is divided up into four segments. The user has the ability to write protect none, one, two, or all four of the segments of the array. The partitioning is controlled as shown in Table 9-2. See Figure 9-6 for the SRWRITE timing sequence. TABLE 9-2: ARRAY PROTECTION Array Addresses Write-Protected (2 kbit shown) BP1 BP0 0 0 none 0 1 upper 1/4 (C0h-FFh) 1 0 upper 1/2 (80h-FFh) 1 1 all (00h-FFh) FIGURE 9-6: WRITE STATUS REGISTER TIMING SEQUENCE CS TWC 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 0 SCK Instruction SI 0 0 0 0 0 Data to STATUS Register 0 0 1 7 6 5 4 3 2 High-Impedance SO  2011 Microchip Technology Inc. Preliminary DS22280A-page 35 MCP795WXX/MCP795BXX 9.1.10 DATA PROTECTION • CS must be set high after the proper number of clock cycles to start an internal write cycle • Access to the array during an internal EEPROM write cycle is ignored and programming is continued • Block protect bits are ignored for UID writes The following protection has been implemented to prevent inadvertent writes to the array: • The write enable latch is reset on power-up • A Write Enable instruction must be issued to set the write enable latch • After a byte write, page write, unique ID write, or STATUS register write, the write enable latch is reset FIGURE 9-7: 9.1.11 CLEAR WATCHDOG INSTRUCTION The Clear Watchdog command resets the internal Watchdog Timer. CLRWDT CS 0 1 2 3 4 5 6 7 SCK 0 SI 1 0 0 0 1 0 0 High-Impedance SO 9.1.12 CLEAR RAM INSTRUCTION The Clear Ram instruction is a 2-byte command that will reset the internal SRAM to the known value. Using this command, all locations in the SRAM are set to 00h and the data value contained in the second byte of the command is ignored. FIGURE 9-8: CLRRAM CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK Instruction SI 0 1 0 1 0 Data 1 0 0 A7 6 5 4 3 2 1 A0 High-Impedance SO DS22280A-page 36 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX 9.2 Crystal Specification and Selection The MCP795XXX has been designed to operate with a standard 32.768 kHz tuning fork crystal. The on-board oscillator has been characterized to operate with a crystal of maximum ESR of 70K Ohms. Crystals with a comparable specification are also suitable for use with the MCP795XXX. The table below is given as design guidance and a starting point for crystal and capacitor selection. Manufacturer Crystal Capacitance Part Number CX1 Value CX2 Value Micro Crystal CM7V-T1A 7pF 10pF 12pF Citizen CM200S-32.768KDZB-UT 6pF 10pF 8 pF Please work with your crystal vendor. EQUATION 9-1: Gerber files are available on request. Please contact your Microchip Sales representative. CX2  CX1 C load = ----------------------------- + C stray CX2 + CX1 The following must also be taken into consideration: • Pin capacitance (to be included in Cx2 and Cx1) • Stray Board Capacitance The recommended board layout for the oscillator area is shown in Figure 9-9. This actual board shows the crystal and the load capacitors. In this example, C2 is CX1, C1 is CX2 and the crystal is designated as Y1. It is required that the final application should be tested with the chosen crystal and capacitor combinations across all operating and environmental conditions. Please also consult with the crystal specification to observe correct handling and reflow conditions and for information on ideal capacitor values. For more information please see the RTCC Best Practices AN1365 (DS01365). When calculating the effective load capacitance, Equation 9-1 can be used. FIGURE 9-9: BOARD LAYOUT  2011 Microchip Technology Inc. Preliminary DS22280A-page 37 MCP795WXX/MCP795BXX 10.0 ON-BOARD MEMORY 10.1.2 The part is selected by pulling CS low. The 8-bit READ instruction is transmitted to the MCP795W20 followed by the 8-bit address (A7 through A0). After the correct READ instruction and address are sent, the data stored in the memory at the selected address is shifted out on the SO pin. The data stored in the memory at the next address can be read sequentially by continuing to provide clock pulses. The internal Address Pointer is automatically incremented to the next higher address after each byte of data is shifted out. The MCP795XXX has both on-board EEPROM memory and battery-backed SRAM. The SRAM is arranged as 64 x 8 bytes and is retained when VCC supply is removed. The EEPROM is organized as 256/128 x 8 bytes. The EEPROM is nonvolatile and does not require VBAT supply for retention. 10.1 SRAM The SRAM array is a battery-backed-up array of 64 bytes. The SRAM is accessed using the Read and Write commands, starting at address 0x20h. As the RTCC registers are separate from the SRAM array, when reading the RTCC registers set the address will wrap back to the start of the RTCC registers. Also when an address within the SRAM array is loaded the internal Address Pointer will wrap back to the start of the SRAM array. The READ instruction can be used to read the registers and array indefinitely by continuing to clock the device. The read operation is terminated by raising the CS pin (Figure 10-1). Upon power-up the SRAM locations are in an undefined state but can be set to a known value using the CLRRAM instruction (Figure 9-8). 10.1.1 READ SEQUENCE SRAM/RTCC OPERATION The MCP795XXX contains a Real-Time Clock and Calendar. The RTCC registers and SRAM array are accessed using the same commands. The RTCC registers and SRAM array are powered internally from the switched supply that is either connected to VCC or VBAT supply. No external read/write operations are permitted when the device is running from the VBAT supply. 10.1.3 WRITE SEQUENCE As the RTCC registers and SRAM array do not require the WREN sequence like the nonvolatile memory, the user may proceed by setting the CS low, issuing the WRITE instruction, followed by the address, and then the data to be written. As no write cycle is required for the RTCC registers and SRAM array the entire contents can be written in a single command. Table 1-2 contains a list of the possible instruction bytes and format for device operation. For the last data byte to be written to the RTCC registers and SRAM array, the CS must be brought high after the last byte has been clocked in. If CS is brought high at any other time, the last byte will not be written. Refer to Figure 10-2 for more detailed illustrations on the write sequence. FIGURE 10-1: READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Address Byte Instruction SI 0 0 0 1 0 0 1 1 A7 6 5 4 3 2 1 A0 Don’t Care Data Out High-Impedance 7 SO 6 5 4 3 2 1 0 The address will rollover to the start of either the RTCC registers or SRAM array. DS22280A-page 38 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX FIGURE 10-2: WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Instruction SI 0 0 0 1 0 Data Byte Address Byte 0 1 0 A7 6 5 4 3 2 1 A0 7 6 5 4 3 2 1 0 High-Impedance SO 10.1.4 WRITE TO THE UNLOCK REGISTER The following is a list of strict conditions which have to be followed before the unique locations can be written to: The MCP795XXX contains a protected area of 64 bits that can be used to hold a unique ID, such as a serial number or MAC address code. To gain write access to these locations, a specific sequence is required. Any deviation from this sequence will reset the lock on these locations. Once these locations have been unlocked they have to be written to in the next command by issuing the correct command. A write to a different location will lock the ID locations and clear the WEL bit. • EEWREN instruction successfully executed • UNLOCK 0x55 instruction successfully executed • UNLOCK 0xAA instruction successfully executed To issue each Unlock instruction the UNLOCK command is sent followed by 0x55. Then in a separate command the UNLOCK command is issued followed by 0xAA. It is a requirement that each command be separate, that is CS must toggle between each command. Information on how to read and write the ID locations is detailed in Section 9.1.6, Unique ID Locations. FIGURE 10-3: UNLOCK SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK Instruction SI 0 0 0 1 0 Data 1 0 0 7 6 5 4 3 2 1 0 High-Impedance SO  2011 Microchip Technology Inc. Preliminary DS22280A-page 39 MCP795WXX/MCP795BXX 11.0 PACKAGING INFORMATION 11.1 Package Marking Information 14-Lead SOIC (.150”) Example XXXXXXXXXXX XXXXXXXXXXX YYWWNNN MCP795W20 -I/SL 1144017 14-Lead TSSOP Example XXXXXXXX YYWW NNN 795W20T 1144 017 Part Number SOIC TSSOP MCP795W20 MCP795W20 795W20T MCP795W10 MCP795W10 795W10T MCP795W21 MCP795W21 795W21T MCP795W11 MCP795W11 795W11T MCP795W22 MCP795W22 795W22T MCP795W12 MCP795W12 795W12T MCP795B20 MCP795B20 795B20T MCP795B10 MCP795B10 795B10T MCP795B21 MCP795B21 795B21T MCP795B11 MCP795B11 795B11T MCP795B22 MCP795B22 795B22T MCP795B12 MCP795B12 795B12T Note: Legend: XX...X Y YY WW NNN e3 * Note: DS22280A-page 40 1st Line Marking Codes T = Temperature grade NN = Alphanumeric traceability code Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2011 Microchip Technology Inc. Preliminary DS22280A-page 41 MCP795WXX/MCP795BXX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22280A-page 42 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX    ! "# $ %   &"'  # ())$$$  )"  2011 Microchip Technology Inc. Preliminary DS22280A-page 43 MCP795WXX/MCP795BXX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22280A-page 44 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2011 Microchip Technology Inc. Preliminary DS22280A-page 45 MCP795WXX/MCP795BXX Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22280A-page 46 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX APPENDIX A: REVISION HISTORY Revision A (11/2011) Initial Release.  2011 Microchip Technology Inc. Preliminary DS22280A-page 47 MCP795WXX/MCP795BXX NOTES: DS22280A-page 48 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX THE MICROCHIP WEB SITE CUSTOMER SUPPORT Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: Users of Microchip products can receive assistance through several channels: • Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s guides and hardware support documents, latest software releases and archived software • General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing • Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives • • • • • Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://microchip.com/support CUSTOMER CHANGE NOTIFICATION SERVICE Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.  2011 Microchip Technology Inc. Preliminary DS22280A-page 49 MCP795WXX/MCP795BXX READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. TO: Technical Publications Manager RE: Reader Response Total Pages Sent ________ From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ FAX: (______) _________ - _________ Application (optional): Would you like a reply? Y N Device: MCP795WXX/MCP795BXX Literature Number: DS22280A Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs? 3. Do you find the organization of this document easy to follow? If not, why? 4. What additions to the document do you think would enhance the structure and subject? 5. What deletions from the document could be made without affecting the overall usefulness? 6. Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS22280A-page 50 Preliminary  2011 Microchip Technology Inc. MCP795WXX/MCP795BXX PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Not every possible ordering combination is listed below. MCP795 1 W Base Part Additional Memory Features 0 T Unique ID T/R I /SN Temp Package Range MCP794 = I2C™ RTCC MCP795 = SPI RTCC Additional Features: Blank = None W = Watchdog Timer, 2 Event Detects B = 32 kHz Boot-up Clock, Watchdog Timer, 2 Event Detects Memory: 0 1 2 = 64 Bytes SRAM = 1 Kbit EE, 64 Bytes SRAM = 2 Kbits EE, 64 Bytes SRAM ID/MAC Address: 0 1 2 = Blank = EUI-48™ MAC Address = EUI-64™ MAC Address Blank = Tube T = Tape and Reel Temperature Range: I Package: SL = 14-Pin SOIC ST = 14-Pin TSSOP = a) b) c) Base Part No.: T/R: Examples: d) e) f) MCP795W20-I/SL: 2K EEPROM, Blank ID, Industrial Temperature, SOIC Package MCP795W10-I/ST: 1K EEPROM, Blank ID, Industrial Temperature, TSSOP Package MCP795W21-I/SL: 2K EEPROM, EUI-48™, Industrial Temperature, SOIC Package MCP795W22-I/ST: 2K EEPROM, EUI-64™, Industrial Temperature, TSSOP Package MCP795B20-I/SL: Boot Clock, 2K EEPROM, Blank ID, Industrial Temperature, SOIC Package MCP795B10-I/ST: Boot Clock, 1K EEPROM, Blank ID, Industrial Temperature, TSSOP Package Note 1: All devices include a Watchdog Timer and two Event Detects. -40C to +85C  2011 Microchip Technology Inc. Preliminary DS22280A-page 51 MCP795WXX/MCP795BXX NOTES: DS22280A-page 52 Preliminary  2011 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-780-5 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.  2011 Microchip Technology Inc. Preliminary DS22280A-page 53 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Hangzhou Tel: 86-571-2819-3187 Fax: 86-571-2819-3189 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-330-9305 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 DS22280A-page 54 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 08/02/11 Preliminary  2011 Microchip Technology Inc.