MIC22705
1 MHz, 7A Integrated Switch, High Efficiency Synchronous Buck Regulator
Features
General Description
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The MIC22705 is a highly efficient, 7A, integrated
switch, synchronous buck (step-down) regulator. The
MIC22705 is optimized for highest efficiency, achieving
more than 95% efficiency while still switching at 1 MHz
over a broad range. The ultra-high speed control loop
keeps the output voltage within regulation even under
extreme transient load swings commonly found in
FPGAs and low-voltage ASICs. The output voltage is
pre-bias safe and can be adjusted down to 0.7V to
address all low-voltage power needs.
Input Voltage Range: 2.9V to 5.5V
Output Voltage Adjustable Down to 0.7V
Output Load Current Up to 7A
Safe Start-Up into a Pre-Biased Output Load
Full Sequencing and Tracking Ability
Power Good Output
Efficiency >95% Across a Broad Load Range
Ultra-Fast Transient Response
Easy RC Compensation
100% Maximum Duty Cycle
Fully Integrated MOSFET Switches
Thermal Shutdown and Current-Limit Protection
24-Pin 4 mm x 4 mm QFN
–40°C to +125°C Junction Temperature Range
Applications
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High Power Density Point-of-Load Conversion
Servers, Routers, and Base Stations
Blu-Ray/DVD Players and Recorders
Computing Peripherals
FPGAs, DSP, and Low Voltage ASIC Power
The MIC22705 offers a full range of sequencing and
tracking options. The Enable/Delay (EN/DLY) pin,
combined with the Power Good (PG) pin, allows
multiple outputs to be sequenced in any way during
turn-on and turn-off. The Ramp Control (RC) pin allows
the device to be connected to another product in the
MIC22xxx and/or MIC68xxx family, to keep the output
voltages within a certain ∆V on start-up.
The MIC22705 is available in a 24-pin 4mm x 4mm
QFN with a junction operating range from –40°C to
+125°C.
Package Type
SW
SW
SW
SW
PGND
PGND
MIC22705
24-Lead 4 mm x 4 mm QFN (ML)
(Top View)
24 23
22
21 20
19
PVIN 1
18
PVIN
EN/DLY
2
17
SVIN
NC
3
16
SGND
15
COMP
EP
RC 4
2020 Microchip Technology Inc.
13
PVIN
8
9
10
11
12
PGND
7
SW
6
SW
FB
PVIN
SW
14
SW
5
PGND
PG
DS20006307A-page 1
MIC22705
Typical Application Circuit
MIC22705
VIN
2.9V to 5.5V
PVIN
SVIN
22μF
x4
47.5Nȍ
PGND
PG
PG
EN
EN/DLY
RC
1.0nF
1.0μH
SW
47μF
x2
EP
SGND
VOUT
1.8V/7A
R1
1.10Nȍ
FB
R2
69ȍ
COMP
470pF
39pF
20Nȍ
Functional Block Diagram
MIC22705
SVIN
CURRENT
LIMIT
1μA
40mV
PVIN
UVLO
VIN
2.9V to 5.5V
22μF
x4
HSD
EN/DLY
EN
CONTROL
LOGIC
CLOCK
1.0nF
THERMAL
SHUTDOWN
1.0μH
SW
VOUT
1.8V/7A
PVIN
47μF
x2
LSD
PGND
COMP
R1
1.10Nȍ
gm EA
COMP
FB
120Nȍ
R2
69ȍ
20k
240Nȍ 50pF
VREF
0.7V
120Nȍ
39pF
VDD
SVIN
1μA
1μA
DELAY
RC
OPEN
1μA
VIN
47.5Nȍ
PG
DS20006307A-page 2
1.0nF
1μA
90%
VREF
SGND
PG
2020 Microchip Technology Inc.
MIC22705
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
PVIN to PGND .............................................................................................................................................. –0.3V to +6V
SVIN to PGND ............................................................................................................................................. –0.3V to PVIN
VSW to PGND.............................................................................................................................................. –0.3V to PVIN
VEN/DLY to PGND ........................................................................................................................................ –0.3V to PVIN
VPG to PGND .............................................................................................................................................. –0.3V to PVIN
PGND to SGND ........................................................................................................................................ –0.3V to +0.3V
ESD Rating ............................................................................................................................................................ Note 1
Operating Ratings ††
Supply Voltage .......................................................................................................................................... +2.9V to +5.5V
Power Good Voltage (VPG) ..............................................................................................................................0V to PVIN
Enable Input (VEN/DLY) ..................................................................................................................................... 0V to PVIN
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
†† Notice: The device is not guaranteed to function outside its operating ratings.
Note 1: Devices are ESD sensitive. Handling precautions recommended.
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: SVIN = PVIN = VEN/DLY = 3.3V, VOUT = 1.8V, TA = +25°C, unless noted. Bold values
indicate –40°C≤ TJ ≤ +125°C. Note 1
Parameter
Sym.
Min.
Typ.
Max.
Units
Conditions
PVIN
2.9
—
5.5
V
—
UVLO Trip Level
—
2.55
2.75
2.9
V
PVIN rising
UVLO Hysteresis
—
—
420
—
mV
—
Quiescent Supply Current
—
—
0.85
1.3
mA
VFB = 0.9V (not switching)
ISHDN
—
5
10
μA
VEN/DLY = 0V
VFB
0.686
0.7
0.714
V
—
FB Bias Current
—
—
10
—
nA
VFB = 0.5V
Load Regulation
—
—
0.2
—
%
IOUT = 100 mA to 7A
Line Regulation
—
—
0.2
—
%
VIN = 2.9V to 5.5V; IOUT = 100 mA
EN/DLY Threshold Voltage
—
1.14
1.24
1.34
V
—
EN Hysteresis
—
—
10
—
mV
—
EN/DLY Bias Current
—
0.6
1.0
1.8
μA
VEN/DLY = 0.5V; VIN = 2.9V and
VIN = 5.5V
IRAMP
0.5
1
1.7
μA
VRC = 0.35V
Power Input Supply
Supply Voltage Range
Shutdown Current
Reference
Feedback Voltage
Enable Control
RC Ramp Control
RC Pin Source Current
Note 1:
Specification for packaged product only.
2020 Microchip Technology Inc.
DS20006307A-page 3
MIC22705
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: SVIN = PVIN = VEN/DLY = 3.3V, VOUT = 1.8V, TA = +25°C, unless noted. Bold values
indicate –40°C≤ TJ ≤ +125°C. Note 1
Parameter
Sym.
Min.
Typ.
Max.
Units
Conditions
Switching Frequency
fSW
0.8
1.0
1.2
MHz
Maximum Duty Cycle
—
100
—
—
%
VFB ≤ 0.5V
ILIM
7
11
21
A
VFB = 0.5V
Top MOSFET RDS(ON)
—
—
30
—
mΩ
VFB = 0.5V, ISW = 1A
Bottom MOSFET RDS(ON)
—
—
25
—
mΩ
VFB = 0.9V, ISW = –1A
SW Leakage Current
—
—
—
60
μA
PVIN = 5.5V, VSW = 5.5V,
VEN = 0V
VIN Leakage Current
—
—
—
25
μA
PVIN = 5.5V, VSW = 0V, VEN = 0V
PG Threshold
—
–7.5
–10
–12.5
%
Threshold % of VFB from VREF
Hysteresis
—
—
2.0
—
%
—
PG Output Low Voltage
—
—
144
—
mV
IPG = 5 mA (sinking),
VEN/DLY = 0V
PG Leakage Current
—
—
1.0
2.0
μA
VPG = 5.5V; VFB = 0.9V
Overtemperature Shutdown
—
—
160
—
°C
TJ rising
Overtemperature Shutdown
Hysteresis
—
—
20
—
°C
—
Oscillator
—
Short-Circuit Protection
Current Limit
Internal FETs
Power Good (PG)
Thermal Protection
Note 1:
Specification for packaged product only.
TEMPERATURE SPECIFICATIONS
Parameters
Sym.
Min.
Typ.
Max.
Units
TJ
–40
—
+125
°C
Conditions
Temperature Ranges
Junction Temperature Range
—
TJ(MAX)
—
—
+150
°C
—
Storage Temperature Range
TS
–65
—
+150
°C
—
Lead Temperature
—
—
+260
—
°C
Soldering, 10 sec.
θJC
—
14
—
°C/W
—
θJA
—
40
—
°C/W
—
Maximum Junction Temperature
Package Thermal Resistance
Thermal Resistance, QFN 24-Ld
Note 1:
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
DS20006307A-page 4
2020 Microchip Technology Inc.
MIC22705
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
FIGURE 2-1:
VIN Operating Supply
Current vs. Input Voltage.
FIGURE 2-4:
Voltage.
Load Regulation vs. Input
FIGURE 2-2:
Input Voltage.
VIN Shutdown Current vs.
FIGURE 2-5:
Voltage.
Current Limit vs. Input
FIGURE 2-3:
Voltage.
Feedback Voltage vs. Input
FIGURE 2-6:
Input Voltage.
Switching Frequency vs.
2020 Microchip Technology Inc.
DS20006307A-page 5
MIC22705
FIGURE 2-7:
Voltage.
Enable Threshold vs. Input
FIGURE 2-10:
VIN Operating Supply
Current vs. Temperature.
FIGURE 2-8:
Input Voltage.
Enable Input Current vs.
FIGURE 2-11:
Temperature.
VIN Shutdown Current vs.
FIGURE 2-12:
Temperature.
VIN UVLO Threshold vs.
FIGURE 2-9:
Power Good
Threshold/VREF Ratio vs. Input Voltage.
DS20006307A-page 6
2020 Microchip Technology Inc.
MIC22705
FIGURE 2-13:
Temperature.
Feedback Voltage vs.
FIGURE 2-16:
Temperature.
Switching Frequency vs.
FIGURE 2-14:
Temperature.
Load Regulation vs.
FIGURE 2-17:
Temperature.
Enable Threshold vs.
FIGURE 2-15:
Temperature.
Line Regulation vs.
FIGURE 2-18:
Temperature.
Current Limit vs.
2020 Microchip Technology Inc.
DS20006307A-page 7
MIC22705
FIGURE 2-19:
Current.
Efficiency vs. Output
FIGURE 2-22:
Output Current.
FIGURE 2-20:
Output Current.
Feedback Current vs.
FIGURE 2-23:
Output Voltage (VIN = 3.3V)
vs. Output Current.
FIGURE 2-21:
Current.
Line Regulation vs. Output
FIGURE 2-24:
Output Voltage (VIN = 5.0V)
vs. Output Current.
DS20006307A-page 8
Switching Frequency vs.
2020 Microchip Technology Inc.
MIC22705
FIGURE 2-25:
Output Current.
Efficiency (VIN = 3.3V) vs.
FIGURE 2-28:
Output Current.
Efficiency (VIN = 5.0V) vs.
FIGURE 2-26:
IC Power Dissipations vs.
Output Current (VIN = 3.3V).
FIGURE 2-29:
IC Power Dissipation vs.
Output Current (VIN = 5.0V).
FIGURE 2-27:
Case Temperature (VIN =
3.3V) vs. Output Current.
FIGURE 2-30:
Case Temperature (VIN =
5.0V) vs. Output Current.
For Figure 2-27 and Figure 2-30, the temperature measurement was taken at the hottest point on the MIC22705 case
and mounted on a five-square inch PCB (see Thermal Measurements section). Actual results will depend upon the size
of the PCB, ambient temperature, and proximity to other heat-emitting components.
2020 Microchip Technology Inc.
DS20006307A-page 9
MIC22705
VIN
(2V/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = 7A
CRC = 1000pF
VIN
VEN/DLY
(2V/div)
VEN/DLY
VOUT
VOUT
(1V/div)
VPG
VOUT
(1V/div)
VEN/DLY
(2V/div)
VPG
(2V/div)
VPG
(5V/div)
VIN = 3.3V
VOUT = 1.8V
IOUT = 7A
CRC = 1000pF
IIN
(5A/div)
Time (2ms/div)
FIGURE 2-31:
Time (1ms/div)
VIN Turn-On.
FIGURE 2-34:
Enable Turn-Off.
VIN = 5.5V
VOUT = 1.8V
VPRE-BIAS = 1.25V
IOUT = 7A
VIN
VIN = 5.5V
VOUT = 1.8V
IOUT = 7A
CRC = 1000pF
VIN
(2V/div)
VEN/DLY
(2V/div)
VOUT
VEN/DLY
VIN
(2V/div)
1.25V PRE-BIAS
VOUT
(1V/div)
VRC
(0.5V/div)
VOUT
(1V/div)
VPG
VPG
(5V/div)
VSW
(2V/div)
Time (2ms/div)
FIGURE 2-32:
VIN Turn-Off.
VEN/DLY
(2V/div)
VOUT
(1V/div)
VIN = 3.3V
VOUT = 1.8V
IOUT = 7A
CRC = 1000pF
Time (1ms/div)
FIGURE 2-35:
VIN Start-Up with
Pre-Biased Output.
VEN
(1V/div)
VIN = 5.5V
VOUT = 1.8V
VPRE-BIAS = 1.25V
IOUT = 7A
1.25V PRE-BIAS
VOUT
(1V/div)
VRC
(0.5V/div)
VPG
(2V/div)
IIN
(5A/div)
VSW
(2V/div)
Time (400μs/div)
FIGURE 2-33:
Time.
DS20006307A-page 10
Enable Turn-On Delay/Rise
Time (1ms/div)
FIGURE 2-36:
Enable Start-Up with
Pre-Biased Output.
2020 Microchip Technology Inc.
MIC22705
VIN = 5.5V
VOUT = 1.8V
IOUT = SHORT TO GND
VEN/DLY
(1V/div)
VOUT
(1V/div)
VEN/DLY
(1V/div)
VOUT
(1V/div)
VPG
(5V/div)
IOUT
(5A/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = 7A
IL
(5A/div)
Time (40ms/div)
FIGURE 2-37:
Enable Threshold.
Time (2ms/div)
FIGURE 2-40:
Enabled into Short Circuit.
VEN/DLY
(2V/div)
VOUT
(1V/div)
VOUT
(1V/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = MOSFET CURRENT SWEEP
VPG
(5V/div)
IOUT
(5A/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = 7A
IL
(5A/div)
Time (1ms/div)
FIGURE 2-38:
Enable Turn-On/Off.
Time (40μs/div)
FIGURE 2-41:
Threshold.
Output Current-Limit
VIN = 5.5V
VOUT = 1.8V
IOUT = SHORT WITH MOSFET
VIN
(2V/div)
VOUT
(0.5V/div)
VOUT
(1V/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = SHORT INTO GND
IL
(5A/div)
IL
(5A/div)
Time (2ms/div)
FIGURE 2-39:
Power-Up into Short Circuit.
2020 Microchip Technology Inc.
Time (40μs/div)
FIGURE 2-42:
Circuit.
Output Recovery from Short
DS20006307A-page 11
MIC22705
VOUT
(10mV/div)
VOUT
(1V/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = MOSFET CURRENT SWEEP
IL
(5A/div)
IL
(2A/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = 0A
VSW
(2V/div)
Time (40ms/div)
FIGURE 2-43:
Threshold.
Peak Current-Limit
Time (400ns/div)
FIGURE 2-46:
= 0A.
Switching Waveforms, IOUT
VOUT
(200mV/div)
VIN = 5.5V
VOUT = 1.8V
IOUT = 0A
VIN = 5.5V
VOUT = 1.8V
IOUT = 1A TO 7A
VOUT
(0.5V/div)
IOUT
(2A/div)
Time (100μs/div)
FIGURE 2-44:
Recovery.
Thermal Shutdown
Time (40μs/div)
FIGURE 2-47:
Load Transient Response.
VOUT
(10mV)
VOUT
(200mV/div)
IL
VIN = 5.5V
VOUT = 1.8V
IOUT = 7A
VIN = 3.0V TO 5.0V
VOUT = 1.8V
IOUT = 7A
IL
(2A/div)
VSW
(2V/div)
VIN
(1V/div)
Time (1ms/div)
Time (400ns/div)
FIGURE 2-45:
= 7A.
DS20006307A-page 12
Switching Waveforms, IOUT
FIGURE 2-48:
Line Transient Response.
2020 Microchip Technology Inc.
MIC22705
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1, 6, 13, 18
PVIN
Power Supply Voltage (Input): The PVIN pins are the input supply to the internal
P-Channel Power MOSFET. A 22 μF ceramic is recommended for bypassing at each
PVIN pin. The SVIN pin must be connected to a PVIN pin.
2
EN/DLY
Enable/Delay (Input): This pin is internally fed with a 1 μA current source from SVIN. A
delayed turn-on is implemented by adding a capacitor to this pin. The delay is proportional to the capacitor value. The internal circuits are held off until EN/DLY reaches the
enable threshold of 1.24V. This pin is pulled low when the input voltage is lower than
the UVLO threshold.
3
NC
No Connect: Leave this pin open. Do not connect to ground or route other signals
through this pin.
4
RC
Ramp Control: A capacitor from the RC pin-to-ground determines slew rate of output
voltage during start-up. The RC pin is internally fed with a 1 μA current source. The
output voltage tracks the RC pin voltage. The slew rate is proportional by the internal
1 μA source and RC pin capacitor. This feature can be used for tracking capability as
well as soft start.
5
PG
PG (Output): This is an open-drain output that indicates when the output voltage is
below 90% of its nominal voltage. The PG flag is asserted without delay when the
enable is set low or when the output goes below the 90% threshold.
14
FB
Feedback: Input to the error amplifier. The FB pin is regulated to 0.7V. A resistor
divider connecting the feedback to the output is used to adjust the desired output voltage.
15
COMP
Compensation Pin (Input): The MIC22705 uses an internal compensation network containing a fixed-frequency zero (phase lead response) and pole (phase lag response)
that allows the external compensation network to be much simplified for stability. The
addition of a single capacitor and resistor to the COMP pin will add the necessary pole
and zero for voltage mode loop stability using low-value, low-ESR ceramic capacitors.
16
SGND
Signal Ground: Internal signal ground for all low power circuits.
17
SVIN
Signal Power Supply Voltage (Input): This pin is connected externally to the PVIN pin.
A 2.2 μF ceramic capacitor from the SVIN pin to SGND must be placed next to the IC.
7, 12, 19, 24
PGND
Power Ground: Internal ground connection to the source of the internal N-Channel
MOSFETs.
8, 9, 10, 11,
20, 21, 22, 23
SW
EP
GND
Switch (Output): This is the connection to the drain of the internal P-Channel MOSFET
and drain of the N-Channel MOSFET. This is a high-frequency, high-power connection;
therefore traces should be kept as short and as wide as practical.
Exposed Pad (Power): Must make a full connection to a GND plane for full output
power to be realized.
2020 Microchip Technology Inc.
DS20006307A-page 13
MIC22705
4.0
APPLICATION INFORMATION
The MIC22705 is a 7A synchronous step-down
regulator IC with a fixed 1 MHz, voltage-mode PWM
control scheme. The other features include tracking
and sequencing control for controlling multiple output
power systems, and power-on-reset (POR).
The MIC22705 is a voltage mode, pulse-width
modulation (PWM) regulator. By controlling the ratio of
the on-to-off time, or duty cycle, a regulated DC output
voltage is achieved. As load or supply voltage changes,
so does the duty cycle to maintain a constant output
voltage. In cases where the input supply runs into a
dropout condition, the MIC22705 will run at 100% duty
cycle.
The MIC22705 provides constant switching at 1 MHz
with synchronous internal MOSFETs. The internal
MOSFETs include a high-side P-Channel MOSFET
from the input supply to the switch pin and an
N-Channel MOSFET from the switch pin-to-ground.
Since the low-side N-Channel MOSFET provides the
current during the off cycle, very-low amount of power
is dissipated during the off period.
The PWM control provides fixed-frequency operation.
By maintaining a constant switching frequency,
predictable fundamental and harmonic frequencies are
achieved. Other methods of regulation, such as burst
and skip modes, have frequency spectrums that
change with load that can interfere with sensitive
communication equipment.
4.1
Input Capacitor
A 22 μF X5R or X7R dielectrics ceramic capacitor is
recommended on each of the PVIN pins for bypassing.
A Y5V dielectrics capacitor should not be used. Aside
from losing most of their capacitance over temperature,
they also become resistive at high frequencies. This
reduces their ability to filter out high-frequency noise.
4.2
Output Capacitor
The MIC22705 was designed specifically for the use of
ceramic output capacitors. The 100 μF output
capacitor can be increased to improve transient
performance. Since the MIC22705 is in voltage mode,
the control loop relies on the inductor and output
capacitor for compensation. For this reason, do not use
excessively large output capacitors. The output
capacitor requires either an X7R or X5R dielectric. Y5V
and Z5U dielectric capacitors, aside from the
undesirable effect of their wide variation in capacitance
over temperature, become resistive at high
frequencies. Using Y5V or Z5U capacitors can cause
instability in the MIC22705.
DS20006307A-page 14
4.3
Inductor Selection
Inductor selection will be determined by the following
(not necessarily in the order of importance):
•
•
•
•
Inductance
Rated current value
Size requirements
DC resistance (DCR)
The MIC22705 is designed to use a 0.47 μH to 4.7 μH
inductor.
Maximum current ratings of the inductor are generally
given in two methods: permissible DC current and
saturation current. Permissible DC current can be rated
either for a 40°C temperature rise or a 10% loss in
inductance. Ensure the inductor selected can handle
the maximum operating current. When saturation
current is specified, make sure that there is enough
margin that the peak current will not saturate the
inductor. The ripple current can add as much as 1.2A to
the output current level. The RMS rating should be
chosen to be equal or greater than the current limit of
the MIC22705 to prevent overheating in a fault
condition. For best electrical performance, the inductor
should be placed very close to the SW nodes of the IC.
For this reason, the heat of the inductor is somewhat
coupled to the IC (in such cases, the case temperature
is not the real dissipation in the regulator), so it offers
some level of protection if the inductor gets too hot. It is
important to test all operating limits before settling on
the final inductor choice.
The size requirements refer to the area and height
requirements that are necessary to fit a particular
design. Please refer to the inductor dimensions on their
data sheet.
DC resistance is also important. While DCR is inversely
proportional to size, DCR can represent a significant
efficiency loss. Refer to the Efficiency Considerations
section for a more detailed description.
4.4
Efficiency Considerations
Efficiency is defined as the amount of useful output
power, divided by the amount of power consumed.
EQUATION 4-1:
V OUT I OUT
Efficiency % = --------------------------------- 100
V I
IN
IN
Maintaining high efficiency serves two purposes. It
decreases power dissipation in the power supply,
reducing the need for heat sinks and thermal design
considerations and it decreases consumption of
2020 Microchip Technology Inc.
MIC22705
current for battery powered applications. Reduced
current draw from a battery increases the devices
operating time, critical in hand-held devices.
There are mainly two loss terms in switching
converters: static losses and switching losses. Static
losses are simply the power losses due to VI or I2R. For
example, power is dissipated in the high side switch
during the on cycle. Power loss is equal to the high side
MOSFET RDS(ON) multiplied by the RMS Switch
Current squared (ISW2). During the off cycle, the low
side N-Channel MOSFET conducts, also dissipating
power. Similarly, the inductor’s DCR and capacitor’s
ESR also contribute to the I2R losses. Device operating
current also reduces efficiency by the product of the
quiescent (operating) current and the supply voltage.
The current required to drive the gates on and off at a
constant 1 MHz frequency and the switching
transitions make up the switching losses.
Figure 4-1 shows an efficiency curve. In the portion
from 0A to 0.4A, efficiency losses are dominated by
quiescent current losses, gate drive, and transition
losses. In this case, lower supply voltages yield greater
efficiency in that they require less current to drive the
MOSFETs and have reduced input power
consumption.
100
EQUATION 4-2:
2
L PD = I OUT DCR
From that, the loss in efficiency due to inductor
resistance can be calculated as in Equation 4-3.
EQUATION 4-3:
V OUT I OUT
EL = 1 – ------------------------------------------------------- 100
V
I
+L
OUT
OUT
PD
Where:
EL = Efficiency loss value in percent.
Efficiency loss due to DCR is minimal at light loads and
gains significance as the load is increased. Inductor
selection becomes a trade-off between efficiency and
size in this case.
Alternatively, under lighter loads, the ripple current due
to the inductance becomes a significant factor. When
light load efficiencies become more critical, a larger
inductor value maybe desired. Larger inductances
reduce the peak-to-peak inductor ripple current, which
minimizes losses.
95
EFFICIENCY (%)
The DCR losses can be calculated as follows:
90
85
80
VIN = 3.3V
75
4.5
IOUT = 1.8V
70
0
1
2
3
4
5
6
7
OUTPUT CURRENT (A)
FIGURE 4-1:
Efficiency Curve.
In the region from 1A to 7A, efficiency loss is dominated
by MOSFET RDS(ON) and inductor DC losses. Higher
input supply voltages will increase the Gate-to-Source
voltage on the internal MOSFETs, reducing the internal
RDS(ON). This improves efficiency by decreasing DC
losses in the device. All but the inductor losses are
inherent to the device. In which case, inductor selection
becomes increasingly critical in efficiency calculations.
As the inductors are reduced in size, the DC resistance
(DCR) can become quite significant.
2020 Microchip Technology Inc.
Compensation
The MIC22705 has a combination of internal and
external stability compensation to simplify the circuit for
small, high-efficiency designs. In such designs, voltage
mode conversion is often the optimum solution.
Voltage mode is achieved by creating an internal
1 MHz ramp signal and using the output of the error
amplifier to modulate the pulse width of the switch
node, thereby maintaining output voltage regulation.
With a typical gain bandwidth of 100 kHz to 200 kHz,
the MIC22705 is capable of extremely fast transient
responses.
The MIC22705 is designed to be stable with a typical
application using a 1 μH inductor and a 100 μF ceramic
(X5R) output capacitor. These values can be varied
dependent upon the trade-off between size, cost and
efficiency, keeping the LC natural frequency ideally
less than 26 kHz to stability can be achieved. The
minimum recommended inductor value is 0.47 μH and
minimum recommended output capacitor value is
22 μF. The trade-off between changing these values is
that with a larger inductor, there is a reduced
peak-to-peak current that yields a greater efficiency at
DS20006307A-page 15
MIC22705
lighter loads. A larger output capacitor will improve
transient response by providing a larger hold up
reservoir of energy to the output.
EQUATION 4-5:
1.24 C EN /DLY
t EN /DLY = -------------------------------------–6
1 10
The integration of one pole-zero pair within the control
loop greatly simplifies compensation. The optimum
values for CCOMP (in series with a 20 kΩ resistor) are
shown in Table 4-1.
TABLE 4-1:
COMPENSATION CAPACITOR
SELECTION
C
L
22 μF 47 μF
47 μF 100 μF
100 μF 470 μF
0.47 μH
0 pF - 10 pF
(Note 1)
22 pF
33 pF
1 μH
0 pF - 15 pF
(Note 2)
15 pF 22 pF
33 pF
2.2 μH
15 pF 33 pF
33 pF 47 pF
100 pF 220 pF
Note 1:
2:
VOUT > 1.2V
VOUT > 1V
4.6
Feedback
EQUATION 4-4:
R1
R2 = ----------------------------V
OUT
-------------- – 1
V
REF
Where:
VREF = 0.7V
VOUT = The desired output voltage.
A 10 kΩ or lower resistor value from the output to the
feedback (R1) is recommended since large feedback
resistor values increase the impedance at the feedback
pin, making the feedback node more susceptible to
noise pick-up. A small capacitor (50 pF to 100 pF)
across the lower resistor can reduce noise pick-up by
providing a low impedance path to ground.
Enable/Delay (EN/DLY) Pin
Enable/Delay (EN/DLY) sources 1 μA out of the IC to
allow a startup delay to be implemented. The delay
time is simply the time it takes 1 μA to charge CEN/DLY
to 1.24V. Therefore:
DS20006307A-page 16
RC Pin (Soft-Start)
The RC pin provides a trimmed 1 μA current
source/sink similar to the DELAY pin for accurate
ramp-up (soft-start) and ramp-down control. This
allows the MIC22705 to be used in systems that require
voltage tracking or ratio-metric voltage tracking at
startup.
There are two ways of using the RC pin:
• Externally driven from a voltage source
• Externally attached capacitor sets output ramp
up/down rate
In the first case, driving RC with a voltage from 0V to
VREF programs the output voltage between 0% and
100% of the nominal set voltage.
The MIC22705 provides a feedback pin to adjust the
output voltage to the desired level. This pin connects
internally to an error amplifier. The error amplifier then
compares the voltage at the feedback to the internal
0.7V reference voltage and adjusts the output voltage
to maintain regulation. The resistor divider network for
a desired VOUT is given by:
4.7
4.8
In the second case, the external capacitor sets the
ramp up and ramp down time of the output voltage. The
time is given by:
EQUATION 4-6:
0.7 C RC
t RAMP = -----------------------–6
1.10
Where:
tRAMP = The time from 0% to 100% nominal output
voltage.
4.8.1
PRE-BIAS START-UP
The MIC22705 is designed to start up into a pre-biased
output. This prevents large negative inductor currents
and excessive output voltage oscillations. The
MIC22705 starts with the low-side MOSFET turned off,
preventing reverse inductor current flow. The
synchronous MOSFET stays off until the end of the
start-up sequence.
If the load current demand is zero or very small at the
time the synchronous MOSFET is enabled, the
inductor current could be discontinuous. In this case,
when the synchronous MOSFET is enabled, the
regulator will transition abruptly from DCM to CCM.
This may cause some small reverse current. If load is
applied to keep the inductor current in CCM, then the
transition will be seamless. A pre-bias condition can
occur if the input is turned off then immediately turned
back on before the output capacitor is discharged to
ground. It is also possible that the output of the
MIC22705 could be pulled up or pre-biased through
2020 Microchip Technology Inc.
MIC22705
parasitic conduction paths from one supply rail to
another in multiple voltage (VOUT) level ICs such as a
FPGA.
Figure 4-2 shows a normal start-up waveform. A 1 μA
current source charges the soft-start capacitor CRC.
The CRC capacitor forces the VRC voltage to come up
slowly (VRC trace), thereby providing a soft-start ramp.
This ramp is used to control the internal reference
(VREF). The error amplifier forces the output voltage to
follow the VREF ramp from zero to the final value.
VEN/DLY
(2V/div)
VOUT
(1V/div)
VRC
(0.5V/div)
COUT = 47μF × 2, VIN = 5.0V
VOUT = 1.8V, IOUT = 7A
VPRE-BIAS = 0V, RLOAD
CRC = 1000pF
VSW
(2V/div)
Time (400μs/div)
VEN/DLY
(2V/div)
FIGURE 4-4:
VIN = 5.0V
VOUT = 1.8V
IOUT = 50mA
VPRE-BIAS = 0V
CRC = 1000pF
VOUT
(0.5V/div)
VRC
(0.2V/div)
EN Turn-Off: 7A Load.
If the output voltage falls slower than the VRC voltage,
then the both MOSFETs will be off and the output will
decay to zero as shown in the VOUT trace in Figure 4-5.
With both MOSFETs off, any resistive load connected
to the output will help pull down the output voltage. This
will occur at a rate determined by the resistance of the
load and the output capacitance.
Time (200μs/div)
FIGURE 4-2:
Start Up.
EN Turn-On Time: Normal
If the output is pre-biased to a voltage above the
expected value, as shown in Figure 4-3, then neither
MOSFET will turn on until the ramp control voltage
(VRC) is above the reference voltage (VREF). Then, the
high-side MOSFET starts switching, forcing the output
to follow the VRC ramp. Once the soft-start has
completed, the low-side MOSFET will begin switching.
VEN/DLY
(2V/div)
VOUT
(1V/div)
VRC
(0.5V/div)
COUT = 47μF × 2, VIN = 5.0V
VOUT = 1.8V, IOUT = 200mA
VPRE-BIAS = 0V, RLOAD
CRC = 1000pF
VSW
(2V/div)
Time (400μs/div)
FIGURE 4-5:
VEN/DLY
(2V/div)
4.9
VIN = 5.0V
VOUT = 1.8V
IOUT = 50mA
VPRE-BIAS = 1V
CRC = 1000pF
VOUT
(0.5V/div)
VRC
(0.2V/div)
Time (200μs/div)
FIGURE 4-3:
EN Turn-On at 1V Pre-Bias.
When the MIC22705 is turned off, the low-side
MOSFET will be disabled and the output voltage will
decay to zero. During this time, the ramp control
voltage (VRC) will still control the output voltage
fall-time with the high-side MOSFET if the output
voltage falls faster than the VRC voltage. Figure 4-4
shows this operating condition. Here a 7A load pulls the
output down fast enough to force the high-side
MOSFET on (VSW trace).
2020 Microchip Technology Inc.
EN Turn-Off: 200 mA Load.
Current Limit
The MIC22705 is protected against overload in two
stages. The first is to limit the current in the P-channel
switch; the second is overtemperature shutdown.
Current is limited by measuring the current through the
high-side MOSFET during its power stroke and
immediately switching off the driver when the preset
limit is exceeded.
The circuit in Figure 4-6 describes the operation of the
current limit circuit. Because the actual RDS(ON) of the
P-channel MOSFET varies part-to-part, over
temperature and with input voltage, simple IR voltage
detection is not employed. Instead, a smaller copy of
the Power MOSFET (Reference FET) is fed with a
constant current that is directly proportional to the
factory set current limit. This sets the current limit as a
current ratio and thus, is not dependent upon the
RDS(ON) value. Current limit is set to nominal value.
DS20006307A-page 17
MIC22705
Variations in the scale factor K between the power
PFET and the reference PFET used to generate the
limit threshold account for a relatively small inaccuracy.
PVIN
Example:
The evaluation board has two copper planes
contributing to an RθJA of approximately 25°C/W. The
worst case RθJC of the QFN 4 mm x 4 mm is 14°C/W.
EQUATION 4-8:
HSD
R JA = 14 + 25 = 39C/W
CONTROL
LOGIC
CLOCK
SW
PVIN
LSD
I LIMIT/K
FIGURE 4-6:
4.10
PGND
Current Limit Detail.
To calculate the junction temperature for a 50°C
ambient:
EQUATION 4-9:
Thermal Considerations
T J = T A + P DISS R JA
The MIC22705 is packaged in a 4 mm x 4 mm QFN. It’s
a package that has excellent thermal-performance,
equaling that of the larger TSSOP packages. This
maximizes heat transfer from the junction to the
exposed pad (ePAD) that connects to the ground
plane. The size of the ground plane attached to the
exposed pad determines the overall thermal resistance
from the junction to the ambient air surrounding the
printed circuit board. The junction temperature for a
given ambient temperature can be calculated using:
EQUATION 4-7:
T J = T A + P DISS R JA
Where:
PDISS = The power dissipated within the QFN
package and is at 7A load.
RθJA = A combination of junction-to-case thermal
resistance (RθJC) and Case-to-Ambient thermal
resistance (RθCA), since thermal resistance of the
solder connection from the ePAD to the PCB is
negligible; RθCA is the thermal resistance of the
ground plane-to-ambient, so RθJA = RθJC + RθCA.
TA = The operating ambient temperature.
T J = 50 + 1.8 39
T J = 120C
4.11
Thermal Measurements
Measuring the IC’s case temperature is recommended
to ensure it is within its operating limits. Although this
might seem like a very elementary task, it is easy to get
erroneous results. The most common mistake is to use
the standard thermal couple that comes with a thermal
meter. This thermal couple wire gauge is large, typically
22 gauge, and behaves like a heatsink, resulting in a
lower case measurement.
Two methods of temperature measurement are using a
smaller thermal couple wire or an infrared
thermometer. If a thermal couple wire is used, it must
be constructed of 36 gauge wire or higher then (smaller
wire size) to minimize the wire heat-sinking effect. In
addition, the thermal couple tip must be covered in
either thermal grease or thermal glue to make sure that
the thermal couple junction is making good contact with
the case of the IC. Omega brand thermal couple
(5SC-TT-K-36-36) is adequate for most applications.
Whenever possible, an infrared thermometer is
recommended. The measurement spot size of most
infrared thermometers is too large for an accurate
reading on a small form factor ICs. However, a IR
thermometer from Optris has a 1 mm spot size, which
makes it a good choice for measuring the hottest point
on the case. An optional stand makes it easy to hold the
beam on the IC for long periods of time.
DS20006307A-page 18
2020 Microchip Technology Inc.
MIC22705
4.12
Sequencing and Tracking Examples
There are four distinct variations that are easily implemented using the MIC22705. The two sequencing variations are
Delayed and Windowed. The two tracking variants are Normal and Ratio Metric. The following diagrams illustrate
methods for connecting two MIC22705’s to achieve these requirements.
MIC22705
VIN
5.0V
PVIN
SVIN
22μF
x4
PGND
1.0μH
VOUT1
1.8V/7A
SW
47μF
x2
EP
SGND
PG1
PG
EN1
EN/DLY
DELAY
RC
COMP
R1
1.10k
FB
R2
698
10nF
39pF
20k
MIC22705
47.5k
PVIN
SVIN
22μF
x4
PGND
1.0μH
47μF
x2
EP
SGND
PG2
PG
EN2
EN/DLY
DELAY
RC
COMP
1.0nF
VOUT2
1.8V/7A
SW
R3
505
FB
R4
698
3.3nF
39pF
20k
Time (4.0ms/div)
FIGURE 4-7:
Delayed Sequencing.
MIC22705
VIN
5.0V
47.5k
22μF
x4
PVIN
SVIN
PGND
1.0μH
SW
47μF
x2
EP
SGND
PG1
PG
EN1
EN/DLY
DELAY
RC
COMP
VOUT1
1.8V/7A
R1
1.10k
FB
3.3nF
R2
698
39pF
20k
MIC22705
22μF
x4
PVIN
SVIN
PGND
1.0μH
SW
EP
SGND
PG2
PG
EN2
EN/DLY
DELAY
RC
COMP
3.3nF
47μF
x2
VOUT2
1.2V/7A
R3
505
FB
R4
698
39pF
20k
Time (4.0ms/div)
FIGURE 4-8:
Windowed Sequencing.
2020 Microchip Technology Inc.
DS20006307A-page 19
MIC22705
MIC22705
VIN
5.0V
47.5k
22μF
x4
PVIN
SVIN
PGND
1.0μH
VOUT1
1.8V/7A
SW
47μF
x2
EP
SGND
PG1
PG
EN1
EN/DLY
DELAY
RC
COMP
R1
1.10k
FB
3.3nF
R2
698
39pF
20k
MIC22705
22μF
x4
PVIN
SVIN
PGND
1.0μH
VOUT2
1.2V/7A
SW
47μF
x2
EP
SGND
PG2
PG
EN2
EN/DLY
DELAY
RC
COMP
R3
505
FB
R4
698
39pF
20k
R5
1.10k
R6
698
Time (4.0ms/div)
FIGURE 4-9:
Normal Tracking.
MIC22705
VIN
5.0V
47.5k
22μF
x4
PVIN
SVIN
PGND
1.0μH
SW
47μF
x2
EP
SGND
PG1
PG
EN1
EN/DLY
DELAY
RC
COMP
VOUT1
1.8V/7A
R1
1.10k
FB
3.3nF
R2
698
39pF
20k
MIC22705
22μF
x4
PVIN
SVIN
PGND
1.0μH
SW
47μF
x2
EP
SGND
PG2
PG
EN2
EN/DLY
DELAY
RC
COMP
VOUT2
1.8V/7A
R3
505
FB
R4
698
39pF
20k
Time (4.0ms/div)
FIGURE 4-10:
DS20006307A-page 20
Ratio-Metric Tracking.
2020 Microchip Technology Inc.
MIC22705
5.0
PCB LAYOUT GUIDELINES
PCB layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to ensure
proper operation of the MIC22705 converter.
5.1
IC
• The 2.2 μF ceramic capacitor, which is connected
to the SVIN pin, must be located right at the IC.
The SVIN pin is very noise sensitive and
placement of the capacitor is very critical. Use
wide traces to connect to the SVIN and SGND
pins.
• The signal ground pin (SGND) must be connected
directly to the ground planes. Do not route the
SGND pin to the PGND Pad on the top layer.
• Place the IC close to the point of load (POL).
• Use fat traces to route the input and output power
lines.
• Signal and power grounds should be kept
separate and connected at only one location.
5.2
Input Capacitor
• A 22 μF X5R or X7R dielectrics ceramic capacitor
is recommended on each of the PVIN pins for
bypassing.
• Place the input capacitors on the same side of the
board and as close to the IC as possible.
• Keep both the PVIN pin and PGND connections
short.
• Place several vias to the ground plane close to
the input capacitor ground terminal.
• Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
• Do not replace the ceramic input capacitor with
any other type of capacitor. Any type of capacitor
can be placed in parallel with the input capacitor.
• If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended
for switching regulator applications and the
operating voltage must be derated by 50%.
• In “Hot-Plug” applications, a Tantalum or
Electrolytic bypass capacitor must be used to limit
the overvoltage spike seen on the input supply
with power is suddenly applied.
2020 Microchip Technology Inc.
5.3
Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close
to the inductor.
• Keep the switch node (SW) away from the
feedback (FB) pin.
• To minimize noise, place a ground plane
underneath the inductor.
• The inductor can be placed on the opposite side
of the PCB with respect to the IC. It does not
matter whether the IC or inductor is on the top or
bottom as long as there is enough air flow to keep
the power components within their temperature
limits. The input and output capacitors must be
placed on the same side of the board as the IC.
5.4
Output Capacitor
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
• Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
• The feedback divider network must be place close
to the IC with the bottom of R2 connected to
SGND.
• The feedback trace should be separate from the
power trace and connected as close as possible
to the output capacitor. Sensing a long
high-current load trace can degrade the DC load
regulation.
5.5
RC Snubber
• Place the RC snubber on either side of the board
and as close to the SW pin as possible.
DS20006307A-page 21
MIC22705
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
24-Lead QFN*
XXXXX
XXX
WNNNC
Legend: XX...X
Y
YY
WW
NNN
e3
*
Example
22705
YML
9300C
Product code or customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
DS20006307A-page 22
2020 Microchip Technology Inc.
MIC22705
24-Lead QFN 4 mm x 4 mm Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2020 Microchip Technology Inc.
DS20006307A-page 23
MIC22705
NOTES:
DS20006307A-page 24
2020 Microchip Technology Inc.
MIC22705
APPENDIX A:
REVISION HISTORY
Revision A (February 2020)
• Converted Micrel document MIC22705 to Microchip data sheet template DS20006307A.
• Minor grammatical text changes throughout.
• Evaluation Board Schematic, BOM, and PCB Layout sections from original data sheet moved to the
part’s Evaluation Board User’s Guide.
2020 Microchip Technology Inc.
DS20006307A-page 25
MIC22705
NOTES:
DS20006307A-page 26
2020 Microchip Technology Inc.
MIC22705
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
Device
X
XX
-XX
Part No.
Junction
Temp. Range
Package
Media Type
Device:
MIC22705:
1 MHz, 7A Integrated Switch High
Efficiency Synchronous Buck Regulator
Junction
Temperature
Range:
Y
=
–40°C to +125°C, RoHS-Compliant
Package:
ML
=
24-Lead 4 mm x 4 mm QFN
Media Type:
TR
=
5,000/Reel
2020 Microchip Technology Inc.
a) MIC22705YML-TR:
Note 1:
MIC22705, Adj. Output Voltage,
–40°C to +125°C Temperature
Range, 24-Lead QFN,
5,000/Reel
Tape and Reel identifier only appears in the
catalog part number description. This identifier is
used for ordering purposes and is not printed on
the device package. Check with your Microchip
Sales Office for package availability with the
Tape and Reel option.
DS20006307A-page 27
MIC22705
NOTES:
DS20006307A-page 28
2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA
are registered trademarks of Microchip Technology Incorporated in
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APT, ClockWorks, The Embedded Control Solutions Company,
EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision
Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,
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TimePictra, TimeProvider, Vite, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
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USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
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SQTP is a service mark of Microchip Technology Incorporated in
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The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
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All other trademarks mentioned herein are property of their
respective companies.
© 2020, Microchip Technology Incorporated, All Rights Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2020 Microchip Technology Inc.
ISBN: 978-1-5224-5626-1
DS20006307A-page 29
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DS20006307A-page 30
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05/14/19
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