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QT102-ISG

QT102-ISG

  • 厂商:

    ACTEL(微芯科技)

  • 封装:

    SOT23-6

  • 描述:

    IC SNSR TOUCH/PROX 1CHAN SOT23-6

  • 数据手册
  • 价格&库存
QT102-ISG 数据手册
QT102 LQ QTOUCH™ TOGGLE-MODE CHARGE-TRANSFER IC WITH POWER MANAGEMENT FUNCTIONS This datasheet is applicable to all revision 2.3 chips A unique 'Green' feature of the QT102 is the timeout function, which can turn off power after a specified time delay ranging from minutes to hours. Furthermore, external 'sustain' and 'cancel' functions permit designs where the timeout needs to be extended further or terminated early. A user's interaction with a product might trigger a 'sustain' input, prolonging the time to shutoff. A safety sensor, such as a tip-over switch on a space heater, can feed the 'cancel' function to terminate early. OUT 1 VSS 2 SNSK 3 QT102 The QT102 is a single key QTouch™ chip combining a touch-on / touch-off toggle mode with timeout and timing override functions, oriented especially towards power control of small appliances and battery-operated products. With its tiny low-cost SOT-23 package, this device can suit almost any product needing a power switch or other toggle-mode controlled function. 6 TIME 5 VDD 4 SNS Like all QTouch™ devices, the QT102 features automatic self-calibration, drift compensation, and spread-spectrum burst modulation in order to provide for the most reliable touch sensing possible. This device brings inexpensive, easy-to-implement capacitive touch sensing to all kinds of appliances and equipment, from toys to coffee makers. The small, low cost SOT-23 package lets this unique combination of features reside in almost any product. AT A GLANCE Number of keys: One toggle mode (touch-on / touch-off), plus programmable auto-off delay and external cancel Technology: Patented spread-spectrum charge-transfer (direct mode) Key outline sizes: 6mm x 6mm or larger (panel thickness dependent); widely different sizes and shapes possible Electrode design: Solid or ring electrode shapes PCB Layers required: One Electrode materials: Etched copper, silver, carbon, Indium Tin Oxide (ITO) Electrode substrates: PCB, FPCB, plastic films, glass Panel materials: Plastic, glass, composites, painted surfaces (low particle density metallic paints possible) Panel thickness: Up to 50mm glass, 20mm plastic (electrode size dependent) Key sensitivity: Settable via external capacitor Interface: Digital output, active high or active low (hardware configurable) Moisture tolerance: Good Power: 2V ~ 5.5V; 23µA at 2V Package: SOT23-6 (3x3mm) RoHS compliant Signal processing: Self-calibration, auto drift compensation, noise filtering Applications: Power switch replacement in countertop appliances, irons, battery powered toys, heaters, lighting controls, automotive interior lighting, commercial and industrial equipment such as soldering stations and cooking equipment Patents: QTouch™ (patented Charge-transfer method) AVAILABLE OPTIONS TA SOT23-6 -40ºC to +85ºC LQ QT102-ISG CCopyright © 2007 QRG Ltd QT102_2R3.05_1007 Contents 3.3 Output Polarity Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.4 Output Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3.5 Auto Off Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Electrode Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3.2 Increasing Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3.3 Decreasing Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 Recalibration Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.5 Forced Sensor Recalibration . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.6 Drift Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.7 Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.8 Spread Spectrum . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Wiring and Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Application Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Cs Sample Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 Rs Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4 Power Supply, PCB Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.5 Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1 Acquisition Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1.2 OUT Pin ‘On’ (Fast Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1.3 OUT Pin ‘Off’ (Low Power Mode) . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2 Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2.1 Detect Integrator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.2.2 Detect Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 lQ 3.5.1 Introduction ..................................... 8 ............................ 8 3.5.3 Auto Off - User-programmed Delay . . . . . . . . . . . . . . . . . . . . . . . 8 3.5.4 Auto Off - Overriding the Auto Off Delay . . . . . . . . . . . . . . . . . . . . 8 3.5.5 Configuring the User-programmed Auto-off Delay . . . . . . . . . . . . . . . 9 3.6 Examples of Typical Applications . . . . . . . . . . . . . . . . . . . . . . . 12 4 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.1 Absolute Maximum Specifications . . . . . . . . . . . . . . . . . . . . . . . 13 4.2 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . 13 4.3 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.5 DC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.6 Mechanical Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.7 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.8 Moisture Sensitivity Level (MSL) . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Datasheet Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.1 Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.2 Numbering Convention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.5.2 Auto Off - Predefined Delay 2 QT102_2R3.05_1007 1 Overview A series resistor, Rs, should be placed in line with SNSK to the electrode to suppress electrostatic discharge (ESD) and Electromagnetic Compatibility (EMC) effects. 1.1 Introduction The QT102 is a single key device featuring a touch on / touch off (toggle) output with a programmable auto switch-off capability. 1.3 Sensitivity The QT102 is a digital burst mode charge-transfer (QT) sensor designed specifically for touch controls; it includes all hardware and signal processing functions necessary to provide stable sensing under a wide variety of changing conditions. Only low cost, noncritical components are required for operation. The sensitivity of the QT102 is a function of such things as: 1.3.1 Introduction The QT102 employs bursts of charge-transfer cycles to acquire its signal. Burst mode permits power consumption in the microamp range, dramatically reduces RF emissions, lowers susceptibility to EMI, and yet permits excellent response time. Internally the signals are digitally processed to reject impulse noise, using a 'consensus' filter which requires four consecutive confirmations of a detection before the output is activated. Figure 1.1 shows the sense electrode connections (SNS, SNSK) for the QT102. VDD 5 VDD 3 SNSK 4 SNS OUT • electrode shape and orientation • the composition and aspect of the object to be sensed • the thickness and composition of any overlaying panel material • the degree of ground coupling of both sensor and object Ground planes around and under the electrode and its SNSK trace will cause high Cx loading and destroy gain. The possible signal-to-noise ratio benefits of ground area are more than negated by the decreased gain from the circuit, and so ground areas around electrodes are discouraged. Metal areas near the electrode will reduce the field strength and increase Cx loading and should be avoided, if possible. Keep ground away from the electrodes and traces. 1 TIME 6 Cx electrode size and capacitance The value of Cs also has a dramatic effect on sensitivity, and this can be increased in value with the trade-off of slower response time and more power. Increasing the electrode's surface area will not substantially increase touch sensitivity if its diameter is already much larger in surface area than the object being detected. Panel material can also be changed to one having a higher dielectric constant, which will better help to propagate the field. Figure 1.1 Sense Connections Cs • In some cases it may be desirable to increase sensitivity; for example, when using the sensor with very thick panels having a low dielectric constant. Sensitivity can often be increased by using a larger electrode or reducing panel thickness. Increasing electrode size can have diminishing returns, as high values of Cx will reduce sensor gain. 1.2 Electrode Drive Rs the value of Cs 1.3.2 Increasing Sensitivity The QT switches and charge measurement hardware functions are all internal to the QT102. SENSE ELECTRODE • VSS 2 1.3.3 Decreasing Sensitivity In some cases the QT102 may be too sensitive. In this case gain can be easily lowered further by decreasing Cs. For optimum noise immunity, the electrode should only be connected to the SNSK pin. 1.4 Recalibration Timeout In all cases the sample capacitor Cs should be much larger than the load capacitance (Cx). Typical values for Cx are 5 - 20pF while Cs is usually 1 - 50nF. If an object or material obstructs the sense electrode the signal may rise enough to create a detection, preventing further operation. To stop this, the sensor includes a timer which monitors detections. If a detection exceeds the timer setting (known as the Max On-duration) the sensor performs a full recalibration. This does not toggle the output state but ensures that the QT102 will detect a new touch correctly. The timer is set to activate this feature after ~ 30s. This will vary slightly with Cs. Note: Cx is not a physical discrete component on the PCB, it is the capacitance of the touch electrode and wiring. It is show in Figure 1.1 to aid understanding of the equivalent circuit. Increasing amounts of Cx destroy gain, therefore it is important to limit the amount of load capacitance on both SNS terminals. This can be done, for example, by minimizing trace lengths and widths and keeping these traces away from power or ground traces or copper pours. The traces and any components associated with SNS and SNSK will become touch sensitive and should be treated with caution to limit the touch area to the desired location. lQ 3 QT102_2R3.05_1007 The QT102 has no recalibration pin; a forced recalibration is accomplished when the device is powered up, after the recalibration timeout or when the auto-off override is released. However, an obstruction over the sense pad, for which the sensor has already made full allowance, could suddenly be removed leaving the sensor with an artificially elevated reference level and thus become insensitive to touch. In this latter case, the sensor will compensate for the object's removal very quickly, usually in only a few seconds. However, supply drain is low so it is a simple matter to treat the entire IC as a controllable load; driving the QT102's VDD pin directly from another logic gate or a microcontroller port will serve as both power and 'forced recal'. The source resistance of most CMOS gates and microcontrollers are low enough to provide direct power without problems. With large values of Cs and small values of Cx, drift compensation will appear to operate more slowly than with the converse. Note that the positive and negative drift compensation rates are different. 1.5 Forced Sensor Recalibration 1.7 Response Time The QT102's response time is highly dependent on burst length, which in turn is dependent on Cs and Cx. With increasing Cs, response time slows, while increasing levels of Cx reduce response time. 1.6 Drift Compensation Signal drift can occur because of changes in Cx and Cs over time. It is crucial that drift be compensated for, otherwise false detections, nondetections, and sensitivity shifts will follow. Drift compensation (Figure 1.2) is performed by making the reference level track the raw signal at a slow rate, but only while there is no detection in effect. The rate of adjustment must be performed slowly, otherwise legitimate detections could be ignored. The QT102 drift compensates using a slew-rate limited change to the reference level; the threshold and hysteresis values are slaved to this reference. 1.8 Spread Spectrum The QT102 modulates its internal oscillator by ±7.5 percent during the measurement burst. This spreads the generated noise over a wider band reducing emission levels. This also reduces susceptibility since there is no longer a single fundamental burst frequency. Once an object is sensed, the drift compensation mechanism ceases since the signal is legitimately high, and therefore should not cause the reference level to change. The QT102's drift compensation is 'asymmetric'; the reference level drift-compensates in one direction faster than it does in the other. Specifically, it compensates faster for decreasing signals than for increasing signals. Increasing signals should not be compensated for quickly, since an approaching finger could be compensated for partially or entirely before even approaching the sense electrode. Figure 1.2 Drift Compensation Signal H ysteresis Threshold R eference Output lQ 4 QT102_2R3.05_1007 2 Wiring and Parts If desired, the supply can be regulated using a Low Dropout (LDO) regulator. See Application Note AN-KD02 (see Section 2.1) for further information on power supply considerations. 2.1 Application Note Refer to Application Note AN-KD02, downloadable from the Quantum website for more information on construction and design methods. Go to http://www.qprox.com, click the Support tab and then Application Notes. Suggested regulator manufacturers: 2.2 Cs Sample Capacitor Cs is the charge sensing sample capacitor. The required Cs value depends on the thickness of the panel and its dielectric constant. Thicker panels require larger values of Cs. Typical values are 1nF to 50nF depending on the sensitivity required; larger values of Cs demand higher stability and better dielectric to ensure reliable sensing. Toko (XC6215 series) • Seiko (S817 series) • BCDSemi (AP2121 series) Parts placement: The chip should be placed to minimize the SNSK trace length to reduce low frequency pickup, and to reduce Cx which degrades gain. The Cs and Rs resistors (see Figure 2.1) should be placed as close to the body of the chip as possible so that the trace between Rs and the SNSK pin is very short, thereby reducing the antenna-like ability of this trace to pick up high frequency signals and feed them directly into the chip. A ground plane can be used under the chip and the associated discretes, but the trace from the Rs resistor and the electrode should not run near ground, to reduce loading. The Cs capacitor should be a stable type, such as X7R ceramic or PPS film. For more consistent sensing from unit to unit, 5 percent tolerance capacitors are recommended. X7R ceramic types can be obtained in 5 percent tolerance at little or no extra cost. In applications where high sensitivity (long burst length) is required the use of PPS capacitors is recommended. For best EMC performance the circuit should be made entirely with SMT components. Electrode trace routing: Keep the electrode trace (and the electrode itself) away from other signal, power, and ground traces including over or next to ground planes. Adjacent switching signals can induce noise onto the sensing signal; any adjacent trace or ground plane next to, or under, the electrode trace will cause an increase in Cx load and desensitize the device. 2.3 Rs Resistor Series resistor Rs is in line with the electrode connection and should be used to limit ESD currents and to suppress radio frequency interference (RFI). It should be approximately 4.7k to 33k . Although this resistor may be omitted, the device may become susceptible to external noise or RFI. For details of how to select these resistors see the Application Note AN-KD02 (Section 2.1). Important Note: for proper operation a 100nF (0.1µF) ceramic bypass capacitor must be used directly between VDD and VSS, to prevent latch-up if there are substantial VDD transients; for example, during an ESD event. The bypass capacitor should be placed very close to the device’s power pins. 2.4 Power Supply, PCB Layout The power supply can range between 2.0V and 5.5V. If the power supply is shared with another electronic system, care should be taken to ensure that the supply is free of digital spikes, sags, and surges which can adversely affect the device. The QT102 will track slow changes in VDD, but it can be badly affected by rapid voltage fluctuations. It is highly recommended that a separate voltage regulator be used just for the QT102 to isolate it from power supply shifts caused by other components. lQ • 5 QT102_2R3.05_1007 2.5 Wiring Table 2.1 Pin Descriptions PIN NAME TYPE 1 2 3 OUT VSS SNSK O P IO 4 SNS IO 5 VDD P 6 TIME I I O OD IO P DESCRIPTION To switched circuit and output polarity selection resistor (Rop) Ground power pin To Cs capacitor and to sense electrode To Cs capacitor and multiplier configuration resistor (Rm) Rm must be fitted and connected to either VSS or VDD. Refer to Section 3.5 for details. Positive power pin Timeout configuration pin, which must be connected to either VSS, VDD, OUT or an RC network. Refer to Section 3.5 for details. Input only Output only, push-pull Open drain output Input and output Ground or power Figure 2.1 Basic Circuit Configuration (active high output, toggle on/off, no auto switch off) Note: bypass capacitor to be tightly wired between VDD and VSS and kept close to QT102 pin 5. VDD SENSE ELECTRODE 5 VDD RS 3 OUT 1 SNSK CS 4 SNS Rop TIME 6 Rm VSS 2 Re Figure 2.1, check the following sections for component values: • Section 2.2, page 5: Cs capacitor (Cs) • Section 2.3, page 5: Sample resistor (Rs) • Section 2.4, page 5: Voltage levels • Section 3.5.2, page 8: Rm • Section 3.3, page 7: Rop lQ 6 QT102_2R3.05_1007 3 Operation The DI can also be viewed as a 'consensus' filter, that requires four successive detections to create an output. 3.1 Acquisition Modes 3.2.2 Detect Threshold 3.1.1 Introduction The device detects a touch when the signal has crossed a threshold level. The threshold level is fixed at 10 counts. The OUT pin of the QT102 can be configured to be active high or active low (see Section 3.3). • If active high then Š ‘on’ is high Š ‘off’ is low • If active low then Š ‘on’ is low Š ‘off’ is high 3.3 Output Polarity Selection The output (OUT pin) of the QT102 can be configured to have an active high or active low output by means of the output configuration resistor Rop. The resistor is connected between the output and either Vss or VDD (see Figure 3.3 and Table 3.1). A typical value for Rop is 100k . Figure 3.3 Output Polarity The acquisition mode depends on the state of the OUT pin (on or off) and whether a touch is detected. In the following text ‘on’ is when the output is in its active state. SENSE ELECTRODE 3.1.2 OUT Pin ‘On’ (Fast Mode) The QT102 runs in Fast mode when the OUT pin is on. In this mode the device runs at maximum speed at the expense of increased current consumption. The delay between bursts in Fast mode is approximately 2.6ms, as shown in Figure 3.1. VDD 5 RS VDD Rop 3 SNSK Figure 3.1 Fast Mode Bursts (Output in On condition) Vop CS 4 SNS SNSK QT102 OUT 1 TIME 6 Rm VSS ~2.6ms 2 3.1.3 OUT Pin ‘Off’ (Low Power Mode) The QT102 runs in Low Power (LP) mode if the OUT pin is off. In this mode it sleeps for approximately 85ms at the end of each burst, saving power but slowing response. On detecting a possible key touch, it temporarily switches to Fast mode until either the key touch is confirmed or found to be spurious (via the detect integration process). If the touch is confirmed the QT102 will switch to Fast mode as shown in Figure 3.2. If a touch is denied the device will revert to normal LP mode operation automatically. Table 3.1 Output Configuration Key touch SNSK QT102 sleep sleep Function (Vop) Vss VDD (Output polarity) Active high Active low Note that some devices such as Digital Transistors have an internal biasing network that will naturally pull the OUT pin to its inactive state. If these are being used then the resistor Rop is not required (see Figure 3.4). Figure 3.2 Low Power Mode/Touch Detection ~85ms Name Figure 3.4 Output Connected to Digital Transistor SENSE ELECTRODE fast detect integrator VDD OUT VDD Load 3 SNSK 3.2 Signal Processing CS 3.2.1 Detect Integrator 4 SNS It is desirable to suppress detections generated by electrical noise or from quick brushes with an object. To accomplish this, the QT102 incorporates a ‘detect integration’ (DI) counter that increments with each detection until a limit is reached, after which the output is activated. If no detection is sensed prior to the final count, the counter is reset immediately to zero. In the QT102, the required count is four. lQ 5 RS Rm OUT 1 TIME 6 VSS 2 7 QT102_2R3.05_1007 Table 3.2 Predefined Auto-off Delay (Active High Output) 3.4 Output Drive The OUT pin is active high and can sink or source up to 2mA. When a large value of Cs (>20nF) is used the OUT current should be limited to burst time + 10ms (typical value 25ms) Retrigger (reload auto-off delay counter) Switch output to off state and inhibit further touch detection until Vm returns to original state tp > burst time + 50ms (typical value 65ms) • Auto-off delay 45 minutes • VDD = 3.5V 1. Calculate Auto-off delay in seconds 45 x 60 = 2700 2. Obtain K from Figure 3.10, K= 42 3. Calculate Rt x Ct = 2700 x 42 = 7560 15 4. Decide on a value for Rt or Ct (e.g.Ct = 47nF) 5. Calculate Rt = 7560 = 160k 47 While Vm is held in the override state the QT102 inhibits bursts and waits for Vm to return to its original state. When Vm returns to its original state the QT102 performs a sensor recalibration before continuing in its current output state. As an alternative to calculation, Figures 3.12 and 3.13 show charts of typical curves of auto-off delay against resistor and capacitor values for active high and active low outputs at various values of VDD (delay multiplier = x1). Figure 3.9 shows override pulses being applied to a QT102 with delay multiplier set to x1. lQ Active high output (Vop connected to VSS) Proceed as follows: Table 3.6 Time Delay Pulse Pulse Duration • 9 QT102_2R3.05_1007 Figure 3.10 Active High Output Figure 3.11 Active Low Output QT102 Active Low output QT102 Active High output 20 53 51 19 18 47 45 RC divisor (K) RC divisor (K) 49 43 41 39 37 17 16 15 14 35 33 13 31 12 29 2 2.5 3 3.5 4 4.5 2 5 2.5 3 3.5 4 4.5 5 VDD (volts) VDD (volts) Figure 3.12 Auto-off Delay, Active High Output, Vm = Vss (delay multiplier = x1) QT102 Active High output, VDD = 4V QT102 Active High output, VDD = 5V 4000 Ct=100nF Ct=100nF 3500 3500 3000 3000 Auto Off Delay (seconds) Auto Off Delay (seconds) 4000 Ct=47nF 2500 2000 1500 Ct=22nF 1000 Ct=10nF Ct=47nF 2500 2000 Ct=22nF 1500 1000 Ct=10nF 500 500 0 0 10 30 50 70 90 110 130 150 170 190 10 210 30 50 Tim ing Resistor Rt (K ohm s) 4000 Ct=100nF 3000 2500 2000 Ct=22nF 1500 1000 110 130 150 170 190 210 Ct=100nF Ct=47nF 3500 Ct=47nF Auto Off Delay (seconds) Auto Off Delay (seconds) 3500 90 QT102 Active High output, VDD = 2V QT102 Active High output, VDD = 3V 4000 70 Tim ing Resistor Rt (K ohm s) Ct=10nF 3000 2500 Ct=22nF 2000 1500 Ct=10nF 1000 500 500 0 0 10 30 50 70 90 110 130 150 170 190 10 210 50 70 90 110 130 150 170 190 210 Tim ing Resistor Rt (K ohm s) Tim ing Resistor Rt (K ohm s) lQ 30 10 QT102_2R3.05_1007 Figure 3.13 Auto-off Delay, Active Low Output, Vm = Vss (delay multiplier = x1) QT102 Active Low output, VDD = 5V 4000 Ct=100nF Ct=47nF QT102 Active Low output, VDD = 4V 4000 Ct=22nF Ct=100nF Ct=47nF 3000 Auto Off Delay (seconds) Auto Off Delay (seconds) Ct=22nF 3500 3500 Ct=10nF 2500 2000 1500 1000 3000 2500 Ct=10nF 2000 1500 1000 500 500 0 0 0 20 40 60 80 100 120 140 160 180 0 200 20 40 60 80 100 120 140 160 180 200 Tim ing Resistor Rt (K ohm s) Tim ing Resistor Rt (K ohm s) QT102 Active Low output, VDD = 3V QT102 Active Low output, VDD = 2V 4000 4000 Ct=100nF Ct=100nF Ct=47nF 3500 Ct=22nF Ct=47nF 3500 Auto Off Delay (seconds) Auto Off Delay (seconds) Ct=22nF 3000 2500 2000 Ct=10nF 1500 1000 500 3000 2500 2000 Ct=10nF 1500 1000 500 0 0 0 20 40 60 80 100 120 140 160 180 200 0 Tim ing Resistor Rt (K ohm s) 20 40 60 80 100 120 140 160 180 200 Tim ing Resistor Rt (K ohm s) Example using a chart to calculate Rt and Ct Requirements: • Active low output (Vop connected to VSS) • Auto-off delay 10 hours • VDD = 4V 1. Calculate Auto-off delay in seconds 10 x 60 x 60 = 36000. This value is outside of the range of the charts so use the x24 multiplier (connect Rm to VDD). Note: this will decrease the key sensitivity, so it may be necessary to increase the value of Cs. 2. Find 36000 = 1500 on the 4V chart in Figure 3.13 24 3. This shows the following Rt / Ct combinations: 100nF / 10k, 47nF / 27k, 22nF / 60k or 10nF / 130k Note: the Auto-off delay times shown are nominal and will vary slightly from chip to chip and with capacitor and resistor tolerance. lQ 11 QT102_2R3.05_1007 3.6 Examples of Typical Applications Figure 3.14 Application 1 Active low, driving PNP transistor, auto off time 500s x 24 (3.33 hours) +3V 100nF Rm SENSE ELECTRODE 1M (x24) DTA143 5 VDD RS 3 OUT 1 SNSK CS 10k 22nF 4 Rt SNS 47k TIME 6 2.2k Ct VSS Load 10nF 2 Auto off time obtained from 3V chart in Figure 3.13 Setting the delay multiplier to x24 will decrease the key sensitivity, so it may be necessary to increase the value of Cs. Figure 3.15 Application 2 Active high, driving high impedance, auto off time 135s x 1 (2.25 minutes) +5V 100nF SENSE ELECTRODE 5 VDD Rs 3 10k OUT 1 SNSK CS 6.8nF 4 Rt SNS 10k TIME 6 Rm VSS Rop Ct 2.2k 47nF 2 Auto off time obtained from 5V chart in Figure 3.12. lQ 12 QT102_2R3.05_1007 4 Specifications 4.1 Absolute Maximum Specifications Operating temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40OC to +85OC Storage temp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55OC to +125OC VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +6.5V Max continuous pin current, any control or drive pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA Short circuit duration to VSS, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Short circuit duration to VDD, any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . infinite Voltage forced onto any pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.6V to (VDD + 0.6) Volts CAUTION: Stresses beyond those listed under ‘Absolute Maximum Specifications’ may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum specification conditions for extended periods may affect device reliability. 4.2 Recommended Operating Conditions VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +2.0 to 5.5V Short-term supply ripple+noise. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mV Long-term supply stability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100mV Cs value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1nF to 50nF Cx value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 to 20pF 4.3 AC Specifications VDD = 3.0V, Cs = 10nF, Cx = 5pF, Ta = recommended range, unless otherwise noted Parameter Description TRC Recalibration time TPC TPT TG1 Time between end of burst and start of the next (Fast mode) TG2 Min Typ Max Units Notes 250 ms Cs and Cx dependent Charge duration 2 µs ±7.5% spread spectrum variation Transfer duration 2 µs ±7.5% spread spectrum variation 2.6 ms Time between end of burst and start of the next (LP mode) 85 ms Increases with reducing VDD TBL Burst length 20 ms Vdd, Cs and Cx dependent. See Section 2.2 for capacitor selection. TR Response time 100 ms Max Units 4.4 Signal Processing Description Min Typ Threshold differential 10 counts Hysteresis 2 counts Consensus filter length 4 samples Recalibration timer duration 40 secs lQ 13 Notes Will vary with VDD QT102_2R3.05_1007 4.5 DC Specifications VDD = 3.0V, Cs = 10nF, Cx = 5pF, Ta = recommended range, unless otherwise noted Parameter Description Min Typ Max Notes Units VDD Supply voltage 2 5.5 V IDD Supply current 5 600 µA Depending on supply and run mode Iddl Supply current, LP Mode µA 2V 3V 5V V/s Required for proper start-up VDDS Supply turn-on slope VIL Low input logic level VHL High input logic level VOL Low output voltage VOH 23 37 90 100 0.8 V 2.2 High output voltage V 0.6 V OUT, 4mA sink V OUT, 1mA source ±1 µA 100 pF 14 bits VDD-0.7 IIL Input leakage current CX Load capacitance range AR Acquisition resolution 0 9 4.6 Mechanical Dimensions D e L 2QNN E Aa W Pin 1 ø M H h Note: the part marking shown is for high volume parts. Samples may be shipped marked 02NN. Package type: SOT23-6 Millimeters Max Notes Symbol Min M W Aa H h D L E e 2.8 2.6 1.5 0.9 0.0 0.35 0.35 0.09 3.10 3.0 1.75 1.3 0.15 0.5 0.55 0.2 Ø 0o 10o lQ 0.95 BSC 14 Min Inches Max 0.110 0.102 0.059 0.035 0 0.014 0.014 0.004 0.122 0.118 0.069 0.051 0.006 0.02 0.022 0.008 0o 10o Notes 0.038 BSC QT102_2R3.05_1007 4.7 Marking SOT23-6 Part Number Marking QT102-ISG 2QNN (where NN is variable) Note: the part marking shown is for high volume parts. Samples may be shipped marked 02NN. 4.8 Moisture Sensitivity Level (MSL) MSL Rating Peak Body Temperature Specifications MSL1 260OC IPC/JEDEC J-STD-020C lQ 15 QT102_2R3.05_1007 5 Datasheet Control 5.1 Changes Changes this issue (datasheet issue 5) Section 2.5 Section 5.1 5.2 Numbering Convention Part Number Datasheet Issue Number QT102_MXN.nn_mmyy Chip Revision (Where M = Major chip revision, N = minor chip revision, X = Prereleased Product [or R = Released Product]) Datasheet Release Date; (Where mm = Month, yy = Year) A minor chip revision (N) is defined as a revision change which does not affect product functionality or datasheet. The value of N is usually only stated for released parts (R). lQ 16 QT102_2R3.05_1007 NOTES: lQ 17 QT102_2R3.05_1007 lQ Copyright © 2007 QRG Ltd. All rights reserved Patented and patents pending Corporate Headquarters 1 Mitchell Point Ensign Way, Hamble SO31 4RF Great Britain Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 www.qprox.com North America 651 Holiday Drive Bldg. 5 / 300 Pittsburgh, PA 15220 USA Tel: 412-391-7367 Fax: 412-291-1015 The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject to QRG’s Terms and Conditions of sale and services. QRG patents, trademarks and Terms and Conditions can be found online at http://www.qprox.com/about/legal.php. Numerous further patents are pending, one or more which may apply to this device or the applications thereof. QRG products are not suitable for medical (including lifesaving equipment), safety or mission critical applications or other similar purposes. Except as expressly set out in QRG's Terms and Conditions, no licenses to patents or other intellectual property of QRG (express or implied) are granted by QRG in connection with the sale of QRG products or provision of services. QRG will not be liable for customer product design and customers are entirely responsible for their products and applications which incorporate QRG's products. Developer: Kevin Snoad
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