Not Recommended for New Designs
Please use RE46C191
RE46C190
CMOS Low Voltage Photoelectric Smoke Detector ASIC
with Interconnect and Timer Mode
Features
Description
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The RE46C190 is a low-power, low-voltage CMOS
photoelectric-type smoke detector IC. With minimal
external components, this circuit will provide all the
required features for a photoelectric-type smoke
detector.
Two AA Battery Operation
Internal Power-on Reset
Low Quiescent Current Consumption
Available in 16L N SOIC
Local Alarm Memory
Interconnect up to 40 Detectors
9-Minute Timer for Sensitivity Control
Temporal or Continuous Horn Pattern
Internal Low Battery and Chamber Test
All Internal Oscillator
Internal Infrared Emitter Diode (IRED) Driver
Adjustable IRED Drive Current
Adjustable Hush Sensitivity
2% Low Battery Set Point
The design incorporates a gain-selectable photo
amplifier for use with an infrared emitter/detector pair.
An internal oscillator strobes power to the smoke
detection circuitry every 10 seconds, to keep the
standby current to a minimum. If smoke is sensed, the
detection rate is increased to verify an Alarm condition.
A high gain mode is available for push-button chamber
testing.
A check for a low battery condition is performed every
86 seconds and chamber integrity is tested once every
43 seconds when in Standby. The temporal horn
pattern supports the NFPA 72 emergency evacuation
signal.
An interconnect pin allows multiple detectors to be
connected such that, when one unit alarms, all units will
sound.
An internal nine-minute timer can be used for a
Reduced Sensitivity mode.
Utilizing low-power CMOS technology, the RE46C190
was designed for use in smoke detectors that comply
with Underwriters Laboratory Specification UL217 and
UL268.
PIN CONFIGURATION
Note:
The RE46C191 is an improved version of
the RE46C190 that is recommended for
new designs. Please contact Microchip
marketing for information on the
RE46C191.
2010-2018 Microchip Technology Inc.
RE46C190
SOIC
VSS
1
16
LX
IRED
2
15
VBST
VDD
3
14
HS
TEST
4
13
HB
TEST2
5
12
IO
IRP
6
11
IRCAP
IRN
7
10
FEED
RLED
8
9
GLED
DS20002271C-page 1
RE46C190
TYPICAL BLOCK DIAGRAM
TEST2 (5)
TEST (4)
LX (16)
Boost Control
Precision
Reference
VDD (3)
R3
+
-
R4
+
IRP (6)
IRN (7)
Current
Sense
Low Battery
Comparator
Boost Comparator
+
-
Smoke
Comparator
Photo
Integrator
Control
Logic and
Timing
VBST (15)
RLED (8)
Level
Shift
Horn Driver
+
IRCAP (11)
Programmable
Limits
IRED (2)
VSS (1)
DS20002271C-page 2
High
Normal
Hysteresis
Programmable
IRED Current
Trimmed
Oscilator
HB (13)
POR and
BIAS
HS (14)
FEED (10)
Programming
Control
Interconnect
IO (12)
GLED (9)
2010-2018 Microchip Technology Inc.
RE46C190
TYPICAL BATTERY APPLICATION
VDD
R1
Battery
100
C1
10 µF
3V
C2
1 µF
Push-to-Test/
Hush
L1
10 µH
D1
1 VSS
VBST
R7
100
R6
330
TP1
D4
2 IRED
C3
100 µF
TP2
Smoke
Chamber
D2
D3
RED
D5
GREEN
VBST
RE46C190
LX 16
VBST 15
3 VDD
HS 14
4 TEST
HB 13
5 TEST2
IO 12
6 IRP
IRCAP11
7 IRN
FEED10
8 RLED
GLED 9
C5
R4
1.5M 1 nF
R5
C6
R3
200K
C4
4.7 µF
To other Units
330
33 µF
Note 1: C2 should be located as close as possible to the device power pins and C1 should be located as close
as possible to VSS.
2: R3, R4 and C5 are typical values and may be adjusted to maximize sound pressure.
3: DC-DC converter in High Boost mode (nominal VBST = 9.6V) can draw current pulses of greater than 1A,
and is therefore very sensitive to series resistance. Critical components of this resistance are the
inductor DC resistance, the internal resistance of the battery and the resistance in the connections from
the inductor to the battery, from the inductor to the LX pin and from the VSS pin to the battery. In order to
function properly under full load at VDD= 2V, the total of the inductor and interconnect resistances should
not exceed 0.3 . The internal battery resistance should be no more than 0.5 and a low ESR capacitor
of 10 µF or more should be connected in parallel with the battery, to average the current draw over the
boost converter cycle.
4: Schottky diode D1 must have a maximum peak current rating of at least 1.5A. For best results it should
have forward voltage specification of less than 0.5V at 1A, and low reverse leakage.
5: Inductor L1 must have a maximum peak current rating of at least 1.5A.
2010-2018 Microchip Technology Inc.
DS20002271C-page 3
RE46C190
NOTES:
DS20002271C-page 4
2010-2018 Microchip Technology Inc.
RE46C190
1.0
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operation listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
Supply Voltage ...................................VDD= 5.5V; VBST = 13V
Input Voltage Range Except FEED, TEST..... VIN = -.3V to VDD +.3V
FEED Input Voltage Range .................... VINFD =- 10 to +22V
TEST Input Voltage Range ........ VINTEST =- .3V to VBST+.3V
Input Current except FEED ................................... IIN = 10 mA
Continuous Operating Current (HS, HB, VBST)...... IO= 40 mA
Continuous Operating Current (IRED) ...............IOIR= 300 mA
Operating Temperature .............................. TA = –10 to +60°C
Storage Temperature ...........................TSTG = –55 to +125°C
ESD Human Body Model .................................. VHBM = 750V
ESD Machine Model .............................................VMM = 75V
DC ELECTRICAL CHARACTERISTICS
DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = –10 to +60°C, VDD = 3V,
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1, Note 2, Note 3)
Symbol
Test
Pin
Min.
Typ.
Max.
Units
Supply Voltage
VDD
3
2
—
5.0
V
Operating
Supply Current
IDD1
3
—
1
2
µA
Standby, Inputs low,
No loads, Boost off, No
smoke check
Standby Boost
Current
IBST1
15
—
100
—
nA
Standby, Inputs low,
No loads, Boost off, No
smoke check
IRCAP Supply
Current
IIRCAP
11
—
500
—
µA
During smoke check
Boost Voltage
VBST1
15
3.0
3.6
4.2
V
IRCAP charging for Smoke
Check, GLED operation
IOUT = 40 mA
VBST2
15
8.5
9.6
10.7
V
No local alarm,
RLED Operation,
IOUT = 40 mA, IO as an
input
IINOP
6
–200
—
200
pA
IRP = VDD or VSS
7
–200
—
200
pA
IRN = VDD or VSS
Parameter
Input Leakage
Input Voltage Low
Note 1:
2:
3:
4:
Conditions
IIHF
10
—
20
50
µA
FEED = 22V; VBST = 9V
IILF
10
–50
–15
—
µA
FEED = –10V;
VBST = 10.7V
VIL1
10
—
—
2.7
V
FEED, VBST = 9V
VIL2
12
—
—
800
mV
No local alarm,
IO as an input
Wherever a specific VBST value is listed under test conditions, the VBST is forced externally with the
inductor disconnected and the DC-DC converter NOT running.
Typical values are for design information only.
Limits over the specified temperature range are not production tested and are based on characterization
data. Unless otherwise stated, production test is at room temperature with guardbanded limits.
Not production tested.
2010-2018 Microchip Technology Inc.
DS20002271C-page 5
RE46C190
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = –10 to +60°C, VDD = 3V,
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1, Note 2, Note 3)
Parameter
Input Voltage High
IO Hysteresis
Input Pull-Down
Current
Output Low Voltage
Symbol
Test
Pin
Min.
Typ.
Max.
Units
VIH1
10
6.2
—
—
V
FEED; VBST = 9V
VIH2
12
2.0
—
—
V
No local alarm,
IO as an input
Conditions
VHYST1
12
—
150
—
mV
IPD1
4, 5
0.25
—
10
µA
VIN = VDD
IPDIO1
12
20
—
80
µA
VIN = VDD
IPDIO2
12
—
—
140
µA
VIN = 15V
VOL1
13, 14
—
—
1
V
IOL = 16 mA, VBST = 9V
VOL2
8
—
—
300
mV
IOL = 10 mA, VBST = 9V
VOL3
9
—
—
300
mV
Output High Voltage
VOH1
13, 14
8.5
—
—
V
Output Current
IIOH1
12
-4
-5
—
mA
Alarm, VIO = 3V or
VIO = 0V, VBST = 9V
IIODMP
12
5
30
—
mA
At Conclusion of Local
Alarm or Test, VIO=1V
IIRED50
2
45
50
55
mA
IRED on, VIRED = 1V,
VBST = 5V, IRCAP = 5V,
(50 mA option selected;
TA = 27°C)
IIRED100
2
90
100
110
mA
IRED on, VIRED = 1V,
VBST = 5V, IRCAP = 5V,
(100 mA option selected;
TA = 27°C)
IIRED150
2
135
150
165
mA
IRED on, VIRED = 1V,
VBST = 5V, IRCAP = 5V,
(150 mA option selected;
TA = 27°C)
IIRED2050
2
180
200
220
mA
IRED on, VIRED = 1V,
VBST = 5V, IRCAP = 5V,
(200 mA option selected;
TA = 27°C)
—
0.5
—
%/°C
VBST = 5V, IRCAP = 5V;
Note 4
IRED Current
Temperature
Coefficient
Note 1:
2:
3:
4:
TCIRED
IOL = 10 mA, VBST = 3.6V
IOL = 16 mA, VBST = 9V
Wherever a specific VBST value is listed under test conditions, the VBST is forced externally with the
inductor disconnected and the DC-DC converter NOT running.
Typical values are for design information only.
Limits over the specified temperature range are not production tested and are based on characterization
data. Unless otherwise stated, production test is at room temperature with guardbanded limits.
Not production tested.
DS20002271C-page 6
2010-2018 Microchip Technology Inc.
RE46C190
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = –10 to +60°C, VDD = 3V,
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1, Note 2, Note 3)
Symbol
Test
Pin
Min.
Typ.
Max.
Units
VLB1
3
2.05
2.1
2.15
V
Falling Edge;
2.1V nominal selected
VLB2
3
2.15
2.2
2.25
V
Falling Edge;
2.2V nominal selected
VLB3
3
2.25
2.3
2.35
V
Falling Edge;
2.3V nominal selected
VLB4
3
2.35
2.4
2.45
V
Falling Edge;
2.4V nominal selected
VLB5
3
2.45
2.5
2.55
V
Falling Edge;
2.5V nominal selected
VLB6
3
2.55
2.6
2.65
V
Falling Edge;
2.6V nominal selected
VLB7
3
2.65
2.7
2.75
V
Falling Edge;
2.7V nominal selected
VLB8
3
2.75
2.8
2.85
V
Falling Edge;
2.8V nominal selected
VLBHYST
3
—
100
—
mV
IRCAP Turn On
Voltage
VTIR1
11
3.6
4.0
4.4
V
Falling edge;
VBST = 5V; IOUT = 20 mA
IRCAP Turn Off
Voltage
VTIR2
11
4.0
4.4
4.8
V
Rising edge;
VBST = 5V; IOUT = 20 mA
Parameter
Low Battery Alarm
Voltage
Low Battery
Hysteresis
Note 1:
2:
3:
4:
Conditions
Wherever a specific VBST value is listed under test conditions, the VBST is forced externally with the
inductor disconnected and the DC-DC converter NOT running.
Typical values are for design information only.
Limits over the specified temperature range are not production tested and are based on characterization
data. Unless otherwise stated, production test is at room temperature with guardbanded limits.
Not production tested.
2010-2018 Microchip Technology Inc.
DS20002271C-page 7
RE46C190
AC ELECTRICAL CHARACTERISTICS
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = –10° to +60°C, VDD = 3V,
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4).
Parameter
Symbol Test Pin
Min.
Typ.
Max.
Units
Condition
9.80
10.4
11.0
ms
PROGSET,
IO = high
9.80
10.4
11.0
ms
Operating
Time Base
Internal Clock Period
TPCLK
RLED Indicator
TON1
8
Standby Period
TPLED1
8
320
344
368
s
Local Alarm Period
TPLED2A
8
470
500
530
ms
Local alarm condition
with temporal horn
pattern
TPLED2B
8
625
667
710
ms
Local alarm condition
with continuous horn
pattern
Hush Timer Period
TPLED4
8
10
10.7
11.4
s
Timer mode, no local
alarm
External Alarm
Period
TPLED0
8
s
Remote alarm only
Latched Alarm Period
TPLED3
9
40
43
46
s
Latched Alarm Condition,
LED enabled
Latched Alarm Pulse
Train (3x) Off Time
TOFLED
9
1.25
1.33
1.41
s
Latched Alarm Condition,
LED enabled
Latched Alarm LED
Enabled Duration
TLALED
9
22.4
23.9
25.3
Hours
Latched Alarm Condition,
LED enabled
TPER0A
2
10
10.7
11.4
s
Standby, no alarm
TPER1A
2
1.88
2.0
2.12
s
Standby, after one valid
smoke sample
TPER2A
2
0.94
1.0
1.06
s
Standby,
after two consecutive
valid smoke samples
TPER3A
2
0.94
1.0
1.06
s
Local Alarm
(three consecutive valid
smoke samples)
TPER4A
2
235
250
265
ms
Push button test,
>1 chamber detections
313
333
353
ms
Push button test,
no chamber detections
7.5
8.0
8.5
s
On Time
LED IS NOT ON
Standby, no alarm
GLED Indicator
Smoke Check
Smoke Test Period
with Temporal Horn
Pattern
TPER5A
Note 1:
2:
3:
4:
2
In remote alarm
See timing diagram for Horn Pattern (Figure 5-2).
TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing.
Typical values are for design information only.
Limits over the specified temperature range are not production tested, and are based on characterization
data.
DS20002271C-page 8
2010-2018 Microchip Technology Inc.
RE46C190
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = –10° to +60°C, VDD = 3V,
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4).
Parameter
Smoke Test Period
with Continuous Horn
Pattern
Symbol Test Pin
Min.
Typ.
Max.
Units
Condition
TPER0B
2
10
10.7
11.4
s
Standby, no alarm
TPER1B
2
2.5
2.7
2.9
s
Standby, after one valid
smoke sample
TPER2B
2
1.25
1.33
1.41
s
Standby,
after two consecutive
valid smoke samples
TPER3B
2
1.25
1.33
1.41
s
Local Alarm
(three consecutive valid
smoke samples)
TPER4B
2
313
333
353
ms
Push button test
TPER5B
2
10
10.7
11.4
s
In remote alarm
TPCT1
2
40
43
46
s
Standby, no alarm
TPLB1
3
320
344
368
s
RLED on
TPLB2
3
80
86
92
s
RLED on
Low Battery Horn
Period
THPER1
13
40
43
46
s
Low battery, no alarm
Chamber Fail Horn
Period
THPER2
13
40
43
46
s
Chamber failure
Low Battery Horn
On Time
THON1
13
9.8
10.4
11.0
ms
Low battery, no alarm
Chamber Fail Horn
On Time
THON2
13
9.8
10.4
11.0
ms
Chamber failure
Chamber Fail
Off Time
THOF1
13
305
325
345
ms
Failed chamber,
no alarm, 3x chirp option
Alarm On Time
with Temporal Horn
Pattern
THON2A
13
470
500
530
ms
Local or remote alarm
(Note 1)
Alarm Off Time
with Temporal Horn
Pattern
THOF2A
13
470
500
530
ms
Local or remote alarm
(Note 1)
THOF3A
13
1.4
1.5
1.6
s
Local or remote alarm
(Note 1)
Alarm On Time
with Continuous
Horn Pattern
THON2B
13
235
250
265
ms
Local or remote alarm
(Note 1)
Alarm Off Time
with Continuous
Horn Pattern
THOF2B
13
78
83
88
ms
Local or remote alarm
(Note 1)
Push-to-Test Alarm
Memory On Time
THON4
13
9.8
10.4
11.0
ms
Alarm memory active,
push-to-test
Chamber Test Period
Low Battery
Low Battery Sample
Period
Horn Operation
Note 1:
2:
3:
4:
See timing diagram for Horn Pattern (Figure 5-2).
TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing.
Typical values are for design information only.
Limits over the specified temperature range are not production tested, and are based on characterization
data.
2010-2018 Microchip Technology Inc.
DS20002271C-page 9
RE46C190
AC ELECTRICAL CHARACTERISTICS (CONTINUED)
AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = –10° to +60°C, VDD = 3V,
VBST = 4.2V, Typical Application (unless otherwise noted) (Note 1 to Note 4).
Parameter
Push-to-Test Alarm
Memory Horn Period
Symbol Test Pin
Min.
Typ.
Max.
Units
THPER4
13
235
250
265
ms
Condition
Alarm memory active,
push-to-test
Interconnect Signal Operation (IO)
IO Active Delay
TIODLY1
12
—
0
—
s
From start of local alarm
to IO active
Remote Alarm Delay
with Temporal Horn
Pattern
TIODLY2A
12
0.780
1.00
1.25
s
No local alarm,
from IO active to alarm
Remote Alarm Delay TIODLY2B
with Continuous Horn
Pattern
12
380
572
785
ms
No local alarm,
from IO active to alarm
IO Charge
Dump Duration
TIODMP
12
1.23
1.31
1.39
s
IO Filter
TIOFILT
12
—
—
313
ms
Standby, no alarm
TTPER
8.0
8.6
9.1
Min
No alarm
TEOL
314
334
354
Hours
2
—
100
—
µs
Prog Bits 3,4 = 1,1
2
—
200
—
µs
Prog Bits 3,4 = 0,1
2
—
300
—
µs
Prog Bits 3,4 = 1,0
2
—
400
—
µs
Prog Bits 3,4 = 0,0
At conclusion of local
alarm or test
Hush Timer Operation
Hush Timer Period
EOL
End-of-Life
Age Sample
EOL Enabled; Standby
Detection
IRED On Time
Note 1:
2:
3:
4:
TIRON
See timing diagram for Horn Pattern (Figure 5-2).
TPCLK and TIRON are 100% production tested. All other AC parameters are verified by functional testing.
Typical values are for design information only.
Limits over the specified temperature range are not production tested, and are based on characterization
data.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: All limits specified for VDD = 3V, VBST = 4.2V and VSS = 0V, Except where noted in the
Electrical Characteristics.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Temperature Ranges
Operating Temperature Range
Storage Temperature Range
TA
-10
—
+60
°C
TSTG
-55
—
+125
°C
θJA
—
86.1
—
°C/W
Thermal Package Resistances
Thermal Resistance, 16L-SOIC (150 mil.)
DS20002271C-page 10
2010-2018 Microchip Technology Inc.
RE46C190
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
RE46C190
SOIC
Symbol
1
VSS
2
IRED
Provides a regulated and programmable pulsed current for the infrared emitter
diode.
3
VDD
Connects to the positive supply or battery voltage.
4
TEST
This input is used to invoke Test modes and the Timer mode. This input has an
internal pull-down.
5
TEST2
Tests input for test and programming modes. This input has an internal pull-down.
6
IRP
Connects to the anode of the photo diode.
7
IRN
Connects to the cathode of the photo diode.
8
RLED
Open drain NMOS output, used to drive a visible LED. This pin provides load current
for the low battery test and is a visual indicator for Alarm and Hush modes.
9
GLED
Open drain NMOS output used to drive a visible LED to provide visual indication of
an Alarm Memory condition.
10
FEED
Usually connected to the feedback electrode through a current limiting resistor. If not
used, this pin must be connected to VDD or VSS.
11
IRCAP
Used to charge and monitor the IRED capacitor.
12
IO
This bidirectional pin provides the capability to interconnect many detectors in a
single system. This pin has an internal pull-down device and a charge dump device.
13
HB
This pin is connected to the metal electrode of a piezoelectric transducer.
14
HS
This pin is a complementary output to HB, connected to the ceramic electrode of the
piezoelectric transducer.
15
VBST
16
LX
Function
Connects to the negative supply voltage.
Boosted voltage produced by DC-DC converter.
Open drain NMOS output, used to drive the boost converter inductor. The inductor
should be connected from this pin to the positive supply through a low resistance
path.
2010-2018 Microchip Technology Inc.
DS20002271C-page 11
RE46C190
NOTES:
DS20002271C-page 12
2010-2018 Microchip Technology Inc.
RE46C190
3.0
DEVICE DESCRIPTION
3.1
Standby Internal Timing
The internal oscillator is trimmed to ±6% tolerance.
Once every 10 seconds, the boost converter is
powered up, the IRcap is charged from VBST and then
the detection circuitry is active for 10 ms. Prior to
completion of the 10 mS period, the IRED pulse is
active for a user-programmable duration of 100 to
400 µs. During this IRED pulse, the photo diode current
is integrated and then digitized. The result is compared
to a limit value stored in EEPROM during calibration to
determine the photo chamber status. If a smoke
condition is present, the period to the next detection
decreases and additional checks are made.
3.2
Smoke Detection Circuitry
The digitized photo amplifier integrator output is
compared to the stored limit value at the conclusion of
the IRED pulse period. The IRED drive is all internal,
and both the period and current are user
programmable. Three consecutive smoke detections
will cause the device to go into Alarm and activate the
horn and interconnect circuits. In Alarm, the horn is
driven at the high-boost voltage level, which is
regulated based on an internal voltage reference and
therefore results in consistent audibility over battery
life. RLED will turn on for 10 ms at a 2 Hz rate. In Local
Alarm, the integration limit is internally decreased to
provide alarm hysteresis. The integrator has three
separate gain settings:
3.3
Supervisory Tests
Once every 86 seconds, the status of the battery
voltage is checked by enabling the boost converter for
10 ms and comparing a fraction of the VDD voltage to
an internal reference. In each period of 344 seconds,
the battery voltage is checked four times. Three checks
are unloaded and one check is performed with the
RLED enabled, which provides a battery load. The
High Boost mode is active only for the loaded low
battery test. In addition, once every 43 seconds the
chamber is activated and a High Gain mode and
chamber test limits are internally selected. A check of
the chamber is made by amplifying background
reflections. The Low Boost mode is used for the
chamber test.
If either the low battery test or the chamber test fails,
the horn will pulse on for 10 ms every 43 seconds, and
will continue to pulse until the failing condition passes.
If two consecutive chamber tests fail, the horn will pulse
on three times for 10 ms, separated by 330 ms every
43 seconds. Each of the two supervisory test audible
indicators is separated by approximately 20 seconds.
• Normal and Hysteresis
• Reduced Sensitivity (HUSH)
• High Gain for Chamber Test and Push-to-Test
As an option, a Low Battery Silence mode can be
invoked. If a low battery condition exists and the TEST
input is driven high, the RLED will turn on. If the TEST
input is held for more than 0.5 second, the unit will
enter the Push-to-test operation described in
Section 3.4 “Push-to-Test Operation (PTT)”. After
the TEST input is driven low, the unit enters in Low
Battery Hush mode and the 10 ms horn pulse is
silenced for 8 hours. The activation of the test button
will also initiate the 9 minute Reduced Sensitivity mode
described in Section 3.6 “Reduced Sensitivity
Mode”. At the end of the 8 hours, the audible indication
will resume if the low battery condition still exists.
There are four separate sets of integration limits (all
user programmable):
3.4
•
•
•
•
Normal Detection
Hysteresis
HUSH
Chamber Test and Push-to-Test modes
In addition, there are user selectable integrator gain
settings to optimize detection levels (see Table 4-1).
2010-2018 Microchip Technology Inc.
Push-to-Test Operation (PTT)
If the TEST input pin is activated (VIH), the smoke
detection rate increases to once every 250 ms after
one internal clock cycle. In Push-to-Test, the photo
amplifier High Gain mode is selected and background
reflections are used to simulate a smoke condition.
After the required three consecutive detections, the
device will go into a Local Alarm condition. When the
TEST input is driven low (VIL), the photo amplifier
Normal Gain is selected, after one clock cycle. The
detection rate continues at once every 250 ms until
three consecutive No Smoke conditions are detected.
At this point, the device returns to standby timing. In
addition, after the TEST input goes low, the device
enters the HUSH mode (see Section 3.6 “Reduced
Sensitivity Mode”).
DS20002271C-page 13
RE46C190
3.5
Interconnect Operation
The bidirectional IO pin allows the interconnection of
multiple detectors. In a Local Alarm condition, this pin
is driven high (High Boost) immediately through a
constant current source. Shorting this output to ground
will not cause excessive current. The IO is ignored as
input during a Local Alarm.
The IO pin also has an NMOS discharge device that is
active for 1.3 seconds after the conclusion of any type
of Local Alarm. This device helps to quickly discharge
any capacitance associated with the interconnect line.
If a remote, active high signal is detected, the device
goes into Remote Alarm and the horn will be active.
RLED will be off, indicating a Remote Alarm condition.
Internal protection circuitry allows the signaling unit to
have a higher supply voltage than the signaled unit,
without excessive current draw.
The interconnect input has a 336 ms nominal digital
filter. This allows the interconnection to other types of
alarms (carbon monoxide, for example) that may have
a pulsed interconnect signal.
3.6
Reduced Sensitivity Mode
A Reduced Sensitivity or Hush mode is initiated by
activating the TEST input (VIH). If the TEST input is
activated during a Local Alarm, the unit is immediately
reset out of the alarm condition and the horn is
silenced. When the TEST input is deactivated (VIL), the
device enters into a 9-minute nominal Hush mode.
During this period, the HUSH integration limit is
selected. The hush gain is user programmable. In
Reduced Sensitivity mode, the RLED flashes for 10 ms
every 10 seconds to indicate that the mode is active.
As an option, the Hush mode will be canceled if any of
the following conditions exist:
3.7
Local Alarm Memory
An Alarm Memory feature allows easy identification of
any unit that had previously been in a Local Alarm
condition. If a detector has entered a Local Alarm,
when it exits that Local Alarm, the Alarm Memory latch
is set. Initially the GLED can be used to visually identify
any unit that had previously been in a Local Alarm
condition. The GLED flashes three times spaced
1.3 seconds apart. This pattern will repeat every
43 seconds. The duration of the flash is 10 ms. In order
to preserve battery power, this visual indication will stop
after a period of 24 hours. The user will still be able to
identify a unit with an active alarm memory by pressing
the Push-to-Test button. When this button is active, the
horn will chirp for 10 ms every 250 ms.
If the Alarm Memory condition is set, then any time the
Push-to-Test button is pressed and released, the Alarm
Memory latch is reset.
The initial 24-hour visual indication is not displayed if a
low battery condition exists.
3.8
End of Life Indicator
As an option, after every 14 days of continuous
operation, the device will read a stored age count from
the EEPROM and increment this count. After 10 years
of powered operation, an audible warning will occur
indicating that the unit should be replaced. This
indicator will be similar to the chamber test failure
warning in that the horn will pulse on three times for
10 ms separated by 330 ms every 43 seconds. This
indicator will be separated from the low battery
indicator by approximately 20 seconds.
• Reduced sensitivity threshold is exceeded
(high smoke level)
• An interconnect alarm occurs
• TEST input is activated again
DS20002271C-page 14
2010-2018 Microchip Technology Inc.
RE46C190
4.0
USER PROGRAMMING MODES
TABLE 4-1:
PARAMETRIC PROGRAMMING
Parametric Programming
Range
Resolution
IRED Period
100-400 µs
100 µs
IRED Current Sink
50-200 mA
50 mA
2.1-2.8V
100 mV
Low Battery Detection Voltage
Photo Detection Limits
Typical Maximum Input Current (nA)
100 µs
Normal/Hysteresis
Hush
Chamber Test
Note 1:
2:
3:
200 µs
300 µs
400 µs
GF = 1
58
29
19.4
14.5
GF = 2
29
14.5
9.6
7.2
GF = 3
14.5
7.2
4.8
3.6
GF = 4
7.2
3.6
2.4
1.8
GF = 1
116
58
38.8
29
GF = 2
58
29
19.4
14.5
GF = 3
29
14.5
9.6
7.2
GF = 4
14.5
7.2
4.8
3.6
GF = 1
29
14.5
9.6
7.2
GF = 2
14.5
7.2
4.8
3.6
GF = 3
7.2
3.6
2.4
1.8
GF = 4
3.6
1.8
1.2
0.9
GF is the user selectable Photo Integration Gain Factor. Once selected, it applies to all modes of
operation. For example, if GF = 1 and integration time is selected to be 100 µs, the ranges will be as
follows: Normal/Hysteresis = 58 nA, Hush = 116 nA, Chamber Test = 29 nA.
Nominal measurement resolution in each case will be 1/31 of the maximum input range.
The same current resolution and ranges applies to the limits.
TABLE 4-2:
FEATURES PROGRAMMING
Features
Options
Tone Select
Continuous or NFPA Tone
10-Year End-of-life Indicator
Enable/Disable
Photo Chamber Long-Term Drift Adjustment
Disable.
The RE46C190 is not recommended for LTD applications.
The RE46C191 should be used for LTD applications.
Low Battery Hush
Enable/Disable
Hush Options
Option 1: Hush mode is not canceled for any reason. If the
test button is pushed during Hush, the unit reverts to Normal
Sensitivity to test the unit, but when it comes out of test,
resumes in Hush where it left off.
Option 2: The Hush mode is canceled if the Reduced
Sensitivity threshold is exceeded (high smoke level), and if
an external (interconnect alarm) is signaled. If the test button
is pushed during Hush, after the test is executed, the Hush
mode is terminated.
2010-2018 Microchip Technology Inc.
DS20002271C-page 15
RE46C190
4.1
Calibration and Programming
Procedures
Eleven separate programming and test modes are
available for user customization. To enter these modes,
after power-up, TEST2 must be driven to VDD and held
at that level. The TEST input is then clocked to step
through the modes. FEED and IO are reconfigured to
become test mode inputs, while RLED, GLED and HB
become test mode outputs. The test mode functions for
each pin are outlined in Table 4-3.
Mode
TABLE 4-3:
T0
When TEST2 is held at VDD, TEST becomes a tri-state
input with nominal input levels at VSS, VDD and VBST. A
TEST clock occurs whenever the TEST input switches
from VSS to VBST. The TEST Data column represents
the state of TEST when used as a data input, which
would be either VSS or VDD. The TEST pin can
therefore be used as both a clock, to change modes,
and a data input, once a mode is set. Other pin
functions are described in Section 4.2 “User
Selections”.
TEST MODE FUNCTIONS
TEST
Clock
TEST
Data
TEST2
FEED
IO
RLED
GLED
HB
VIH
VBST
VDD
VDD
VBST
VDD
—
—
—
VIL
VSS
VSS
—
Description
VSS
VSS
VSS
—
—
Photo Gain Factor
(2 bits)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
Integ Time (2 bits)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
IRED Current (2 bits)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
Low Battery Trip
(3 bits)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
LTD Enable (1 bit)( 5)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
Hush Option (1 bit)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
LB Hush Enable
(1 bit)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
EOL Enable (1 bit)
0
ProgData
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
VDD
ProgCLK ProgEn 14 bits RLED
GLED
HB
Tone Select (1 bit)
0
ProgData
T1
Norm Lim Set
(5 bits)( 4)
1
not used
VDD
CalCLK
LatchLim(
3)
Gamp IntegOut SmkComp( 1)
T2
Hyst Lim Set
(5 bits)( 4)
2
not used
VDD
CalCLK
LatchLim( 3)
Gamp IntegOut SmkComp( 1)
T3
Hush Lim Set
(5 bits)( 4)
3
not used
VDD
CalCLK
LatchLim( 3)
Gamp IntegOut SmkComp( 1)
T4
Ch Test Lim Set
(5 bits)( 4)
4
not used
VDD
CalCLK
LatchLim( 3)
Gamp IntegOut SmkComp( 1)
T5
LTD Baseline (5 bits)
5
not used
VDD
MeasEn ProgEn 25 bits Gamp IntegOut SmkComp( 1)
T6
Serial Read/Write
6
ProgData
VDD
ProgCLK
ProgEn
RLED
T7
Norm Lim Check
7
not used
VDD
MeasEn
not used
Gamp IntegOut
SCMP( 2)
T8
Hyst Lim Check
8
not used
VDD
MeasEn
not used
Gamp IntegOut
SCMP( 2)
T9
Hush Lim Check
9
not used
VDD
MeasEn
not used
Gamp IntegOut
SCMP( 2)
T10 Ch Test Lim Check
10
not used
VDD
MeasEn
not used
Gamp IntegOut
SCMP( 2)
T11 Horn Test
11
not used
VDD
FEED
HornEn
RLED
Note 1:
2:
3:
4:
5:
GLED
GLED
Serial Out
HB
SmkComp (HB) – digital comparator output (high if Gamp < IntegOut; low if Gamp > IntegOut).
SCMP (HB) – digital output representing comparison of measurement value and associated limit. Signal is valid only
after MeasEn has been asserted and measurement has been made. (SCMP high if measured value > limit; low if measured value < limit).
LatchLim (IO) – digital input used to latch present state of limits (Gamp level) for later storage. T1-T4 limits are latched,
but not stored until ProgEn is asserted in T5 mode.
Operating the circuit in this manner with nearly continuous IRED current for an extended period of time may result in
undesired or excessive heating of the part. The duration of this step should be minimized.
The RE46C190 is not recommended for LTD applications. The RE46C191 should be used for LTD applications.
DS20002271C-page 16
2010-2018 Microchip Technology Inc.
RE46C190
4.2
User Selections
Prior to smoke calibration, the user must program the
functional options and parametric selections. This
requires that 14 bits, representing selected values, be
clocked in serially using TEST as a data input and
FEED as a clock input and then be stored in the internal
EEPROM.
The detailed steps are as follows:
1.
Power up with bias conditions as shown in
Figure 4-1. At power-up
TEST = TEST2 = FEED = IO = VSS.
RE46C190
1 VSS
2 IRED
V1
3V
HS 14
4 TEST
HB 13
6 IRP
D3
VBST 15
3 VDD
5 TEST2
D2
LX 16
V2
5V
IO 12
IRCAP 11
7 IRN
FEED 10
8 RLED
GLED 9
V3
5V
Smoke
Chamber
Monitor RLED,
GLED, and HB
V4
FIGURE 4-1:
V5
V6
V7
Nominal Application Circuit for Programming.
2010-2018 Microchip Technology Inc.
DS20002271C-page 17
RE46C190
2.
3.
Drive TEST2 input from VSS to VDD and hold at
VDD through Step 5 below.
Using TEST as data and FEED as clock, shift in
values as selected from Register 4-1.
REGISTER 4-1:
Note:
For test mode T0 only 14 bits (bits 25-38)
will be loaded. For test mode T6 all 39 bits
(bits 0-38), will be loaded.
CONFIGURATION AND CALIBRATION SETTINGS REGISTER
W-x
W-x
W-x
W-x
W-x
W-x
W-x
TS
EOL
LBH
HUSH
LTD
LB0
LB1
bit 38
bit 32
W-x
W-x
W-x
W-x
W-x
W-x
W-x
W-x
LB2
IRC1
IRC0
IT1
IT0
PAGF1
PAGF0
NL4
bit 31
bit 24
W-x
W-x
W-x
W-x
W-x
W-x
W-x
W-x
NL3
NL2
NL1
NL0
HYL4
HYL3
HYL2
HYL1
bit 23
bit 16
W-x
W-x
W-x
W-x
W-x
W-x
W-x
W-x
HYL0
HUL4
HUL3
HUL2
HUL1
HUL0
CTL4
CTL3
bit 15
bit 8
W-x
W-x
W-x
W-x
W-x
W-x
W-x
W-x
CTL2
CTL1
CTL0
LTD4
LTD3
LTD2
LTD1
LTD0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 38
TS: Tone Select bit
1 = Temporal Horn Pattern
0 = Continuous Horn Pattern
bit 37
EOL: End of Life Enable bit
1 = Enable
0 = Disable
bit 36
LBH: Low Battery Hush Enable bit
1 = Enable
0 = Disable
bit 35
HUSH: Hush Option bit
1 = Canceled for high smoke level, interconnect alarm or second push of TEST button
(as described above)
0 = Never Cancel
bit 34
LTD: Long-Term Drift Enable bit
1 = The RE46C190 is not recommended for LTD applications. The RE46C191 should be used for
LTD applications. This bit must be set to 0.
0 = Disable
DS20002271C-page 18
2010-2018 Microchip Technology Inc.
RE46C190
REGISTER 4-1:
CONFIGURATION AND CALIBRATION SETTINGS REGISTER (CONTINUED)
bit 33-31
LB: Low Battery Trip Point bits
000 = 2.1V
001 = 2.5V
010 = 2.3V
011 = 2.7V
100 = 2.2V
101 = 2.6V
110 = 2.4V
111 = 2.8V
bit 30-29
IRC: IRED Current bits
00 = 50 mA
01 = 100 mA
10 = 150 mA
11 = 200 mA
bit 28-27
IT: Integration Time bits
00 = 400 µs
01 = 300 µs
10 = 200 µs
11 = 100 µs
bit 26-25
PAGF: Photo Amplifier Gain Factor bits
00 = 1
01 = 2
10 = 3
11 = 4
bit 24-20
NL: Normal Limits bits (Section 3.2 “Smoke Detection Circuitry”)
00000 = 0
00001 = 1
•
•
•
11110 = 30
11111 = 31
bit 19-15
HYL: Hysteresis Limits bits (Section 3.2 “Smoke Detection Circuitry”)
00000 = 0
00001 = 1
•
•
•
11110 = 30
11111 = 31
bit 14-10
HUL: Hush Limits bits (Section 3.6 “Reduced Sensitivity Mode”)
00000 = 0
00001 = 1
•
•
•
11110 = 30
11111 = 31
2010-2018 Microchip Technology Inc.
DS20002271C-page 19
RE46C190
REGISTER 4-1:
CONFIGURATION AND CALIBRATION SETTINGS REGISTER (CONTINUED)
bit 9-5
CTL: Chamber Test Limits bits (Section 3.3 “Supervisory Tests”)
00000 = 0
00001 = 1
•
•
•
11110 = 30
11111 = 31
bit 4-0
LTD: Long Term Drift Sample bits
00000 = 0
00001 = 1
•
•
•
11110 = 30
11111 = 31
The minimum pulse width for FEED is 10 µs, while the
minimum pulse width for TEST is 100 µs. For example,
the sequence for the following options would be:
data bit
4.
5.
0 0 0 1 1 0 0 0 1 0 0 0 0 1
- 25 26 27 28 29 30 31 32 33 34 35 36 37 38
After shifting in data, pull IO input to VDD, then
VSS (minimum pulse width of 10 ms) to store
shift register contents into the memory.
If any changes are required, power down the
part and return to Step 1. All bit values must be
reentered.
Photo Amp Gain Factor = 1
Integration Time
= 200 µs
IRED Current
= 100 mA
Low Battery Trip
= 2.2V
Long Term Drift, Low Battery Hush and EOL are all
disabled
Hush Option
= Never Cancel
Tone Select
= Temporal
VDD
TEST2
VSS
VDD
TEST
VSS
bit 25
bit 26
bit 27
bit 28
bit 29
bit 30
bit 31
bit 32
bit 33
bit 34
bit 35
bit 36
bit 37
bit 38
VBST
FEED
VSS
Min Tsetup2 = 2 µs
Min Tsetup1 = 1 µs
Min Thold1 = 1 µs
Min PW1 = 10us
Min T1 = 20 µs
Min Td1 = 2 µs
VDD
IO
…
VSS
Min PW2 = 10 ms
FIGURE 4-2:
DS20002271C-page 20
Timing Diagram for Mode T0.
2010-2018 Microchip Technology Inc.
RE46C190
As an alternative to Figure 4-1, Figure 4-3 can be used
to program while in the application circuit. Note that in
addition to the five programming supplies, connections
to VSS are needed at TP1 and TP2.
VDD
R1
V1
100
C1
10 µF
3V
C2
1 µF
Push-To-Test/
Hush
R7
100
TP1
HS 14
TP2
4 TEST
HB
D2
D5
GREEN
5 TEST2
V2
VBST 15
3 VDD
D3
RED
LX 16
100 µF
Smoke
Chamber
D4
D1
2 IRED
C3
VBST
RE46C190
1 VSS
VBST
R6
330
Monitor RLED,
GLED and HB
L1
10 µH
5V
R4
13
1.5M
C5
1 nF
IRCAP 11
7 IRN
FEED 10
8 RLED
GLED 9
C4
4.7 µF
IO 12
6 IRP
R3
200K
R5
330
C6
To other Units
V3
33 µF
V4
FIGURE 4-3:
V5
V6
V7
5V
Circuit for Programming in the Typical Application.
2010-2018 Microchip Technology Inc.
DS20002271C-page 21
RE46C190
4.3
Smoke Calibration
5.
A separate calibration mode is entered for each
measurement mode (Normal, Hysteresis, Hush and
Chamber Test) so that independent limits can be set for
each. In all calibration modes, the integrator output can
be accessed at the GLED output.
The Gamp output voltage, which represents the smoke
detection level, can be accessed at the RLED output.
The SmkComp output voltage is the result of the
comparison of Gamp with the integrator output and can
be accessed at HB. The FEED input can be clocked to
step up the smoke detection level at RLED. Once the
desired smoke threshold is reached, the TEST input is
pulsed low to high to store the result.
6.
The procedure is described in the following steps:
1.
2.
3.
4.
Power-up with the bias conditions shown in
Figure 4-1.
Drive TEST2 input from VSS to VDD to enter the
Programming mode. TEST2 should remain at
VDD through Step 7.
Apply a clock pulse to the TEST input to enter in
T1 mode. This initiates the calibration mode for
Normal Limits setting. The Integrator output
sawtooth should appear at GLED and the
smoke detection level at RLED. Clock FEED to
increase the smoke detection level as needed.
Once the desired smoke threshold is reached,
the IO input is pulsed low to high to enter the
result. See typical waveforms in Figure 4-4.
Operating the circuit in this manner, with nearly
continuous IRED current for an extended period
of time, may result in undesired or excessive
heating of the part. The duration of this step
should be minimized.
Apply a second clock pulse to the TEST input to
enter in T2 mode. This initiates the calibration
mode for Hysteresis Limits. Clock FEED as in
Step 3 and apply pulse to IO, once the desired
level is reached. Operating the circuit in this
manner, with nearly continuous IRED current for
an extended period of time, may result in undesired or excessive heating of the part. The duration of this step should be minimized.
DS20002271C-page 22
7.
Apply a clock pulse to the TEST input again to
enter in T3 mode and initiate calibration for Hush
Limits. Clock FEED as in the previous steps and
apply a pulse to IO once the desired level is
reached. Operating the circuit in this manner,
with nearly continuous IRED current for an
extended period of time, may result in undesired
or excessive heating of the part. The duration of
this step should be minimized.
Apply a clock pulse to the TEST input a fourth
time to enter in T4 mode and initiate the
calibration for Chamber Test Limits. Clock
FEED and apply pulse to IO once desired level
is reached. Operating the circuit in this manner,
with nearly continuous IRED current for an
extended period of time, may result in undesired
or excessive heating of the part. The duration of
this step should be minimized.
Apply a clock pulse to the TEST input a fifth time
to enter in T5 mode. After limits have been set,
pulse IO to store all results in memory. Before
this step, no limits are stored in memory. With
LTD disabled, the LTD baseline measurement
does not have to be made before pulsing IO high
to store test limits in memory.
2010-2018 Microchip Technology Inc.
RE46C190
VDD
TEST2
VSS
Min Tsetup2 = 2 µs
VBST
TEST
VSS
Min PW3 = 100 µs
VBST
FEED
VSS
Min Td2 = 10 µs
Min PW1 = 10 µs
Min T1 = 20 µs
Min PW5 = 2 ms
VDD
IO
VSS
Min PW2 = 10 ms
GLED
…
…
…
…
IRED
…
…
…
…
RLED
HB
FIGURE 4-4:
Timing Diagram for Modes T1 to T5.
2010-2018 Microchip Technology Inc.
DS20002271C-page 23
RE46C190
4.4
The data sequence follows the pattern described in
Register 4-1:
Serial Read/Write
As an alternative to the steps in Section 4.3 “Smoke
Calibration”, if the system has been wellcharacterized, the limits and baseline can be entered
directly from a serial read/write calibration mode.
To enter this mode, follow these steps:
1.
2.
Set up the application as shown in Figure 4-1.
Drive TEST2 input from VSS to VDD to enter in
Programming mode. TEST2 should remain at
VDD until all data has been entered.
Clock the TEST input to mode T6 (High = VBST,
Low = VSS, 6 clocks). This enables the serial
read/write mode.
TEST now acts as a data input (High = VDD,
Low = VSS). FEED acts as the clock input
(High = VBST, Low = VSS). Clock in the limits,
LTD baseline, functional and parametric
options. The data sequence should be as
follows:
3.
4.
5 bit
LTD sample (LSB first)
5 bit
Chamber Test Limits (LSB first)
5 bit
Hush Limits (LSB first)
5 bit
Hysteresis Limits (LSB first),
5 bit
Normal Limits (LSB first)
2 bit
Photo Amp Gain Factor
2 bit
Integration Time
2 bit
IRED current
3 bit
Low Battery Trip Point
1 bit
Long-Term Drift Enable (set to 0)
1 bit
Hush Option
1 bit
Low Battery Hush Enable
1 bit
EOL enable
1 bit
Tone Select
A serial data output is available at HB.
5.
After all 39 bits have been entered, pulse IO to
store into the EEPROM memory.
VDD
TEST2
VSS
VBST
TEST
D1
VSS
Min Tsetup2 = 2 µs
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
…
D39
VSS
Min PW3 = 100 µs
Min T2 = 120 µs
VBST
FEED
…
VSS
Min Tsetup1 = 1 µs
Min Thold1 = 1 µs
Min PW1 = 10 µs
Min T1 = 20 µs
VDD
IO
…
VSS
Min PW2 = 10 ms
FIGURE 4-5:
DS20002271C-page 24
Timing Diagram for Mode T6.
2010-2018 Microchip Technology Inc.
RE46C190
4.5
Limits Verification
After all limits have been entered and stored into the
memory, additional test modes are available to verify if
the limits are functioning as expected. Table 4-4
describes several verification tests.
TABLE 4-4:
LIMITS VERIFICATION DESCRIPTION
Limit
Test Description
Normal Limits
Clock TEST to Mode T7 (7 clocks). With appropriate smoke level in chamber, pull FEED to
VDD and hold for at least 1 ms. The HB output will indicate the detection status
(High = smoke detected).
Hysteresis Limits
Clock TEST to Mode T8 (8 clocks). Pulse FEED and monitor HB as in Normal Limits case.
Hush Limits
Clock TEST to Mode T9 (9 clocks). Pulse FEED and monitor HB.
Chamber Test Limits
Clock TEST to Mode T10 (10 clocks). Pulse FEED and monitor HB.
V DD
TEST2
V SS
V BST
TEST
V SS
Min Tsetup2 = 2 µs
Min PW3 = 100 µs
Min T2 = 120 µs
Vbst
FEED
V SS
Min Td2 = 10 µs
Min PW5 = 2 ms
V DD
IO
V SS
GLED
…
…
…
IRED
…
…
…
RLED
HB
FIGURE 4-6:
Timing Diagram for Modes T7-T10.
2010-2018 Microchip Technology Inc.
DS20002271C-page 25
RE46C190
4.6
Horn Test
The last test mode allows the horn to be enabled
indefinitely for audibility testing. To enter this mode,
clock TEST to Mode T11 (11 clocks). The IO pin is
configured as horn enable.
V DD
TEST2
V SS
V BST
TEST
V SS
Min Tsetup2 = 2 µs
Min PW3 = 100 µs
Min T2 = 120 µs
V DD
IO
V SS
Horn Enabled
FIGURE 4-7:
DS20002271C-page 26
Timing Diagram for Mode T11.
2010-2018 Microchip Technology Inc.
RE46C190
5.0
APPLICATION NOTES
5.1
Standby Current Calculation and
Battery Life
A calculation of the standby current for the battery life
is shown in Table 5-1, based on the following
parameters:
The supply current shown in the DC Electrical
Characteristics table is only one component of the
average standby current and, in most cases, can be a
small fraction of the total, because power consumption
generally occurs in relatively infrequent bursts and
depends on many external factors. These include the
values selected for IRED current and integration time,
the VBST and IR capacitor sizes and leakages, the VBAT
level, and the magnitude of any external resistances
that will adversely affect the boost converter efficiency.
TABLE 5-1:
VBAT
=
3
VBST1
=
3.6
VBST2
=
9
Boost capacitor size
=
4.70E-06
Boost Efficiency
=
8.50E-01
IRED on time
=
2.000E-04
IRED Current
=
1.000E-01
STANDBY CURRENT CALCULATION
Voltage
(V)
Current
(A)
Duration
(s)
Energy
(J)
Period
(s)
Average
Power
(W)
IBAT
Contribution
(A)
IBAT
(µA)
3
1.00E-06
—
—
—
3.00E-06
1.00E-06
1.0
Chamber test
(excluding IR drive)
3.6
1.00E-03
1.00E-02
3.60E-05
43
9.85E-07
3.28E-07
0.3
IR drive during
Chamber Test
3.6
0.10
2.00E-04
7.20E-05
43
1.97E-06
6.57E-07
0.7
Smoke Detection
(excluding IR drive)
3.6
1.00E-03
1.00E-02
3.60E-05
10.75
3.94E-06
1.31E-06
1.3
IR drive during
Smoke Detection
3.6
0.10
2.00E-04
7.20E-05
10.75
7.88E-06
2.63E-06
2.6
IDD Component
Fixed IDD
Photo Detection Current
Low Battery Check Current
Loaded Test
Load
9
2.00E-02
1.00E-02
1.80E-03
344
6.16E-06
2.05E-06
2.1
Boost
VBST1
to VBST2
—
—
6.85E-05
344
2.34E-07
7.81E-08
0.1
3.6
1.00E-04
1.00E-02
3.60E-06
43
9.85E-08
3.28E-08
0.0
8.09E-06
8.1
Unloaded Test
Load
Total
The following paragraphs explain the components in
Table 5-1 and the calculations in the example.
5.1.1
FIXED IDD
The IDD is the Supply Current shown in the DC
Electrical Characteristics table.
5.1.2
PHOTO DETECTION CURRENT
Photo Detection Current is the current draw due to the
smoke test every 10.75 seconds and the chamber test
every 43 seconds. The current for both the IR diode
and the internal measurement circuitry comes primarily
from VBST, so the average current must be scaled for
both on-time and boost voltage.
2010-2018 Microchip Technology Inc.
The contribution to IBAT is determined by first
calculating the energy consumed by each component,
given its duration. An average power is then calculated
based on the period of the event and the boost
converter efficiency (assumed to be 85% in this case).
An IBAT contribution is then calculated based on this
average power and the given VBAT. For example, the IR
drive contribution during chamber test is detailed in
Equation 5-1:
EQUATION 5-1:
3.6V 0.1A 200 s
--------------------------------------------------- = 0.657 A
43s 0.85 3V
DS20002271C-page 27
RE46C190
5.1.3
LOW BATTERY CHECK CURRENT
The Low Battery Check Current is the current required
for the low battery test. It includes both the loaded
(RLED on) and unloaded (RLED off) tests. The boost
component of the loaded test represents the cost of
charging the boost capacitor to the higher voltage level.
This has a fixed cost for every loaded check, because
the capacitor is gradually discharged during
subsequent operations and the energy is generally not
recovered. The other calculations are similar to those
shown in Equation 5-1. The unloaded test has a
minimal contribution because it involves only some
internal reference and comparator circuitry.
5.1.4
BATTERY LIFE
When estimating the battery life, several additional
factors must be considered. These include battery
resistance, battery self discharge rate, capacitor
leakages and the effect of the operating temperature
on all of these characteristics. Some number of false
alarms and user tests should also be included in any
calculation.
For 10-year applications, a 3V spiral wound lithium
manganese dioxide battery with a laser seal is
recommended. These can be found with capacities of
1400 to 1600 mAh.
DS20002271C-page 28
2010-2018 Microchip Technology Inc.
RE46C190
5.1.5
FUNCTIONAL TIMING DIAGRAMS
Standby, No Alarm (not to Scale)
TI RON
TPER0
IRED
Chamber Test
(Internal Signal)
TPCT1
Low Battery Test
(Internal signal)
TPLB2
TON1
RLED
TPLB1
LTD Sample
TLT D
EOL
TEO L
Low Supply Test Failure
Low Battery Test
(Internal signal)
RLED
TH ON1
HORN
THPER1
Chamber Test Failure
Chamber Test
(Internal Signal)
THO N2
HORN
THO F2
THPER2
FIGURE 5-1:
RE46C190 Timing Diagram – Standby, No Alarm, Low Supply Test Failure and
Chamber Test Failure.
2010-2018 Microchip Technology Inc.
DS20002271C-page 29
RE46C190
Local Alarm with Temporal Horn Pattern (not to Scale)
No Alarm
Local Alarm
TI RON
IRED
TPER3A
TON1
RLED
TPLED2A
THO N2A
THOF2A
THOF3A
HORN
TIODLY1
IO as Output
Local Alarm with International Horn Pattern (not to Scale)
No Alarm
Local Alarm
TIRO N
IRED
TPER3B
TON1
RLED
TPLED2B
THO N2B
THO F2B
HORN
TIODLY1
IO as Output
Interconnect as Input with Temporal Horn pattern (not to Scale)
TIO FILT
IO as Input
TIO DLYA
HORN
Interconnect as Input with International Horn Pattern (not to Scale)
TIO FILT
IO as Input
TIO DLYB
FIGURE 5-2:
RE46C190 Timing Diagram – Local Alarm with Temporal Horn Pattern, Local Alarm
with International Horn Pattern, Interconnect as Input with Temporal Horn Pattern and Interconnect as
Input with International Horn Pattern.
DS20002271C-page 30
2010-2018 Microchip Technology Inc.
RE46C190
Alarm Memory (not to Scale)
Alarm Memory
Alarm, No Low Battery
Alarm Memory; No Alarm; No Low Battery
Alarm Memory After 24 Hour Timer
Indication
RLED
TPLED1
TON1
TPLED1
T PLED2
GLED
TON1
T OFLED
T PLED1
TLALED
THON4
HB
THPER4
TEST
Hush Timer (not to Scale)
Alarm, No Low Battery
Timer Mode; No Alarm; No Low Battery
Standby, No Alarm
RLED
TPLED4
TON1
TPLED1
T PLED2
TTPER
HB
TEST
FIGURE 5-3:
RE46C190 Timing Diagram – Alarm Memory and Hush Timer.
2010-2018 Microchip Technology Inc.
DS20002271C-page 31
RE46C190
NOTES:
DS20002271C-page 32
2010-2018 Microchip Technology Inc.
RE46C190
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
16-Lead SOIC (.150”)
Example
RE46C190
V/SL e3
1830256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
2010-2018 Microchip Technology Inc.
DS20002271C-page 33
RE46C190
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20002271C-page 34
2010-2018 Microchip Technology Inc.
RE46C190
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2010-2018 Microchip Technology Inc.
DS20002271C-page 35
RE46C190
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20002271C-page 36
2010-2018 Microchip Technology Inc.
RE46C190
APPENDIX A:
REVISION HISTORY
Revision C (July 2018)
The following is the list of modifications:
•
•
•
•
•
•
Updated the AC Electrical Characteristics table.
Updated Table 4-2.
Added Note 5 in Table 4-3.
Updated Register 4-1.
Updated Section 4.3 “Smoke Calibration”.
Updated Section 4.4 “Serial Read/Write”.
Revision B (December 2016)
The following is the list of modifications:
• Updated Section 3.0 “Device Description”.
• Updated Section 6.1 “Package Marking
Information”.
• Minor typographical corrections.
Revision A (December 2010)
• Original Release of this Document.
2010-2018 Microchip Technology Inc.
DS20002271C-page 37
RE46C190
NOTES:
DS20002271C-page 38
2010-2018 Microchip Technology Inc.
RE46C190
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
XX
X
T
Device Package Number
of Pins
Lead
Tape
and Reel Free
Device:
RE46C190:
RE46C190T:
Package:
S
=
X
CMOS Photoelectric Smoke Detector ASIC
CMOS Photoelectric Smoke Detector ASIC
(Tape and Reel)
Examples:
a)
RE46C190S16F:
b)
RE46C190S16TF:
16LD SOIC Package,
Lead Free
16LD SOIC Package,
Tape and Reel,
Lead Free
Small Plastic Outline - Narrow, 3.90 mm Body,
16-Lead (SOIC)
2010-2018 Microchip Technology Inc.
DS20002271C-page 39
RE46C190
NOTES:
DS20002271C-page 40
2010-2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3323-1
== ISO/TS 16949 ==
2010-2018 Microchip Technology Inc.
DS20002271C-page 41
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