SY88403BL
3.3V 4.25 Gbps CML Low-Power Limiting
Post Amplifier with TTL LOS
Features
General Description
• Multi-Rate up to 4.25 Gbps Operation
• 5 mVPP Input Sensitivity
• Low Noise 50Ω CML Data Outputs
- 800 mVPP Output Swing
- 60 ps Edge Rates
- 1psRMS Typ. Random Jitter
- 10psPP Typ. Deterministic Jitter
• Chatter-Free Loss-of-Signal (LOS) Output
- 3.5 dB Electrical Hysteresis
- OC-TTL Output with Internal 4.75 kΩ Pull-Up
Resistor
• Programmable LOS Sensitivity Using Single
External Resistor
• Internal 50Ω Data Input Termination
• TTL /EN Input Allows Feedback from LOS
• Wide Operating Range:
- Single 3.3V ±10% Power Supply
- Industrial Temperature Range: −40°C to
+85°C
• Available in a 16-pin QFN Package
The SY88403BL is a low-power limiting post amplifier
optimized for copper applications. The device connects
to typical transimpedance amplifiers (TIAs). The linear
signal output from TIAs can contain significant amounts
of noise and may vary in amplitude over time. The
SY88403BL quantizes these signals and outputs
typically 800 mVPP voltage-limited waveforms.
Applications
• 1.062 Gbps, 2.125 Gbps, and 4.25 Gbps Fibre
Channel
• Cable Driver
• Small Form Factor (SFF) and Small Form Factor
Pluggable (SFP) Transceivers
• High-Gain Line Driver and Line Receiver
2022 Microchip Technology Inc. and its subsidiaries
The SY88403BL operates from a single +3.3V ±10%
power supply, over an industrial temperature range of
−40°C to +85°C. With its wide bandwidth and high gain,
signals with data rates up to 4.25 Gbps and as small as
5 mVPP can be amplified to drive devices with CML
inputs or AC-coupled PECL inputs.
The SY88403BL incorporates a loss-of-signal (LOS)
open-collector TTL output with internal 4.75 kΩ pull-up
resistor. A programmable loss-of-signal level set pin
(LOSLVL) sets the sensitivity of the input amplitude
detection.
LOS asserts high if the input amplitude falls below the
threshold set by LOSLVL and de-asserts low
otherwise. LOS can be fed back to the enable bar (/EN)
input to maintain output stability under a loss of signal
condition. /EN de-asserts the true output signal without
removing the input signal. Typically, 3.5 dB LOS
hysteresis is provided to prevent chattering.
Markets
• Copper Interconnect
• Datacom and Telecom
• Storage Area Network (SAN)
DS20006650A-page 1
SY88403BL
Typical Application Circuit
DS20006650A-page 2
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage (VCC) ..................................................................................................................................... 0V to +7.0V
/EN, LOSLVL Voltage ........................................................................................................................................ 0V to VCC
REF Current ............................................................................................................................................................±1 mA
LOS Current ............................................................................................................................................................±5 mA
DOUT, /DOUT Current .......................................................................................................................................... ±25 mA
DIN, /DIN Current.................................................................................................................................................. ±10 mA
Operating Ratings ‡
Supply Voltage (VCC) ................................................................................................................................ +3.0V to +3.6V
† Notice: Permanent device damage may occur if ratings in the absolute maximum ratings section are exceeded. This
is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational
sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device
reliability.
‡ Notice: The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
DC ELECTRICAL CHARACTERISTICS
VCC = +3.0V to +3.6V; RL = 50Ω to VCC; TA = –40°C to +85°C; typical values at VCC = +3.3V, TA = +25°C.
Parameter
Power Supply Current
REF Voltage
LOSLVL Voltage Range
Symbol
Min.
Typ.
Max.
Units
Conditions
—
25
42
mA
3.3V, Note 1
—
41
62
mA
3.3V, Note 2
VREF
—
VCC – 1.3
—
V
—
VLOSLVL
VREF
—
VCC
V
—
VCC
V
Note 3
V
3.3V, Note 3
ICC
DOUT, /DOUT HIGH Voltage
VOH
VCC – 0.020 VCC – 0.005
DOUT, /DOUT LOW Voltage
VOL
VCC – 0.475 VCC – 0.400 VCC – 0.350
DC Differential Output Voltage
VOD_DC
700
800
950
mV
Note 3
Differential Output Offset
VOFFSET
—
—
±80
mV
—
Single-Ended Output Impedance
ZO
40
50
60
Ω
—
Single-Ended Input Impedance
ZI
40
50
60
Ω
—
TTL DC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V; TA = –40°C to +85°C.
Parameter
Symbol
Min.
Typ.
Max.
Units
LOS Output HIGH Level
VOH
2.4
—
VCC
V
Sourcing 100 µA
LOS Output LOW Level
VOL
—
—
0.5
V
Sinking 2 mA
/EN Input HIGH Voltage
VIH
2.0
—
—
V
—
/EN Input LOW Voltage
VIL
—
—
0.8
V
—
—
—
20
µA
VIN = 2.7V
—
—
100
µA
VIN = VCC
–0.3
—
—
mA
VIN = 0.5V
/EN Input HIGH Current
IIH
/EN Input LOW Current
IIL
Note 1:
2:
3:
Conditions
Excludes current of CML output stage. See “Detailed Description.”
Total device current with no output load.
Output levels are based on a 50Ω to VCC load impedance. If the load impedance is different, the output
level will be changed. Amplifier is in limiting mode. Measured at 155 Mbps with 20 mVPP input and
PRBS-23 data pattern and 50Ω load.
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 3
SY88403BL
AC ELECTRICAL CHARACTERISTICS
VCC = +3.0V to +3.6V; TA= –40°C to +85°C; RL = 50Ω to VCC; typical values at VCC = +3.3V, TA = 25°C.
Parameter
Output Rise/Fall Time
(20% to 80%)
Deterministic Jitter
Random Jitter
Symbol
Min.
Typ.
Max.
Units
tr, tf
—
60
120
ps
Note 1
—
10
—
psPP
Note 2
tJITTER
Conditions
psRMS Note 3
—
1
—
Differential Input Voltage Swing
VID
5
—
1800
mVPP
See Figure 1
AC Differential Output Voltage
VOD_AC
600
800
950
mVPP
Note 4
tOFF
—
2
10
µs
LOS Release Time
—
tON
—
2
10
µs
Low LOS Assert Level
LOSAL
—
8
—
mVPP
Low LOS De-assert Level
LOSDL
—
12
—
mVPP
RLOSLVL = 15 kΩ, Note 5
Low LOS Hysteresis
HYSL
2
3.5
4.5
dB
RLOSLVL = 15 kΩ, Note 6
Medium LOS Assert Level
LOSAM
12
17
—
mVPP
RLOSLVL = 5 kΩ, Note 5
Medium LOS De-assert Level
LOSDM
—
25
33
mVPP
RLOSLVL = 5 kΩ, Note 5
LOS Assert Time
—
RLOSLVL = 15 kΩ, Note 5
LOS Hysteresis
HYSM
2
3.5
4.5
dB
RLOSLVL = 5 kΩ, Note 6
High LOS Assert Level
LOSAH
34
47
—
mVPP
RLOSLVL = 100Ω, Note 5
High LOS De-assert Level
LOSDH
—
70
83
mVPP
RLOSLVL = 100Ω, Note 5
High LOS Hysteresis
HYSH
2
3.5
4.5
dB
RLOSLVL = 100Ω, Note 6
LOS Sensitivity Range
Differential Voltage Gain
Single-Ended Small-Signal Gain
Note 1:
2:
3:
4:
5:
6:
VSR
20
—
35
mVPP
—
AV(DIFF)
32
38
—
dB
—
S21
26
32
—
dB
—
Amplifier in limiting mode. Input is a 200 MHz square wave.
Deterministic jitter measured using 4.25 Gbps K28.5 pattern, VID = 20 mVPP.
Random jitter measured using 4.25 Gbps K28.7 pattern, VID = 20 mVPP.
Differential output swing measured at 4.25 Gbps with 20 mVPP input and PRBS-23 data pattern and 50Ω
load.
See “Typical Operating Characteristics” for a graph showing how to choose a particular RLOSLVL for a particular LOS assert and its associated de-assert amplitude.
This specification defines electrical hysteresis as 20log(LOS De-assert/LOS Assert). The ratio between
optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending on the level of
received optical power and ROSA characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 2 dB to 4.5 dB shown in the AC characteristics table will be 0.5 dB to
3 dB Optical Hysteresis.
DS20006650A-page 4
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Junction Temperature Range
TJ
–40
—
+120
°C
Ambient Temperature
TA
–40
—
+85
°C
—
Lead Temperature
—
—
—
+260
°C
Soldering, 10 sec.
Storage Temperature
TS
–65
—
+150
°C
—
QFN (Still-Air)
θJA
—
61
—
°C/W
—
QFN
ψJB
—
38
—
°C/W
—
Temperature Ranges
Package Thermal Resistance (Note 2)
Note 1:
2:
—
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +85°C rating. Sustained junction temperatures above +85°C can impact the device reliability.
Thermal performance assumes the use of a 4-layer PCB. Exposed pad must be soldered (or equivalent)
to the device's most negative potential on the PCB.
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 5
SY88403BL
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
FIGURE 2-1:
3.3V, 25°C 20 mVPP Input
@4.25 Gbps 223 – 1 PRBS, RLOAD = 50 to VCC.
FIGURE 2-4:
RLOSLVL.
LOS Hysteresis vs.
FIGURE 2-2:
1800 mVPP Input
@4.25 Gbps 223 – 1 PRBS.
FIGURE 2-5:
Temperature.
Power Supply Current vs.
FIGURE 2-3:
LOS vs. RLOSLVL.
FIGURE 2-6:
Differential Output Voltage
Swing vs. Temperature (Amplifier in Limiting
Mode).
DS20006650A-page 6
VID to Assert/De-Assert
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
FIGURE 2-7:
Differential Output Voltage
Swing vs. Differential Input Voltage Swing.
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 7
SY88403BL
3.0
PIN DESCRIPTIONS
Package Type
SY88403BL
16-Pin QFN
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
QFN Pin
Number
Pin Name
Type
1, 4
DIN, /DIN
Differential Data Input
2, 3,10, 11
Exposed Pad
GND
Ground
5, 8, 13, 16
VCC
Power Supply
6
VREF
—
7
LOS
9, 12
DOUT,
/DOUT
14
LOSLVL
Input: Default is maximum sensitivity.
15
/EN
TTL Input: Default is
high.
DS20006650A-page 8
Description
Differential Data Input. Each pin internally terminates to
REF through 50Ω.
Device Ground. Exposed pad must be soldered (or
equivalent) to the same potential as the ground pins.
Positive Power Supply. Bypass with 0.1 μF||0.01 μF low
ESR capacitors. 0.01 μF capacitors should be as close as
possible to VCC pin.
Reference Voltage. Bypass with 0.01μF low ESR
capacitor from VREF to VCC to stabilize LOSLVL and
VREF.
Open Collector TTL
Loss-of-Signal: Asserts high when the data input
Ouput with Internal
amplitude falls below the threshold set by LOSLVL.
4.75kΩ Pull-Up Resistor
Differential CML Output Differential Data Output.
Loss-of-Signal Level Set: A resistor from this pin to VCC
sets the threshold for the data input amplitude at which the
LOS output will be asserted.
Enable Bar: De-asserts true data output when high.
Incorporates 25 kΩ pull-up to VCC.
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
4.0
FUNCTIONAL DESCRIPTION
4.1
Functional Block Diagram
4.2
Detailed Description
The SY88403BL low-power limiting post amplifier
operates from a single +3.3V power supply, over
temperatures from –40°C to +85°C. Signals with data
rates up to 4.25Gbps and as small as 5 mVPP can be
amplified. Figure 4-1 shows the allowed input voltage
swing. The SY88403BL generates an LOS output,
allowing feedback to /EN for output stability. LOSLVL
sets the sensitivity of the input amplitude detection.
4.2.1
INPUT AMPLIFIER/BUFFER
The SY88403BL’s inputs are internally terminated with
50Ω to REF. If not affected by this internal termination
scheme, upstream devices need to be AC-coupled to
the SY88403BL's inputs. Figure 4-2 shows a simplified
schematic of the input stage.
The high-sensitivity of the input amplifier allows signals
as small as 5 mVPP to be detected and amplified. The
input amplifier allows input signals as large as
1800 mVPP. Input signals are linearly amplified with a
typically 38 dB differential voltage gain. Since it is a
limiting amplifier, the SY88403BL outputs typically
800 mVPP voltage-limited waveforms for input signals
that are greater than 20 mVPP. Applications requiring
the SY88403BL to operate with high-gain should have
the upstream TIA placed as close as possible to the
SY88403BL’s input pins to ensure the best
performance of the device.
4.2.2
OUTPUT BUFFER
The SY88403BL’s CML output buffer is designed to
drive 50Ω lines. The output buffer requires appropriate
termination for proper operation. An external 50Ω
resistor to VCC or equivalent for each output pin
provides this. Figure 4-3 shows a simplified schematic
of the output stage and includes an appropriate
2022 Microchip Technology Inc. and its subsidiaries
termination method. Of course, driving a downstream
device with a CML input that is internally terminated
with 50Ω to VCC eliminates the need for external
termination. As noted in the previous section, the
amplifier outputs typically 800 mVPP waveforms across
25Ω total loads. The output buffer thus switches
typically 16 mA tail-current. Figure 4-4 shows the
power supply current measurement, which excludes
the 16 mA tail-current.
4.2.3
LOSS-OF-SIGNAL
The SY88403BL incorporates a chatter-free
loss-of-signal (LOS) open-collector TTL output with
internal 4.75 kΩ pull-up resistor as shown in
Figure 4-5. LOS is used to determine that the input
amplitude is too small to be considered a valid input.
LOS asserts high if the input amplitude falls below the
threshold set by LOSLVL and de-asserts low
otherwise. LOS can be fed back to the enable (/EN)
input to maintain output stability under a loss of signal
condition. /EN de-asserts low the true output signal
without removing the input signals. Typically 3.5 dB
LOS hysteresis is provided to prevent chattering.
4.2.4
LOSS-OF-SIGNAL LEVEL SET
A programmable loss-of-signal level set pin (LOSLVL)
sets the threshold of the input amplitude detection.
Connecting an external resistor between VCC and
LOSLVL sets the voltage at LOSLVL. This voltage
ranges from VCC to VREF. The external resistor creates
a voltage divider between VCC and VREF as shown in
Figure 4-6. If desired, an appropriate external voltage
may be applied rather than using a resistor. The
relationship between VLOSLVL and RLOSLVL is given by:
DS20006650A-page 9
SY88403BL
EQUATION 4-1:
R LOSLVL
V LOSLVL = V CC – 1.3 -----------------------------------
R LOSLVL + 2.8
Where:
Voltages are in volts and resistances are in kΩ.
The smaller the external resistor, implying a smaller
voltage difference from LOSLVL to VCC, lowers the
LOS sensitivity. Hence, larger input amplitude is
required to de-assert LOS. “Typical Operating
Characteristics” contains graphs showing the
relationship between the input amplitude detection
sensitivity and RLOSLVL.
4.2.5
HYSTERESIS
The SY88403BL provides typically 3.5 dB LOS
electrical hysteresis. By definition, a power ratio
measured in dB is 10log (power ratio). Power is
calculated as VIN2/R for an electrical signal. Hence the
same ratio can be stated as 20log (voltage ratio). While
in linear mode, the electrical voltage input changes
linearly with the optical power and hence the ratios
change linearly. Therefore, the optical hysteresis in dB
is half the electrical hysteresis in dB given in the
datasheet. The SY88403BL provides typically 1.75 dB
LOS optical hysteresis. As the SY88403BL is an
electrical device, this datasheet refers to hysteresis in
electrical terms. With 3.5 dB LOS hysteresis, a voltage
factor of 1.5 is required to de-assert LOS.
DS20006650A-page 10
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
FIGURE 4-1:
VIS and VID Definition.
FIGURE 4-2:
Input Structure.
FIGURE 4-3:
FIGURE 4-4:
Measurement.
Power Supply Current
FIGURE 4-5:
LOS Output Structure.
FIGURE 4-6:
LOSLVL Setting Circuit.
Output Structure.
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 11
SY88403BL
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
16-Lead VQFN*
Example
–
XXXX
WNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
–
403B
1053
Product code or customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
DS20006650A-page 12
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
16-Lead QFN Package Outline and Recommended Land Pattern
16-Lead Very Thin Plastic Quad Flat, No Lead Package (NCA) - 3x3x1.0 mm Body [VQFN]
With 1.55 mm Exposed Pad
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
16X
0.08 C
D
A
0.10 C
B
N
NOTE1
1
2
E
(DATUM B)
(DATUM A)
2X
0.05 C
2X
A1
TOP VIEW
0.05 C
(A3)
0.10
C A B
A
SEATING
C
PLANE
D2
SIDE VIEW
0.10
C A B
E2
2
e
2
1
L
(K)
N
NOTE 1
e
BOTTOM VIEW
16X b
0.10
0.05
C A B
C
Microchip Technology Drawing C04-1103-NCA Rev B Sheet 1 of 2
0LFURFKLS7HFKQRORJ\,QFRUSRUDWHG
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 13
SY88403BL
16-Lead Very Thin Plastic Quad Flat, No Lead Package (NCA) - 3x3x1.0 mm Body [VQFN]
With 1.55 mm Exposed Pad
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Notes:
Units
Dimension Limits
Number of Terminals
N
e
Pitch
A
Overall Height
Standoff
A1
Terminal Thickness
A3
Overall Length
D
Exposed Pad Length
D2
Overall Width
E
Exposed Pad Width
E2
b
Terminal Width
Terminal Length
L
Terminal-to-Exposed-Pad
K
MIN
0.80
0.00
1.50
1.50
0.18
0.35
MILLIMETERS
NOM
16
0.50 BSC
0.90
0.02
0.203 REF
3.00 BSC
1.55
3.00 BSC
1.55
0.23
0.40
0.33 REF
MAX
1.00
0.05
1.60
1.60
0.28
0.45
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-1103-NCA Rev B Sheet 2 of 2
0LFURFKLS7HFKQRORJ\,QFRUSRUDWHG
DS20006650A-page 14
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
16-Lead Very Thin Plastic Quad Flat, No Lead Package (NCA) - 3x3x1.0 mm Body [VQFN]
With 1.55 mm Exposed Pad
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
C1
X2
EV
ØV
G2
C2 Y2 EV
G1
Y1
SILK SCREEN
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
Contact Pitch
E
X2
Center Pad Width
Center Pad Length
Y2
Contact Pad Spacing
C1
Contact Pad Spacing
C2
Contact Pad Width (Xnn)
X1
Contact Pad Length (Xnn)
Y1
Contact Pad to Center Pad (Xnn)
G1
Contact Pad to Contact Pad (Xnn)
G2
Thermal Via Diameter
V
Thermal Via Pitch
EV
MIN
MILLIMETERS
NOM
0.50 BSC
MAX
1.60
1.60
2.90
2.90
0.25
0.85
0.23
0.25
0.30
1.00
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-3103-NCA Rev B
0LFURFKLS7HFKQRORJ\,QFRUSRUDWHG
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 15
SY88403BL
NOTES:
DS20006650A-page 16
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
APPENDIX A:
REVISION HISTORY
Revision A (February 2022)
• Converted Micrel document SY88403BL to Microchip data sheet DS20006650A.
• The MSOP package was removed as part of a
recent update that happened prior to the document conversion.
• Minor text changes throughout.
2022 Microchip Technology Inc. and its subsidiaries
DS20006650A-page 17
SY88403BL
NOTES:
DS20006650A-page 18
2022 Microchip Technology Inc. and its subsidiaries
SY88403BL
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART No.
X
X
X
-XX
Device
Supply
Voltage
Package
Temperature
Range
Media Type
Device:
SY88403B:
3.2 Gbps CML Limiting Post Amplifier with
Wide Loss-of-Signal Detection Range
Supply Voltage:
L
Package:
M
=
16-Lead 3 mm x 3 mm VQFN
Temperature
Range:
G
=
–40°C to +85°C
Media Type:
(blank)= 100/Tube
TR
= 1,000/Reel
=
3.3V
2022 Microchip Technology Inc. and its subsidiaries
Examples:
a) SY88403BLMG:
SY88403B, 3.3V Supply Voltage, 16-Lead 3x3 VQFN,
–40°C to +85°C Temp. Range,
100/Tube
b) SY88403BLMG-TR: SY88403B, 3.3V Supply Voltage, 16-Lead 3x3 VQFN,
–40°C to +85°C Temp. Range,
1,000/Reel
Note 1:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is
used for ordering purposes and is not printed on
the device package. Check with your Microchip
Sales Office for package availability with the
Tape and Reel option.
DS20006650A-page 19
SY88403BL
NOTES:
DS20006650A-page 20
2022 Microchip Technology Inc. and its subsidiaries
Note the following details of the code protection feature on Microchip products:
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and
under normal conditions.
•
Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of
Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to
continuously improving the code protection features of our products.
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