5962-8961601VA

REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added vendor CAGE 1ES66 to devices 03 and 04. Made changes to table I. Editorial changes throughout. 90-12-03 Michael Frye B Drawing updated to reflect current requirements. - lgt 01-07-16 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV B B B SHEET 15 16 17 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rick C. Officer STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 http://www.dscc.dla.mil CHECKED BY Raymond Monnin APPROVED BY Michael Frye MICROCIRCUIT, LINEAR, CMOS 8-BIT A/D CONVERTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 12 July 1989 REVISION LEVEL B SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. 1 OF 5962-89616 17 5962-E513-01 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89616 01 V X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 02 03 04 AD-908A AD-908B PM-7574A PM-7574B Circuit function CMOS microprocessor-compatible FAST 8-bit A/D converter CMOS microprocessor-compatible FAST 8-bit A/D converter CMOS microprocessor-compatible 8-bit A/D converter CMOS microprocessor-compatible 8-bit A/D converter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style V 2 GDIP1-T18 or CDIP2-T18 CQCC1-N20 18 20 Dual-in-line Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. VDD to AGND ........................................................................................ 0 V dc to +7.0 V dc VDD to DGND ........................................................................................ 0 V dc to +7.0 V dc AGND to DGND....................................................................................
0.3 V dc Digital input voltage ( RD , CS pins) to DGND...................................... -0.3 V dc to VDD Digital output voltage (DB0 – DB7, BUSY pins) to DGND ..................... -0.3 V dc to VDD Clock input voltage to (CLK pins) DGND.............................................. -0.3 V dc to V DD Voltage at VREF ..................................................................................... -0 V dc to -20 V dc Voltage at VBOFS ...................................................................................
20 V dc Voltage at VAIN ......................................................................................
20 V dc Power dissipation (PD) : To +75C......................................................................................... 450 mW Derate above +75C (cases V and 2) ............................................. 6.0 mW/C Ambient operating temperature range (T A) ......................................... -55C to +125C Storage temperature range .................................................................. -65C to +150C Lead temperature (soldering, 10 seconds)........................................... +300 C Thermal resistance, junction to case (JC) ........................................... See MIL-STD-1835 Thermal resistance, junction to ambient (JA) Cases V and 2 ................................................................................ 35C/W STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 2 1.4 Recommended operating conditions. Supply voltage (VDD)............................................................................. +5 V dc Reference voltage (VREF)...................................................................... -10 V dc Ground ................................................................................................. AGND = DGND = 0 V dc Clock resistance (RCLK) : Devices 01 and 02 ............................................................................ 43 k  Devices 03 and 04 ............................................................................ 150 k  Clock capacitance (CCLK) ..................................................................... 100pF 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 -- Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 -- List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for nonJAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MILPRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MILPRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 3 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth tables. The truth tables shall be as specified on figure 2. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 4 TABLE I. Electrical performance characteristics. Conditions -55C  TA +125C VDD = +5 V, VREF = -10 V AGND = DGND = 0 V Unipolar configuration unless otherwise specified Group A subgroups Device type INL 1, 2, 3 01, 03 DNL 1, 2, 3 Test Symbol Integral nonlinearity 1/ Differential nonlinearity Limits Min 01, 03 2/ AE 1 01, 03 2, 3 01, 03 02, 04 02, 04 Offset error VOS 1 01, 03 02, 04 2, 3 01, 03 02, 04 Resistance mismatch BOFS to AAIN RAB 1, 2, 3 01, 02 RIN 1, 2, 3 5 15 BOFS pins 10 30 AIN pins 10 30 VREF pins LSB LSB mV %
1.5 03, 04 Input resistance LSB
0.875
3.0
5.0
4.5
6.5
30.0
60.0
50.0
80.0
1.0 02, 04 Gain error Max
0.5
0.75
0.75 02, 04 1/ Unit ALL k Digital input high level VIH RD , CS 3/ 1, 2, 3 ALL 2.4 Digital input low level VIL RD , CS 3/ 1, 2, 3 ALL 0.8 V Digital input current IIN VIN = 0 V or VDD 1 ALL
1.0
10.0 A 2, 3 01, 02 2.4 03, 04 3.0 V Clock input high level VIH Clock 3/ 1, 2, 3 Clock input low level VIL Clock 3/ 1, 2, 3 03, 04 0.4 Clock input high current Clock input low current IIH Clock, VIN = VDD 1 ALL
2.0 mA IIL Clock, VIN = 0 V 1 ALL
1.0 mA VOH ISOURCE = 40 A 1, 2, 3 01, 02 0.8 V
10.0 2, 3 Digital output high level DB7 – DB0; BUSY V ALL 4.0 V See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 5 TABLE I. Electrical performance characteristics - Continued. Test Symbol Digital output low level DB7 – DB0; BUSY Floating state leakage current (DB7 – DB0) VOL ILKG Conditions -55C  TA +125C VDD = +5 V, VREF = -10 V AGND = DGND = 0 V Unipolar configuration unless otherwise specified Group A subgroups Device type Limits ISINK = 1.6 mA 1, 2, 3 ALL Max 0.4 V V0 = 0 V or VDD 1 ALL
1.0 A Min
10.0 2, 3 Supply current from VDD Digital input capacitance Floating state output capacitance (DB7 – DB0) Functional test CS pulse width 4/ IDD AIN = 0 V, BUSY and RD high 1, 2, 3 Unit 01, 02 2.5 03, 04 5.0 mA CIN See 4.3.1c 4 ALL 5.0 pF COUT See 4.3.1c 4 ALL 7.0 pF See 4.3.1d 7, 8 ALL 9 01, 02 60 9, 10, 11 03, 04 150 9, 10, 11 ALL 0 9 01, 02 120 03, 04 180 01, 02 150 03, 04 180 01, 02 150 03, 04 200 tCS 10, 11 RD to CS setup time 5/ tWSCS CS to BUSY 5/ propagational delay tCBPD BUSY load = 20 pF 10, 11 BUSY load = 100 pF 9 ns 90 ns ns 10, 11 ALL 4/ tBSR 9, 10, 11 ALL 0 ns BUSY to CS 4/ setup time Data valid 4/ propagational delay tBSCS 9, 10, 11 ALL 0 ns 9 01, 02 140 03, 04 220 BUSY to RD setup time tRAD Load = 20 pF 200 10, 11 9, 10, 11 ns 200 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C  TA +125C VDD = +5 V, VREF = -10 V AGND = DGND = 0 V Unipolar configuration unless otherwise specified Group A subgroups Device type 9 01, 02 Limits Min Data valid 5/ propagational delay tRAD Load = 100 pF 10, 11 Data valid hold time 4/ tRHD CS to RD hold time 4/ 9, 10, 11 03, 04 9 01, 02 4/ tRESET 100 40 140 80 180 9, 10, 11 03, 04 9 01, 02 200 9, 10, 11 03, 04 500 9 01, 02 tWBPD BUSY load = 20 pF tC ns 450 ns 500 9, 10, 11 03, 04 9 01, 02 s 3.0 600 10, 11 Conversion time 1/ 5/ ns 250 10, 11 RD to BUSY 4/ propagation delay ns 400 30 10, 11 Reset time requirement Max 170 230 10, 11 tRHCS Unit ns 800 s s 9, 10, 11 03, 04 2 9, 10, 11 01, 02 6 03, 04 15 1/ Devices 01 and 02 measured using external clock frequency of 1.35 MHz. Devices 03 and 04 measured using external clock frequency of 550 kHz. See timing waveforms on figure 3. 2/ Gain error is measured after calibration out offset error. 3/ Guaranteed by functional pattern testing in external clock RAM, ROM, and SLOW modes. 4/ Static RAM interface mode. 5/ If not tested, shall be guaranteed to the limits specified in table I. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 7 Device type 01, 02, 03, and 04 Case outline V Terminal Number 2 Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VDD VREF BOFS AIN AGND DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 15 16 17 18 RD CS CLK DGND 19 20 ------------- NC VDD VREF BOFS AIN AGND DB7 DB6 DB5 DB4 NC DB3 DB2 DB1 BUSY DB0 BUSY RD CS CLK DGND NC = No connection FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 8 Device types 01 and 02. Truth table, static RAM mode Inputs Outputs CS RD BUSY DB7 – DB0 Operation L H H High Z Start convert (write cycle) L H High Z to Data Read data (read cycle) L H Data to High Z Reset converter H X (See note) X High Z No effect (not selected) L H L High Z No effect (converter busy) L High Z No effect (converter busy) L High Z Conversion error not allowed L L L = Low H = High (See note) X = Don’t care = Low to high transition = High to low transition NOTE: If RD goes LOW to HIGH, the ADC is internally reset, regardless of the states of CS or BUSY . FIGURE 2. Truth tables. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 9 Device types 03 and 04. Static RAM mode Inputs CS Outputs RD BUSY H Operation High Z Start convert (write cycle) L H High Z to Data Read data (read cycle) L H Data to High Z Reset converter H X (See note) X High Z No effect (not selected) L H L High Z No effect (converter busy) L High Z No effect (converter busy) L High Z Conversion error not allowed L L L = Low DB7 – DB0 H = High (See note) X = Don’t care = Low to high transition = High to low transition NOTE: If RD goes LOW to HIGH, the ADC is internally reset, regardless of the states of CS or BUSY . FIGURE 2. Truth tables – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 10 Device types 01, 02, 03, and 04. Slow-memory mode Inputs Outputs CS and RD BUSY DB7 – DB0 Operation H H High Z No effect (not selected) High Z Start conversion L High Z Conversion in progress P in WAIT state (See note) High Z to Data Conversion complete read data Data to High Z Reset and deselect converter L L H (See note) L = Low H = High = Low to high transition = High to low transition NOTE: If RD goes LOW to HIGH, the ADC is internally reset, regardless of the states of CS or BUSY . FIGURE 2. Truth tables – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 11 Device types 01, 02, 03, and 04. ROM mode Inputs Outputs CS RD L BUSY DB7 – DB0 Operation H High Z to Data Read data Data to High Z Reset and start new converter L High Z No effect (converter busy) L High Z Conversion error not allowed L L L L = Low (See note) H = High = Low to high transition = High to low transition NOTE: If RD goes LOW to HIGH, the ADC is internally reset, regardless of the states of CS or BUSY . FIGURE 2. Truth tables – Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 12 FIGURE 3. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 13 NOTE: For device types 01 and 02, t RAD timing is measured at +2 V and +0.8 V. FIGURE 3. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 14 Note: For device types 01 and 02, t RAD timing is measured at +2 V and +0.8 V. FIGURE 3. Timing waveforms - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 15 TABLE II. Electrical test requirements. MIL-STD-883 test requirements Interim electrical parameters (method 5004) Final electrical test parameters (method 5004) Group A test requirements (method 5005) Groups C and D end-point electrical parameters (method 5005) Subgroups (in accordance with MIL-STD-883, method 5005, table I) 1 1*, 2, 3 1, 2, 3, 4, 7**, 8**, 9, 10***, 11*** 1 * PDA applies to subgroup 1. ** See 4.3.1d *** Subgroups 10 and 11 are guaranteed if not tested. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MILSTD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (CIN measurement) shall be measured only for the initial test and after process or design changes which may affect input capacitance. d. Subgroups 7and 8 shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883. (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 16 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus when a system application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone (614) 692-0547. 6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MILHDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 DSCC FORM 2234 APR 97 SIZE 5962-89616 A REVISION LEVEL B SHEET 17 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 01-07-16 Approved sources of supply for SMD 5962-89616 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ 5962-8961601VA 5962-8961602VA 5962-89616022A 5962-8961603VA 5962-89616032C 5962-8961604VA 5962-89616042A 5962-89616042C Vendor CAGE number 24355 24355 24355 24355 1ES66 1ES66 24355 1ES66 24355 1ES66 Vendor similar PIN 2/ ADC-908AX ADC-908BX ADC-908RC PM-7574AX MX7574TQ/883B MX7574TE/883B PM-7574BX MX7574SQ/883B PM-7574BRC MX7574SE/883B 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number Vendor name and address 24355 Analog Devices, Inc. Rt. 1 Industrial Park P.O. Box 9106 Norwood, Ma. 02062 Point of Contact: 1500 Space Park Dr. P.O. Box 58020 Santa Clara, Ca. 95050-8020 1ES66 Maxim Integrated Products 120 San Gabriel DR Sunnyvale, CA 94086 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.