AD5533ABC-1

a FEATURES Infinite Sample-and-Hold Capability to 0.018% Accuracy High Integration: 32-Channel SHA in 12 12 mm2 LFBGA Per Channel Acquisition Time of 16 s max Adjustable Voltage Output Range Output Voltage Span 10 V Output Impedance 0.5 Readback Capability DSP-/Microcontroller-Compatible Serial Interface Parallel Interface Temperature Range –40 C to +85 C APPLICATIONS Level Setting Instrumentation Automatic Test Equipment Industrial Control Systems Data Acquisition Low Cost I/O 32-Channel Infinite Sample-and-Hold AD5533* GENERAL DESCRIPTION The AD5533 combines a 32-channel voltage translation function with an infinite output hold capability. An analog input voltage on the common input pin, VIN, is sampled and its digital representation transferred to a chosen DAC register. VOUT for this DAC is then updated to reflect the new contents of the DAC register. Channel selection is accomplished via the parallel address inputs A0–A4 or via the serial input port. The output voltage range is determined by the offset voltage at the OFFS_IN pin and the gain of the output amplifier. It is restricted to a range from VSS + 2 V to VDD – 2 V because of the headroom of the output amplifier. The device is operated with AVCC = 5 V ± 5%, DVCC = 2.7 V to 5.25 V, VSS = –4.75 V to –16.5 V and VDD = 8 V to 16.5 V and requires a stable 3 V reference on REF_IN as well as an offset voltage on OFFS_IN. PRODUCT HIGHLIGHTS 1. Infinite Droopless Sample-and-Hold Capability. 2. The AD5533 is available in a 74-lead LFBGA package with a body size of 12 mm × 12 mm. FUNCTIONAL BLOCK DIAGRAM DVCC AVCC REF IN REF OUT OFFS IN VDD VSS VOUT 0 VIN TRACK / RESET BUSY DAC GND AGND DAC DGND INTERFACE CONTROL LOGIC SYNC / CS VOUT 31 ADC DAC AD5533 DAC OFFS OUT SER / PAR ADDRESS INPUT REGISTER WR SCLK D IN D OUT A4 –A0 CAL OFFSET SEL *Protected by U.S. Patent No. 5,969,657; other patents pending. R EV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 2000 (VDD = 8 V to 16.5 V, VSS = –4.75 V to –16.5 V; AVCC = 4.75 V to 5.25 V; DVCC = 2.7 V to 5.25 V; AGND = DGND = DAC_GND = 0 V; REF_IN = 3 V; Output Range from VSS + 2 V to VDD – 2 V. All outputs unloaded. All specifications TMIN to TMAX unless otherwise noted.) AD5533–SPECIFICATIONS Parameter1 A Version2 ± 0.018 ± 0.006 3.46/3.6 ± 50 0 to 3 70 40 1 20 1 Unit % max % typ min/max mV max V mV max mV max µA max pF typ µA max Conditions/Comments Input Range 100 mV to 2.96 V After Gain and Offset Adjustment 3.52 typ ANALOG CHANNEL VIN to VOUT Nonlinearity Gain Offset Error ANALOG INPUT (VIN) Input Voltage Range Input Lower Deadband Input Upper Deadband Input Current Input Capacitance3 ANALOG INPUT (OFFS_IN) Input Current VOLTAGE REFERENCE REF_IN Nominal Input Voltage Input Voltage Range3 Input Current REF_OUT Output Voltage Output Impedance3 Reference Temperature Coefficient3 ANALOG OUTPUTS (VOUT 0–31) Output Temperature Coefficient3, 4 DC Output Impedance Output Range Resistive Load3, 5 Capacitive Load3, 5 Short-Circuit Current3 DC Power Supply Rejection Ratio3 DC Crosstalk3 ANALOG OUTPUT (OFFS_OUT) Output Temperature Coefficient3, 4 DC Output Impedance3 Output Range Output Current Capacitive Load DIGITAL INPUTS3 Input Current Input Low Voltage Input High Voltage Input Hysteresis (SCLK and CS Only) Input Capacitance DIGITAL OUTPUTS (BUSY, DOUT)3 Output Low Voltage Output High Voltage Output Low Voltage Output High Voltage High Impedance Leakage Current High Impedance Output Capacitance Nominal Input Range 50 mV typ. Referred to VIN. See Figure 5 12 mV typ. Referred to VIN. See Figure 5 100 nA typ. VIN Being Acquired on One Channel 100 nA typ 3.0 2.85/3.15 1 3 280 60 20 0.5 VSS + 2 /VDD – 2 5 500 10 –70 –70 250 20 1.3 50 to REF_IN – 12 10 100 ± 10 0.8 0.4 2.4 2.0 200 10 0.4 4.0 0.4 2.4 ±1 15 – 2– V V min/max µA max V typ kΩ typ ppm/°C typ ppm/°C typ Ω typ V min/max kΩ min pF max mA typ dB typ dB typ µV max ppm/°C typ kΩ typ mV typ µA max pF max µA max V max V max V min V min mV typ pF max V max V min V max V min µA max pF typ